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From: David Laight <David.Laight@ACULAB.COM>
To: "'H. Peter Anvin'" <hpa@zytor.com>,
	"'Alexey Dobriyan'" <adobriyan@gmail.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"x86@kernel.org" <x86@kernel.org>
Subject: RE: [PATCH] x86: pad assembly functions with INT3
Date: Mon, 14 May 2018 09:04:38 +0000	[thread overview]
Message-ID: <83866d054b27419c9d9dd97d9c66c3de@AcuMS.aculab.com> (raw)
In-Reply-To: <5c6762fe-5cbe-42ed-ac4e-a7144b8ef7ad@zytor.com>

From: H. Peter Anvin
> Sent: 11 May 2018 19:54
> 
> On 05/10/18 09:39, David Laight wrote:
> > From: Alexey Dobriyan
> >> Sent: 07 May 2018 22:38
> >>
> >> Use INT3 instead of NOP. All that padding between functions is
> >> an illegal area, no legitimate code should jump into it.
> >>
> >> I've checked x86_64 allyesconfig disassembly, all changes looks sane:
> >> INT3 is only used after RET or unconditional JMP.
> >
> > I thought there was a performance penalty (on at least some cpu)
> > depending on the number of and the actual instructions used for padding.
> >
> > I believe that is why gcc generates a small number of very long 'nop'
> > instructions when padding code.
> >
> 
> There is a performance penalty for using NOP instructions *in the
> fallthrough case.*  In the case where the padding is never supposed to
> be executed, which is what we're talking about here, it is irrelevant.

Not completely irrelevant, the instructions stream gets fetched and decoded
beyond the jmp/ret at the end of the function.
At some point the cpu will decode the jmp/ret and fetch/decode from the
target address.
I guess it won't try to speculatively execute the 'pad' instructions
- but you can never really tell!

	David

  reply	other threads:[~2018-05-14  9:03 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-07 21:37 Alexey Dobriyan
2018-05-07 21:41 ` hpa
2018-05-09 16:55   ` Alexey Dobriyan
2018-05-09 19:28     ` H. Peter Anvin
2018-05-10 16:39 ` David Laight
2018-05-11 18:53   ` H. Peter Anvin
2018-05-14  9:04     ` David Laight [this message]
2018-05-14 11:05       ` hpa
2018-05-15  6:54         ` Ingo Molnar
2018-05-15  6:59           ` hpa
2018-05-14 12:53 ` [tip:x86/pti] x86/asm: Pad assembly functions with INT3 instructions tip-bot for Alexey Dobriyan
2018-06-17 11:40   ` Mike Galbraith
2018-06-17 12:00     ` Borislav Petkov
2018-06-17 13:38       ` Mike Galbraith
2018-06-17 14:02         ` Mike Galbraith
2018-06-17 19:47           ` Borislav Petkov
2018-06-18  2:34             ` Mike Galbraith
2018-06-23 10:36               ` [PATCH] x86/crypto: Add missing RETs Borislav Petkov
2018-06-23 17:30                 ` Ondrej Mosnáček
2018-06-24  7:11                 ` Ingo Molnar
2018-06-24  7:12                   ` Thomas Gleixner
2018-06-24 10:15                     ` Borislav Petkov
2018-06-24 10:44                   ` Alexey Dobriyan
2018-06-25  7:24                     ` Ingo Molnar
2018-06-25 13:19                       ` Josh Poimboeuf
2018-06-26  6:49                         ` Ingo Molnar
2018-06-26 12:31                           ` Josh Poimboeuf
2018-07-05  7:58                             ` Ingo Molnar
2018-07-06 14:06                               ` Josh Poimboeuf
2018-07-06 14:57                                 ` Ingo Molnar
2018-07-01 13:19                 ` Herbert Xu
2018-07-01 15:24                   ` Ondrej Mosnáček
2018-07-01 15:45                     ` Herbert Xu
2018-06-19 11:27         ` [tip:x86/pti] x86/asm: Pad assembly functions with INT3 instructions David Laight

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