LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Zeng Guang <guang.zeng@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
"Luck, Tony" <tony.luck@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Kim Phillips <kim.phillips@amd.com>,
Jarkko Sakkinen <jarkko@kernel.org>,
Jethro Beekman <jethro@fortanix.com>,
"Huang, Kai" <kai.huang@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Hu, Robert" <robert.hu@intel.com>,
"Gao, Chao" <chao.gao@intel.com>,
Robert Hoo <robert.hu@linux.intel.com>
Subject: Re: [PATCH v3 2/6] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation
Date: Fri, 6 Aug 2021 15:01:00 +0800 [thread overview]
Message-ID: <86b1a46b-10b7-a495-8793-26374ebc9b90@intel.com> (raw)
In-Reply-To: <YQxnGIT7XLQvPkrz@google.com>
On 8/6/2021 6:32 AM, Sean Christopherson wrote:
> On Thu, Aug 05, 2021, Zeng Guang wrote:
>> From: Robert Hoo <robert.hu@linux.intel.com>
>>
>> The Tertiary VM-Exec Control, different from previous control fields, is 64
>> bit. So extend BUILD_CONTROLS_SHADOW() by adding a 'bit' parameter, to
>> support both 32 bit and 64 bit fields' auxiliary functions building.
>> Also, define the auxiliary functions for Tertiary control field here, using
>> the new BUILD_CONTROLS_SHADOW().
>>
>> Suggested-by: Sean Christopherson <seanjc@google.com>
>> Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
>> ---
>> arch/x86/kvm/vmx/vmx.h | 23 ++++++++++++-----------
>> 1 file changed, 12 insertions(+), 11 deletions(-)
>>
>> diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
>> index 3979a947933a..945c6639ce24 100644
>> --- a/arch/x86/kvm/vmx/vmx.h
>> +++ b/arch/x86/kvm/vmx/vmx.h
>> @@ -413,31 +413,32 @@ static inline u8 vmx_get_rvi(void)
>> return vmcs_read16(GUEST_INTR_STATUS) & 0xff;
>> }
>>
>> -#define BUILD_CONTROLS_SHADOW(lname, uname) \
>> -static inline void lname##_controls_set(struct vcpu_vmx *vmx, u32 val) \
>> +#define BUILD_CONTROLS_SHADOW(lname, uname, bits) \
>> +static inline void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \
> Align the trailing backslashes (with tabs when possible). It's a lot of unfortunate
> churn, but it really does make the code easier to read. An alternative is to split
> "static inline" to a separate line.
>
>> { \
>> if (vmx->loaded_vmcs->controls_shadow.lname != val) { \
>> - vmcs_write32(uname, val); \
>> + vmcs_write##bits(uname, val); \
>> vmx->loaded_vmcs->controls_shadow.lname = val; \
>> } \
>> } \
>> -static inline u32 lname##_controls_get(struct vcpu_vmx *vmx) \
>> +static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \
>> { \
>> return vmx->loaded_vmcs->controls_shadow.lname; \
>> } \
>> -static inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u32 val) \
>> +static inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \
>> { \
>> lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \
>> } \
>> -static inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u32 val) \
>> +static inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \
>> { \
>> lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \
>> }
>> -BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS)
>> -BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS)
>> -BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL)
>> -BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL)
>> -BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL)
>> +BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS, 32)
>> +BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS, 32)
>> +BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL, 32)
>> +BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL, 32)
>> +BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL, 32)
>> +BUILD_CONTROLS_SHADOW(tertiary_exec, TERTIARY_VM_EXEC_CONTROL, 64)
> This fails to compile because all the TERTIARY collateral is in a later patch.
Alternative to derive relative TERTIARY collateral and prepare them in
this patch. Ok for that ?
>
> I think I'd also prefer hiding the 32/64 param via more macros, e.g.
>
> #define __BUILD_CONTROLS_SHADOW(lname, uname, bits) \
> static inline void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \
> { \
> if (vmx->loaded_vmcs->controls_shadow.lname != val) { \
> vmcs_write##bits(uname, val); \
> vmx->loaded_vmcs->controls_shadow.lname = val; \
> } \
> } \
> static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \
> { \
> return vmx->loaded_vmcs->controls_shadow.lname; \
> } \
> static inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \
> { \
> lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \
> } \
> static inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \
> { \
> lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \
> }
> #define BUILD_CONTROLS_SHADOW(lname, uname) __BUILD_CONTROLS_SHADOW(lname, uname, 32)
> #define BUILD_CONTROLS_SHADOW64(lname, uname) __BUILD_CONTROLS_SHADOW(lname, uname, 64)
next prev parent reply other threads:[~2021-08-06 7:01 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 15:13 [PATCH v3 0/6] IPI virtualization support for VM Zeng Guang
2021-08-05 15:13 ` [PATCH v3 1/6] x86/feat_ctl: Add new VMX feature, Tertiary VM-Execution control Zeng Guang
2021-08-05 15:13 ` [PATCH v3 2/6] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation Zeng Guang
2021-08-05 22:32 ` Sean Christopherson
2021-08-06 7:01 ` Zeng Guang [this message]
2021-08-06 15:05 ` Sean Christopherson
2021-08-06 15:51 ` Paolo Bonzini
2021-08-06 16:30 ` Sean Christopherson
2021-08-05 15:13 ` [PATCH v3 3/6] KVM: VMX: Detect Tertiary VM-Execution control when setup VMCS config Zeng Guang
2021-08-05 22:35 ` Sean Christopherson
2021-08-05 22:41 ` Jim Mattson
2021-08-06 6:20 ` Zeng Guang
2021-08-05 15:13 ` [PATCH v3 4/6] KVM: VMX: dump_vmcs() reports tertiary_exec_control field as well Zeng Guang
2021-08-05 15:13 ` [PATCH v3 5/6] KVM: x86: Support interrupt dispatch in x2APIC mode with APIC-write VM exit Zeng Guang
2021-08-05 15:13 ` [PATCH v3 6/6] KVM: VMX: enable IPI virtualization Zeng Guang
2021-08-05 17:03 ` [PATCH v3 0/6] IPI virtualization support for VM Jim Mattson
2021-08-06 5:36 ` Zeng Guang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86b1a46b-10b7-a495-8793-26374ebc9b90@intel.com \
--to=guang.zeng@intel.com \
--cc=bp@alien8.de \
--cc=chao.gao@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=hpa@zytor.com \
--cc=jarkko@kernel.org \
--cc=jethro@fortanix.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kai.huang@intel.com \
--cc=kan.liang@linux.intel.com \
--cc=kim.phillips@amd.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=robert.hu@intel.com \
--cc=robert.hu@linux.intel.com \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
--cc=x86@kernel.org \
--subject='Re: [PATCH v3 2/6] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation' \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).