LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: Mark Kettenis <mark.kettenis@xs4all.nl>
Cc: devicetree@vger.kernel.org, robin.murphy@arm.com,
sven@svenpeter.dev, Mark Kettenis <kettenis@openbsd.org>,
Hector Martin <marcan@marcan.st>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/2] Apple M1 PCIe DT bindings
Date: Mon, 26 Jul 2021 11:05:07 +0100 [thread overview]
Message-ID: <87r1fle6gc.wl-maz@kernel.org> (raw)
In-Reply-To: <20210726083204.93196-1-mark.kettenis@xs4all.nl>
On Mon, 26 Jul 2021 09:31:59 +0100,
Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> From: Mark Kettenis <kettenis@openbsd.org>
>
> This small series adds bindings for the PCIe controller found on the
> Apple M1 SoC.
>
> At this point, the primary consumer for these bindings is U-Boot.
> With these bindings U-Boot can bring up the links for the root ports
> of the PCIe root complex. A simple OS driver can then provide
> standard ECAM access and manage MSI interrupts to provide access
> to the built-in Ethernet and XHCI controllers of the Mac mini.
>
> The Apple controller incorporates Synopsys Designware PCIe logic
> to implement its root port. But unlike other hardware currently
> supported by U-Boot and the Linux kernel the Apple hardware
> integrates multiple root ports. As such the existing bindings
> for the DWC PCIe interface can't be used. There is a single ECAM
> space for all root space, but separate GPIOs to take the PCI devices
> on those ports out of reset. Therefore the standard "reset-gpio" and
> "max-link-speed" properties appear on the child nodes representing
> the PCI devices that correspond to the individual root ports.
>
> MSIs are handled by the PCIe controller and translated into "regular
> interrupts". A range of 32 MSIs is provided. These 32 MSIs can be
> distributed over the root ports as the OS sees fit by programming the
> PCIe controller port registers.
>
> I still hope to hear from Marc Zyngier on the way MSIs are represented
> in this binding.
>
> Patch 2/2 of this series depends on the pinctrl series I sent earlier
> and will probably go through Hector Martin's Apple M1 SoC tree.
>
>
> Changelog:
>
> v3: - Remove unneeded include in example
>
> v2: - Adjust name for ECAM in "reg-names"
> - Drop "phy" registers
> - Expand description
> - Add description for "interrupts"
> - Fix incorrect minItems for "interrupts"
> - Fix incorrect MaxItems for "reg-names"
> - Document the use of "msi-controller", "msi-parent", "iommu-map" and
> "iommu-map-mask"
> - Fix "bus-range" and "iommu-map" properties in the example
>
> Mark Kettenis (2):
> dt-bindings: pci: Add DT bindings for apple,pcie
> arm64: apple: Add PCIe node
>
> .../devicetree/bindings/pci/apple,pcie.yaml | 166 ++++++++++++++++++
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/apple/t8103.dtsi | 63 +++++++
> 3 files changed, 230 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml
Thanks a log for doing this! For the whole series:
Reviewed-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
prev parent reply other threads:[~2021-07-26 10:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 8:31 Mark Kettenis
2021-07-26 8:32 ` [PATCH v3 1/2] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
2021-07-26 23:18 ` Rob Herring
2021-07-31 9:44 ` Mark Kettenis
2021-08-01 9:31 ` Marc Zyngier
2021-08-02 16:10 ` Rob Herring
2021-08-15 16:36 ` Marc Zyngier
2021-08-15 19:19 ` Rob Herring
2021-08-18 19:56 ` Mark Kettenis
2021-08-18 20:51 ` Rob Herring
2021-08-22 17:44 ` Mark Kettenis
2021-08-23 15:24 ` Rob Herring
2021-07-26 8:32 ` [PATCH v3 2/2] arm64: apple: Add PCIe node Mark Kettenis
2021-07-26 10:05 ` Marc Zyngier [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87r1fle6gc.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=kettenis@openbsd.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=marcan@marcan.st \
--cc=mark.kettenis@xs4all.nl \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=sven@svenpeter.dev \
--subject='Re: [PATCH v3 0/2] Apple M1 PCIe DT bindings' \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).