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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 09/15] memory: tegra: Squash tegra20-mc into common tegra-mc driver
Date: Fri, 27 Apr 2018 13:13:47 +0300	[thread overview]
Message-ID: <882f14b8-78c8-95bb-326e-3917c9736faf@gmail.com> (raw)
In-Reply-To: <20180427093435.GB30388@ulmo>

On 27.04.2018 12:34, Thierry Reding wrote:
> On Mon, Apr 09, 2018 at 10:28:31PM +0300, Dmitry Osipenko wrote:
> [...]
>> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
> [...]
>> +#define MC_GART_ERROR_REQ		0x30
>> +#define MC_DECERR_EMEM_OTHERS_STATUS	0x58
>> +#define MC_SECURITY_VIOLATION_STATUS	0x74
> [...]
>> diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
> [...]
>> @@ -21,19 +21,30 @@
>>  #define MC_INT_INVALID_SMMU_PAGE (1 << 10)
>>  #define MC_INT_ARBITRATION_EMEM (1 << 9)
>>  #define MC_INT_SECURITY_VIOLATION (1 << 8)
>> +#define MC_INT_INVALID_GART_PAGE (1 << 7)
>>  #define MC_INT_DECERR_EMEM (1 << 6)
>>  
>>  static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
>>  {
>> +	if (mc->regs2 && offset >= 0x24)
>> +		return readl(mc->regs2 + offset - 0x3c);
> 
> I'm still not sure how this is supposed to work. If we pass in
> MC_GART_ERROR_REQ as offset into mc_readl(), then the condition above
> will be true (0x30 >= 0x24) but then the new offset will be computed
> and we end up with:
> 
> 	return readl(mc->regs2 + 0x30 - 0x3c);
> 
> which means we'll be adding a negative offset (or rather a very large
> offset because it will wrap around).

Indeed! Thank you for pointing at it again, now I see the issue. It probably
works because actual registers mapping is aligned to page(?) size and adding the
large offset with wraparound is equal to subtraction.

That register belongs to the GART and we can't simply move interrupt handling to
the GART driver because status register is within the MC in device tree. We can
omit reading of MC_GART_ERROR_REQ and simply report GART page fault for the
starter and then reorganize drivers by making MC driver MFD and GART its
sub-device, what do you think?

  reply	other threads:[~2018-04-27 10:14 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-09 19:28 [PATCH v4 00/15] Memory controller hot reset Dmitry Osipenko
2018-04-09 19:28 ` [PATCH v4 01/15] dt-bindings: arm: tegra: Remove duplicated Tegra30+ MC binding Dmitry Osipenko
2018-04-27  9:35   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 02/15] dt-bindings: memory: tegra: Document #reset-cells property of the Tegra30 MC Dmitry Osipenko
2018-04-27  9:35   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 03/15] dt-bindings: arm: tegra: Document #reset-cells property of the Tegra20 MC Dmitry Osipenko
2018-04-27  9:35   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 04/15] dt-bindings: memory: tegra: Add hot resets definitions Dmitry Osipenko
2018-04-27  9:36   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 05/15] memory: tegra: Do not handle spurious interrupts Dmitry Osipenko
2018-04-27  9:36   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 06/15] memory: tegra: Setup interrupts mask before requesting IRQ Dmitry Osipenko
2018-04-27  9:36   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 07/15] memory: tegra: Apply interrupts mask per SoC Dmitry Osipenko
2018-04-27  9:36   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 08/15] memory: tegra: Remove unused headers inclusions Dmitry Osipenko
2018-04-27  9:37   ` Thierry Reding
2018-04-09 19:28 ` [PATCH v4 09/15] memory: tegra: Squash tegra20-mc into common tegra-mc driver Dmitry Osipenko
2018-04-27  9:34   ` Thierry Reding
2018-04-27 10:13     ` Dmitry Osipenko [this message]
2018-04-27 10:24       ` Thierry Reding
2018-04-27 10:56         ` Dmitry Osipenko
2018-04-30  8:07   ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 10/15] memory: tegra: Introduce memory client hot reset Dmitry Osipenko
2018-04-30  8:08   ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 11/15] memory: tegra: Add Tegra210 memory controller hot resets Dmitry Osipenko
2018-04-27  9:39   ` Thierry Reding
2018-04-28  8:18     ` Dmitry Osipenko
2018-04-30  8:08       ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 12/15] memory: tegra: Add Tegra124 " Dmitry Osipenko
2018-04-30  8:08   ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 13/15] memory: tegra: Add Tegra114 " Dmitry Osipenko
2018-04-30  8:09   ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 14/15] memory: tegra: Add Tegra30 " Dmitry Osipenko
2018-04-30  8:09   ` Thierry Reding
2018-04-13 11:33 ` [PATCH v4 15/15] memory: tegra: Add Tegra20 " Dmitry Osipenko
2018-04-30  8:09   ` Thierry Reding

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