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From: "HenryC Chen (陳建豪)" <HenryC.Chen@mediatek.com>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
	"Mike Turquette" <mturquette@linaro.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	"JamesJJ Liao (廖建智)" <jamesjj.liao@mediatek.com>,
	"Eddie Huang (黃智傑)" <eddie.huang@mediatek.com>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	"Russell King" <linux@arm.linux.org.uk>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Vladimir Murzin" <vladimir.murzin@arm.com>,
	"Ashwin Chaugule" <ashwin.chaugule@linaro.org>,
	"Yingjoe Chen (陳英洲)" <Yingjoe.Chen@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>
Subject: RE: [PATCH v4 0/7] clk: Add common clock support for Mediatek MT8135 and MT8173.
Date: Mon, 9 Feb 2015 03:05:41 +0000	[thread overview]
Message-ID: <973C649EAEADCC47B3D0BEB0BD37EB2F0495E9A3@mtkmbs08n1> (raw)
In-Reply-To: <20150206151542.GO12209@pengutronix.de>

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Hi Sascha,

It's okay for me, thanks.

Henry

> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer@pengutronix.de]
> Sent: Friday, February 06, 2015 11:16 PM
> To: Matthias Brugger
> Cc: HenryC Chen (³¯«Ø»¨); Rob Herring; Mike Turquette; srv_heupstream;
> Sascha Hauer; JamesJJ Liao (¹ù«Ø´¼); Eddie Huang (¶À´¼³Ç); Pawel Moll;
> Mark Rutland; Ian Campbell; Kumar Gala; Russell King; Catalin Marinas;
> Vladimir Murzin; Ashwin Chaugule; Yingjoe Chen (³¯­^¬w);
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-mediatek@lists.infradead.org
> Subject: Re: [PATCH v4 0/7] clk: Add common clock support for Mediatek
> MT8135 and MT8173.
> 
> On Fri, Feb 06, 2015 at 03:20:35PM +0100, Matthias Brugger wrote:
> > > I don't really understand the "as part of the clk driver part". I
> > > now have replaced the devm_regmap_init_mmio with
> > > syscon_node_to_regmap in the pericfg / infracfg drivers. Is that
> all
> > > that you want or do you want me to move the source code to
> drivers/clk/mediatek?
> >
> > Yes, I propose to move the source code to drivers/clk/mediatek.
> > Please have a look on other clock drivers which implement the reset
> > controller, e.g. rockchip.
> 
> Ok, I'm halfway through implementing this, but let's have weekend first.
> 
> Henry, If you're fine with this I'll change your clock series according
> to Matthias suggestions.
> 
> Sascha
> 
> --
> Pengutronix e.K.                           |
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> Industrial Linux Solutions                 | http://www.pengutronix.de/
> |
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> |
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> 5555 |

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      reply	other threads:[~2015-02-09  3:11 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1422594798-13375-1-git-send-email-henryc.chen@mediatek.com>
2015-02-05 17:24 ` Matthias Brugger
2015-02-06 10:30   ` Sascha Hauer
2015-02-06 14:20     ` Matthias Brugger
2015-02-06 15:15       ` Sascha Hauer
2015-02-09  3:05         ` HenryC Chen (陳建豪) [this message]

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