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From: Frank Wunderlich <linux@fw-web.de>
To: Hsin-Yi Wang <hsinyi@chromium.org>
Cc: "moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>, CK Hu <ck.hu@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	lkml <linux-kernel@vger.kernel.org>,
	stable@vger.kernel.org,
	Frank Wunderlich <frank-w@public-files.de>
Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes
Date: Thu, 29 Jul 2021 07:40:30 +0200	[thread overview]
Message-ID: <97C4FA94-B28A-4F0E-9CD3-4E33B01BA353@fw-web.de> (raw)
In-Reply-To: <CAJMQK-g8g5QJbBkU-A6th1VSWafxVv2fGtym+enQa_hDVaVoBw@mail.gmail.com>

Am 29. Juli 2021 05:15:23 MESZ schrieb Hsin-Yi Wang <hsinyi@chromium.org>:

>This patch is breaking the mt8183 internal display. I think it's
>because  ~routes[i].val; is removed?
>Also what should the routes[i].mask be if it's not set in
>mmsys_mt8183_routing_table?
>
>>                         writel_relaxed(reg, mmsys->regs +
>routes[i].addr);
>>                 }
>>  }
><snip>

The mask should reset the needed bits,maybe it needs to be adjusted for your ddp components...

Can you add some debugs inside loops in mtk_mmsys_ddp_connect and mtk_mmsys_ddp_disconnect (show read val,mask and final mask before write) to show differences before and after the patch?

regards Frank

  parent reply	other threads:[~2021-07-29  5:40 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-27 17:40 Frank Wunderlich
2021-07-28 23:37 ` Chun-Kuang Hu
2021-07-29  3:15 ` Hsin-Yi Wang
2021-07-29  3:42   ` CK Hu
2021-07-29  5:40   ` Frank Wunderlich [this message]
2021-07-29  5:47     ` Hsin-Yi Wang
2021-07-29  5:53       ` Frank Wunderlich
2021-07-29  5:58         ` Hsin-Yi Wang
2021-07-29  6:45           ` Frank Wunderlich
2021-07-29  6:47             ` Hsin-Yi Wang

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