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From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: Will Deacon <will@kernel.org>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"maz@kernel.org" <maz@kernel.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"james.morse@arm.com" <james.morse@arm.com>,
"julien.thierry.kdev@gmail.com" <julien.thierry.kdev@gmail.com>,
"suzuki.poulose@arm.com" <suzuki.poulose@arm.com>,
"jean-philippe@linaro.org" <jean-philippe@linaro.org>,
"Alexandru.Elisei@arm.com" <Alexandru.Elisei@arm.com>,
"qperret@google.com" <qperret@google.com>,
Linuxarm <linuxarm@huawei.com>
Subject: RE: [PATCH v3 4/4] KVM: arm64: Clear active_vmids on vCPU schedule out
Date: Wed, 11 Aug 2021 08:47:34 +0000 [thread overview]
Message-ID: <99805c8519d14491a33f98592bf30a54@huawei.com> (raw)
In-Reply-To: <20210803153036.GA31125@willie-the-truck>
Hi Will,
> -----Original Message-----
> From: Will Deacon [mailto:will@kernel.org]
> Sent: 03 August 2021 16:31
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
> Cc: linux-arm-kernel@lists.infradead.org; kvmarm@lists.cs.columbia.edu;
> linux-kernel@vger.kernel.org; maz@kernel.org; catalin.marinas@arm.com;
> james.morse@arm.com; julien.thierry.kdev@gmail.com;
> suzuki.poulose@arm.com; jean-philippe@linaro.org;
> Alexandru.Elisei@arm.com; qperret@google.com; Linuxarm
> <linuxarm@huawei.com>
> Subject: Re: [PATCH v3 4/4] KVM: arm64: Clear active_vmids on vCPU
> schedule out
[...]
> I think we have to be really careful not to run into the "suspended
> animation" problem described in ae120d9edfe9 ("ARM: 7767/1: let the ASID
> allocator handle suspended animation") if we go down this road.
>
> Maybe something along the lines of:
>
> ROLLOVER
>
> * Take lock
> * Inc generation
> => This will force everybody down the slow path
> * Record active VMIDs
> * Broadcast TLBI
> => Only active VMIDs can be dirty
> => Reserve active VMIDs and mark as allocated
>
> VCPU SCHED IN
>
> * Set active VMID
> * Check generation
> * If mismatch then:
> * Take lock
> * Try to match a reserved VMID
> * If no reserved VMID, allocate new
>
> VCPU SCHED OUT
>
> * Clear active VMID
>
> but I'm not daft enough to think I got it right first time. I think it
> needs both implementing *and* modelling in TLA+ before we merge it!
I attempted to implement the above algo as below. It seems to be
working in both 16-bit vmid and 4-bit vmid test setup. Though I am
not quite sure this Is exactly what you had in mind above and covers
all corner cases.
Please take a look and let me know.
(The diff below is against this v3 series)
Thanks,
Shameer
--->8<----
--- a/arch/arm64/kvm/vmid.c
+++ b/arch/arm64/kvm/vmid.c
@@ -43,7 +43,7 @@ static void flush_context(void)
bitmap_clear(vmid_map, 0, NUM_USER_VMIDS);
for_each_possible_cpu(cpu) {
- vmid = atomic64_xchg_relaxed(&per_cpu(active_vmids, cpu), 0);
+ vmid = atomic64_read(&per_cpu(active_vmids, cpu));
/* Preserve reserved VMID */
if (vmid == 0)
@@ -125,32 +125,17 @@ void kvm_arm_vmid_clear_active(void)
void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid)
{
unsigned long flags;
- u64 vmid, old_active_vmid;
+ u64 vmid;
vmid = atomic64_read(&kvm_vmid->id);
-
- /*
- * Please refer comments in check_and_switch_context() in
- * arch/arm64/mm/context.c.
- */
- old_active_vmid = atomic64_read(this_cpu_ptr(&active_vmids));
- if (old_active_vmid && vmid_gen_match(vmid) &&
- atomic64_cmpxchg_relaxed(this_cpu_ptr(&active_vmids),
- old_active_vmid, vmid))
+ if (vmid_gen_match(vmid)) {
+ atomic64_set(this_cpu_ptr(&active_vmids), vmid);
return;
-
- raw_spin_lock_irqsave(&cpu_vmid_lock, flags);
-
- /* Check that our VMID belongs to the current generation. */
- vmid = atomic64_read(&kvm_vmid->id);
- if (!vmid_gen_match(vmid)) {
- vmid = new_vmid(kvm_vmid);
- atomic64_set(&kvm_vmid->id, vmid);
}
-
+ raw_spin_lock_irqsave(&cpu_vmid_lock, flags);
+ vmid = new_vmid(kvm_vmid);
+ atomic64_set(&kvm_vmid->id, vmid);
atomic64_set(this_cpu_ptr(&active_vmids), vmid);
raw_spin_unlock_irqrestore(&cpu_vmid_lock, flags);
}
--->8<----
next prev parent reply other threads:[~2021-08-11 8:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-29 10:40 [PATCH v3 0/4] kvm/arm: New VMID allocator based on asid Shameer Kolothum
2021-07-29 10:40 ` [PATCH v3 1/4] KVM: arm64: Introduce a new VMID allocator for KVM Shameer Kolothum
2021-08-03 11:38 ` Will Deacon
2021-08-03 12:12 ` Shameerali Kolothum Thodi
2021-07-29 10:40 ` [PATCH v3 2/4] KVM: arm64: Make VMID bits accessible outside of allocator Shameer Kolothum
2021-07-29 10:40 ` [PATCH v3 3/4] KVM: arm64: Align the VMID allocation with the arm64 ASID one Shameer Kolothum
2021-07-29 14:59 ` kernel test robot
2021-07-29 10:40 ` [PATCH v3 4/4] KVM: arm64: Clear active_vmids on vCPU schedule out Shameer Kolothum
2021-08-03 11:40 ` Will Deacon
2021-08-03 12:55 ` Shameerali Kolothum Thodi
2021-08-03 15:30 ` Will Deacon
2021-08-03 15:56 ` Shameerali Kolothum Thodi
2021-08-06 12:24 ` Shameerali Kolothum Thodi
2021-08-09 13:09 ` Will Deacon
2021-08-09 13:48 ` Shameerali Kolothum Thodi
2021-08-11 8:47 ` Shameerali Kolothum Thodi [this message]
2021-10-11 6:06 ` Shameerali Kolothum Thodi
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