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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Felipe Balbi <balbi@kernel.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
	linux-sunxi@googlegroups.com
Subject: Re: [PATCH 4/5] arm64: allwinner: h6: add USB3 device nodes
Date: Tue, 8 May 2018 11:31:27 +0300	[thread overview]
Message-ID: <9a25a561-b643-a77b-3287-8082780fce60@cogentembedded.com> (raw)
In-Reply-To: <20180507151817.55663-5-icenowy@aosc.io>

Hello!

On 5/7/2018 6:18 PM, Icenowy Zheng wrote:

> Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and
> a custom PHY.
> 
> Add device tree nodes for them.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>   arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++
>   1 file changed, 38 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index c72da8cd9ef5..9564c938717c 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -174,6 +174,44 @@
>   			status = "disabled";
>   		};
>   
> +		usb3: usb@5200000 {

    I don't think <unit-address> is allowed for a node having no "reg" prop...

> +			compatible = "allwinner,sun50i-h6-dwc3";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +			clocks = <&ccu CLK_BUS_XHCI>;
> +			clock-names = "bus";
> +			resets = <&ccu RST_BUS_XHCI>;
> +			reset-names = "bus";
> +			status = "disabled";
> +
> +			dwc3: dwc3 {

    Contrariwise, need <unit-address> here...

> +				compatible = "snps,dwc3";
> +				reg = <0x5200000 0x10000>;
> +				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +				/*
> +				 * According to Wink from Allwinner, the
> +				 * USB3 port on H6 is not capable of OTG;
> +				 * the datasheet doesn't mention OTG at all
> +				 * either, so the dr_mode is default to
> +				 * "host" here.
> +				 */
> +				dr_mode = "host";
> +				phys = <&usb3phy>;
> +				phy-names = "usb3-phy";
> +				status = "disabled";
> +			};
> +		};
[...]

MBR, Sergei

  reply	other threads:[~2018-05-08  8:31 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-07 15:18 [PATCH 0/5] Allwinner H6 USB3 support Icenowy Zheng
2018-05-07 15:18 ` [PATCH 1/5] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC Icenowy Zheng
2018-05-22 20:12   ` Rob Herring
2018-05-07 15:18 ` [PATCH 2/5] dt-bindings: usb: add binding for the DWC3 controller on Allwinner SoC Icenowy Zheng
2018-05-07 15:18 ` [PATCH 3/5] usb: dwc3: of-simple: Add compatible for Allwinner H6 platform Icenowy Zheng
2018-05-07 15:18 ` [PATCH 4/5] arm64: allwinner: h6: add USB3 device nodes Icenowy Zheng
2018-05-08  8:31   ` Sergei Shtylyov [this message]
2018-05-22 20:09     ` Rob Herring
2018-05-07 15:18 ` [PATCH 5/5] arm64: allwinner: h6: enable USB3 port on Pine H64 Icenowy Zheng

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