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From: David Laight <David.Laight@ACULAB.COM>
To: 'Yunsheng Lin' <linyunsheng@huawei.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"mst@redhat.com" <mst@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>
Cc: "nickhu@andestech.com" <nickhu@andestech.com>,
	"green.hu@gmail.com" <green.hu@gmail.com>,
	"deanbo422@gmail.com" <deanbo422@gmail.com>,
	"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
	"yury.norov@gmail.com" <yury.norov@gmail.com>,
	"andriy.shevchenko@linux.intel.com" 
	<andriy.shevchenko@linux.intel.com>,
	"ojeda@kernel.org" <ojeda@kernel.org>,
	"ndesaulniers@gooogle.com" <ndesaulniers@gooogle.com>,
	"joe@perches.com" <joe@perches.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"virtualization@lists.linux-foundation.org" 
	<virtualization@lists.linux-foundation.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linuxarm@openeuler.org" <linuxarm@openeuler.org>
Subject: RE: [PATCH v2 3/4] tools headers UAPI: add cpu_relax() implementation for x86 and arm64
Date: Thu, 22 Jul 2021 08:45:42 +0000	[thread overview]
Message-ID: <9e76aac65edc4d88b141d79496ae3fdf@AcuMS.aculab.com> (raw)
In-Reply-To: <9efd2434-feac-a385-f3c5-4a0fb0cc7706@huawei.com>

> > Beware, Intel increased the stall for 'rep nop' in some recent
> > cpu to IIRC about 200 cycles.
> >
> > They even document that this might have a detrimental effect.
> > It is basically far too long for the sort of thing it makes
> > sense to busy-wait for.
> 
> Thanks for the info:)
> I will be beware of that when playing with  'rep nop' in newer
> x86 cpu.

See 8.4.7 Pause Latency in Skylake Microarchitecture in
Intel® 64 and IA-32 Architectures Optimization Reference Manual

The latency of PAUSE instruction in prior generation microarchitecture
is about 10 cycles, whereas on Skylake microarchitecture it has been
extended to as many as 140 cycles.

An earlier section does explain why you need pause though.
One of its effects is to stop the cpu speculatively executing
multiple iterations of the wait look - each with its own
pending read of the memory location that is being looked at.
Unwinding that isn't free - and was particularly expensive on
P4 Netburst - what a surprise, they ran everything except
benchmark looks very slowly.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)

  reply	other threads:[~2021-07-22  8:45 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-20  2:21 [PATCH v2 0/4] refactor the ringtest testing for ptr_ring Yunsheng Lin
2021-07-20  2:21 ` [PATCH v2 1/4] tools headers UAPI: add cache aligning related macro Yunsheng Lin
2021-07-20  2:21 ` [PATCH v2 2/4] tools headers UAPI: add kmalloc/vmalloc related interface Yunsheng Lin
2021-07-20  2:21 ` [PATCH v2 3/4] tools headers UAPI: add cpu_relax() implementation for x86 and arm64 Yunsheng Lin
2021-07-21 20:53   ` David Laight
2021-07-22  8:18     ` Yunsheng Lin
2021-07-22  8:45       ` David Laight [this message]
2021-07-20  2:21 ` [PATCH v2 4/4] tools/virtio: use common infrastructure to build ptr_ring.h Yunsheng Lin

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