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* [RESEND PATCH] dcdbas: force SMI to happen when expected
@ 2011-02-07 21:59 Stuart Hayes
  0 siblings, 0 replies; only message in thread
From: Stuart Hayes @ 2011-02-07 21:59 UTC (permalink / raw)
  To: linux-kernel, douglas_warzecha, shyam_iyer

Resending from a different email address so I don't have to attach the
patch as a file.

The dcdbas driver can do an I/O write to cause a SMI to occur.  On some sys=
tems I/O writes are posted in the chipset and don't complete immediately.  =
This can result in the SMI happening at a later time.  This can result in r=
andom failures since the SMI handler expects the EBX register to contain a =
pointer, and the handler can write to memory.

Performing an I/O read to the same address as the I/O write will force the =
I/O write to complete.  The patch is against the 2.6.37 kernel and has been=

Signed-off-by: Stuart Hayes <>
Acked-by: Doug Warzecha <>
diff -purN linux-2.6.37/drivers/firmware/dcdbas.c
--- linux-2.6.37/drivers/firmware/dcdbas.c    2011-01-18
10:44:44.869882461 -0500
+++ linux-2.6.37_test/drivers/firmware/dcdbas.c    2011-01-18
10:41:15.404612154 -0500
@@ -278,6 +278,9 @@ int dcdbas_smi_request(struct smi_cmd *s
         : "memory"

+    /* read to force posted write through and make SMI happen now */
+    inb(smi_cmd->command_address);
     set_cpus_allowed_ptr(current, old_mask);

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2011-02-07 21:59 [RESEND PATCH] dcdbas: force SMI to happen when expected Stuart Hayes

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