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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Jonathan Hunter <jonathanh@nvidia.com>,
	"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	"broonie@kernel.org" <broonie@kernel.org>,
	Krishna Yarlagadda <kyarlagadda@nvidia.com>
Cc: "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>
Subject: RE: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS
Date: Tue, 14 May 2019 17:18:48 +0000	[thread overview]
Message-ID: <BYAPR12MB33986B88CF3A30036E3F1F04C2080@BYAPR12MB3398.namprd12.prod.outlook.com> (raw)
In-Reply-To: <cf4bd167-49b8-5649-a2e2-7bf5ddcc6e2d@nvidia.com>

> Subject: Re: [PATCH V5 1/4] spi: tegra114: add support for gpio based CS

> On 14/05/2019 06:03, Sowjanya Komatineni wrote:
> > This patch adds support for GPIO based CS control through SPI core 
> > function spi_set_cs.
> > 
> > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> Can you elaborate on the use-case where this is needed? I am curious what platforms are using this and why they would not use the dedicated CS signals.
>
> Cheers
> Jon

Tegra SPI doesn’t support inter byte delay directly to meet some SPI slave requirements.
So we use GPIO control CS in parallel with a dummy HW CS and use inactive cycles delay of SPI controller to mimic inter byte delay.

Currently we don’t have specific SPI slave on upstream supported platforms but considering raspberry PI header where SPI I/F is exposed to pins it allows user to connect any SPI slave and this helps for some slaves that need specific inter byte delay.

Thanks
sowjanya

  reply	other threads:[~2019-05-14 17:18 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-14  5:03 [PATCH V5 0/4] additional features to Tegra SPI Sowjanya Komatineni
2019-05-14  5:03 ` [PATCH V5 1/4] spi: tegra114: add support for gpio based CS Sowjanya Komatineni
2019-05-14  9:33   ` Jon Hunter
2019-05-14 17:18     ` Sowjanya Komatineni [this message]
2019-05-14 17:31       ` Jon Hunter
2019-05-15  9:35       ` Mark Brown
2019-05-15 11:24         ` Sowjanya Komatineni
2019-05-15 11:29           ` Mark Brown
     [not found]             ` <BYAPR12MB3398528B86D3DE9CC3AA6D85C2090@BYAPR12MB3398.namprd12.prod.outlook.com>
2019-05-15 11:42               ` Mark Brown
2019-05-15 11:18   ` Applied "spi: tegra114: add support for gpio based CS" to the spi tree Mark Brown
2019-05-14  5:03 ` [PATCH V5 2/4] spi: tegra114: add support for hw based cs Sowjanya Komatineni
2019-05-15 11:18   ` Applied "spi: tegra114: add support for hw based cs" to the spi tree Mark Brown
2019-05-14  5:03 ` [PATCH V5 3/4] spi: tegra114: add support for HW CS timing Sowjanya Komatineni
2019-05-15 11:18   ` Applied "spi: tegra114: add support for HW CS timing" to the spi tree Mark Brown
2019-05-14  5:03 ` [PATCH V5 4/4] spi: tegra114: add support for TX and RX trimmers Sowjanya Komatineni
2019-05-15 11:18   ` Applied "spi: tegra114: add support for TX and RX trimmers" to the spi tree Mark Brown
2019-05-23  1:02   ` [PATCH V5 4/4] spi: tegra114: add support for TX and RX trimmers Nathan Chancellor
2019-05-23  1:10     ` Sowjanya Komatineni

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