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From: "Bae, Chang Seok" <chang.seok.bae@intel.com>
To: "Mika Penttilä" <mika.penttila@nextfour.com>,
	"Andy Lutomirski" <luto@kernel.org>,
	"H . Peter Anvin" <hpa@zytor.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"Metzger, Markus T" <markus.t.metzger@intel.com>,
	"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 6/6] x86/vdso: Move out the CPU number store
Date: Tue, 5 Jun 2018 04:44:16 +0000	[thread overview]
Message-ID: <C62C3F95-0DD4-4B66-89A8-4FAB819C8A70@intel.com> (raw)
In-Reply-To: <8a41304a-3517-003a-badf-1ba8f7ababe4@nextfour.com>

>> diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
>> index ea554f8..e716e94 100644
>> --- a/arch/x86/kernel/setup_percpu.c
>> +++ b/arch/x86/kernel/setup_percpu.c
>> @@ -155,12 +155,21 @@ static void __init pcpup_populate_pte(unsigned long addr)
>>  
>>  static inline void setup_percpu_segment(int cpu)
>>  {
>> -#ifdef CONFIG_X86_32
>> -	struct desc_struct d = GDT_ENTRY_INIT(0x8092, per_cpu_offset(cpu),
>> -					      0xFFFFF);
>> +#ifdef CONFIG_NUMA
>> +	unsigned long node = early_cpu_to_node(cpu);
>> +#else
>> +	unsigned long node = 0;
>> +#endif
>> +	struct desc_struct d = GDT_ENTRY_INIT(0x0, per_cpu_offset(cpu),
>> +			   make_lsl_tscp(cpu, node));
>> +
>> +	d.type = 5;	/* R0 data, expand down, accessed */
>> +	d.dpl = 3;	/* Visible to user code */
>> +	d.s = 1;	/* Not a system segment */
>> +	d.p = 1;	/* Present */
>> +	d.d = 1;	/* 32-bit */
>>  
>>  	write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_PERCPU, &d, DESCTYPE_S);
>> -#endif
>>  }

> This won't work on X86-32 because it actually uses the segment limit with fs: access. So there 
> is a reason why the lsl based method is X86-64 only.

The limit will be consumed in X86-64 only, while the unification with i386 was suggested for a
different reason.

Thanks,
Chang

  reply	other threads:[~2018-06-05  4:44 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-04 19:24 [PATCH 0/6] x86: infrastructure to enable FSGSBASE Chang S. Bae
2018-06-04 19:24 ` [PATCH 1/6] x86/fsgsbase/64: Introduce FS/GS base helper functions Chang S. Bae
2018-06-04 19:24 ` [PATCH 2/6] x86/fsgsbase/64: Make ptrace read FS/GS base accurately Chang S. Bae
2018-06-04 19:24 ` [PATCH 3/6] x86/fsgsbase/64: Use FS/GS base helpers in core dump Chang S. Bae
2018-06-04 19:24 ` [PATCH 4/6] x86/fsgsbase/64: Factor out load FS/GS segments from __switch_to Chang S. Bae
2018-06-04 19:24 ` [PATCH 5/6] x86/msr: write_rdtscp_aux() to use wrmsr_safe() Chang S. Bae
2018-06-04 19:24 ` [PATCH 6/6] x86/vdso: Move out the CPU number store Chang S. Bae
2018-06-05  3:57   ` Mika Penttilä
2018-06-05  4:44     ` Bae, Chang Seok [this message]
2018-06-05  5:19       ` Mika Penttilä
2018-06-05  5:36     ` H. Peter Anvin
2018-06-05  6:03       ` Mika Penttilä
2018-06-05 10:22       ` Andy Lutomirski
2018-06-13  6:53   ` [lkp-robot] [x86/vdso] ab1bcc4420: BUG:kernel_hang_in_boot_stage kernel test robot

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