64 B burst transaction on PCIe core with CPU

64 B burst transaction on PCIe core with CPU

[Kallol Biswas]

Hi,
   I am trying to test a memory device that does not have DMA engine
working yet.

The memory on the device can be accessed in multiples of 64 bytes.

The code below does 64 B burst write on PCIe bus.

int  wcbytes[16];

dev->bar = ioremap_wc(pci_resource_start(pdev, 0), size);

for(i=0;i<16;i++) {
            *(unsigned int *)(dev->bar+i*4) = wcbytes[i];
}
wmb();

Basically, I buildup writes and do a wmb(). It works.

How can I generate 64 B burst read on PCIe bus from CPU?

Kallol
NucleoDyne Systems, Inc.