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* [PATCH v2 00/11] Improvements to Tegra-based Chromebook support
@ 2015-01-15 16:12 Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 01/11] ARM: tegra: Add node for trackpad in Nyan boards Tomeu Vizoso
                   ` (12 more replies)
  0 siblings, 13 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, linux-kernel

Hi,

this started as adding support for the Nyan Blaze, but the Big is so similar to it that I thought it would be better to have both in the same series.

With these changes, I get wifi, trackpad, audio playback and recording (with the internal mic) working in both machines.

Patches 2 and 7 use the pinmux data as generated by tegra-pinmux-scripts. I will be sending patches adding the configs for the boards to it. I have chosen to copy the whole pinmux data to each leaf .dts even if they are very similar because it will be easier that way to check in the future that they match the canonical data in tegra-pinmux-scripts.

Patch 3 changes the nvidia,model of the sound card, so that the exposed card name is GoogleNyan instead of just "A13" as it was before. I'm leaning towards having just one UCM config for both machines, but I'm not totally convinced of it and would love to hear other opinions.

Patches 8 and 9 depend on Ulf's pwrseq series [0].

http://cgit.collabora.com/git/user/tomeu/linux.git/log/?h=nyan-v2

[0] http://thread.gmane.org/gmane.linux.kernel.mmc/30611

Stéphane Marchesin (1):
  drm/panel: add support for Samsung LTN140AT29 panel

Tomeu Vizoso (10):
  ARM: tegra: Add node for trackpad in Nyan boards
  ARM: tegra: Use the generated pinmux data
  ARM: tegra: Set the sound card model that alsaucm expects
  ARM: tegra: Set spi-max-frequency property to flash node
  ARM: tegra: Move out nyan-generic parts out from the nyan-big DT
  ARM: tegra: Add DTS for the nyan-blaze board
  mmc: pwrseq_simple: Add support for a delay
  ARM: tegra: Use pwrseq-simple for the wifi in Nyan
  ASoC: tegra: Add a control for the headphone switch
  ASoC: tegra: add sink for the internal mic to tegra_max98090

 .../devicetree/bindings/mmc/mmc,pwrseq-simple.txt  |    2 +
 .../bindings/sound/nvidia,tegra-audio-max98090.txt |    1 +
 arch/arm/boot/dts/Makefile                         |    1 +
 arch/arm/boot/dts/tegra124-nyan-big.dts            | 2112 +++++++++++---------
 arch/arm/boot/dts/tegra124-nyan-blaze.dts          | 1325 ++++++++++++
 arch/arm/boot/dts/tegra124-nyan.dtsi               |  692 +++++++
 drivers/gpu/drm/panel/panel-simple.c               |   26 +
 drivers/mmc/core/pwrseq_simple.c                   |    8 +
 sound/soc/tegra/tegra_max98090.c                   |    3 +
 9 files changed, 3209 insertions(+), 961 deletions(-)
 create mode 100644 arch/arm/boot/dts/tegra124-nyan-blaze.dts
 create mode 100644 arch/arm/boot/dts/tegra124-nyan.dtsi

-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 01/11] ARM: tegra: Add node for trackpad in Nyan boards
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data Tomeu Vizoso
                   ` (11 subsequent siblings)
  12 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

The Nyan boards have a eKTH3000 from Elan as their trackpad, connected
through I2C.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan-big.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 004e8e4..e953fe2 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -526,6 +526,14 @@
 	i2c@0,7000c400 {
 		status = "okay";
 		clock-frequency = <100000>;
+
+		trackpad@15 {
+			compatible = "elan,ekth3000";
+			reg = <0x15>;
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
+			wakeup-source;
+		};
 	};
 
 	i2c@0,7000c500 {
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 01/11] ARM: tegra: Add node for trackpad in Nyan boards Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:25   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects Tomeu Vizoso
                   ` (10 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

Google has submitted a board config for the pinmux programming of the
Nyan Big board. Use the whole of it as it's generated to make it easier
to update as the configuration gets fixed in the future.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan-big.dts | 1438 ++++++++++++++++++++++++-------
 1 file changed, 1149 insertions(+), 289 deletions(-)

diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index e953fe2..43e58a4 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -48,448 +48,1308 @@
 		pinctrl-0 = <&pinmux_default>;
 
 		pinmux_default: common {
-			dap_mclk1_pw4 {
-				nvidia,pins = "dap_mclk1_pw4";
-				nvidia,function = "extperiph1";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			clk_32k_out_pa0 {
+				nvidia,pins = "clk_32k_out_pa0";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			dap2_din_pa4 {
-				nvidia,pins = "dap2_din_pa4";
-				nvidia,function = "i2s1";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			dap2_dout_pa5 {
-				nvidia,pins = "dap2_dout_pa5",
-					      "dap2_fs_pa2",
-					      "dap2_sclk_pa3";
-				nvidia,function = "i2s1";
+			uart3_cts_n_pa1 {
+				nvidia,pins = "uart3_cts_n_pa1";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			dvfs_pwm_px0 {
-				nvidia,pins = "dvfs_pwm_px0",
-					      "dvfs_clk_px2";
-				nvidia,function = "cldvfs";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			dap2_fs_pa2 {
+				nvidia,pins = "dap2_fs_pa2";
+				nvidia,function = "i2s1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			ulpi_clk_py0 {
-				nvidia,pins = "ulpi_clk_py0",
-					      "ulpi_nxt_py2",
-					      "ulpi_stp_py3";
-				nvidia,function = "spi1";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			dap2_sclk_pa3 {
+				nvidia,pins = "dap2_sclk_pa3";
+				nvidia,function = "i2s1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			ulpi_dir_py1 {
-				nvidia,pins = "ulpi_dir_py1";
-				nvidia,function = "spi1";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			cam_i2c_scl_pbb1 {
-				nvidia,pins = "cam_i2c_scl_pbb1",
-					      "cam_i2c_sda_pbb2";
-				nvidia,function = "i2c3";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			dap2_din_pa4 {
+				nvidia,pins = "dap2_din_pa4";
+				nvidia,function = "i2s1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
-			};
-			gen2_i2c_scl_pt5 {
-				nvidia,pins = "gen2_i2c_scl_pt5",
-					      "gen2_i2c_sda_pt6";
-				nvidia,function = "i2c2";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 			};
-			pg4 {
-				nvidia,pins = "pg4",
-					      "pg5",
-					      "pg6",
-					      "pi3";
-				nvidia,function = "spi4";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			dap2_dout_pa5 {
+				nvidia,pins = "dap2_dout_pa5";
+				nvidia,function = "i2s1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			pg7 {
-				nvidia,pins = "pg7";
-				nvidia,function = "spi4";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			ph1 {
-				nvidia,pins = "ph1";
-				nvidia,function = "pwm1";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			sdmmc3_clk_pa6 {
+				nvidia,pins = "sdmmc3_clk_pa6";
+				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			pk0 {
-				nvidia,pins = "pk0",
-					      "kb_row15_ps7",
-					      "clk_32k_out_pa0";
-				nvidia,function = "soc";
+			sdmmc3_cmd_pa7 {
+				nvidia,pins = "sdmmc3_cmd_pa7";
+				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			sdmmc1_clk_pz0 {
-				nvidia,pins = "sdmmc1_clk_pz0";
-				nvidia,function = "sdmmc1";
+			pb0 {
+				nvidia,pins = "pb0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			sdmmc1_cmd_pz1 {
-				nvidia,pins = "sdmmc1_cmd_pz1",
-					      "sdmmc1_dat0_py7",
-					      "sdmmc1_dat1_py6",
-					      "sdmmc1_dat2_py5",
-					      "sdmmc1_dat3_py4";
-				nvidia,function = "sdmmc1";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+			pb1 {
+				nvidia,pins = "pb1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			sdmmc3_clk_pa6 {
-				nvidia,pins = "sdmmc3_clk_pa6";
+			sdmmc3_dat3_pb4 {
+				nvidia,pins = "sdmmc3_dat3_pb4";
 				nvidia,function = "sdmmc3";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			sdmmc3_cmd_pa7 {
-				nvidia,pins = "sdmmc3_cmd_pa7",
-					      "sdmmc3_dat0_pb7",
-					      "sdmmc3_dat1_pb6",
-					      "sdmmc3_dat2_pb5",
-					      "sdmmc3_dat3_pb4",
-					      "kb_col4_pq4",
-					      "sdmmc3_clk_lb_out_pee4",
-					      "sdmmc3_clk_lb_in_pee5",
-					      "sdmmc3_cd_n_pv2";
+			sdmmc3_dat2_pb5 {
+				nvidia,pins = "sdmmc3_dat2_pb5";
 				nvidia,function = "sdmmc3";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			sdmmc4_clk_pcc4 {
-				nvidia,pins = "sdmmc4_clk_pcc4";
-				nvidia,function = "sdmmc4";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			sdmmc4_cmd_pt7 {
-				nvidia,pins = "sdmmc4_cmd_pt7",
-					      "sdmmc4_dat0_paa0",
-					      "sdmmc4_dat1_paa1",
-					      "sdmmc4_dat2_paa2",
-					      "sdmmc4_dat3_paa3",
-					      "sdmmc4_dat4_paa4",
-					      "sdmmc4_dat5_paa5",
-					      "sdmmc4_dat6_paa6",
-					      "sdmmc4_dat7_paa7";
-				nvidia,function = "sdmmc4";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			sdmmc3_dat1_pb6 {
+				nvidia,pins = "sdmmc3_dat1_pb6";
+				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			pwr_i2c_scl_pz6 {
-				nvidia,pins = "pwr_i2c_scl_pz6",
-					      "pwr_i2c_sda_pz7";
-				nvidia,function = "i2cpwr";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 			};
-			jtag_rtck {
-				nvidia,pins = "jtag_rtck";
-				nvidia,function = "rtck";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			sdmmc3_dat0_pb7 {
+				nvidia,pins = "sdmmc3_dat0_pb7";
+				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			clk_32k_in {
-				nvidia,pins = "clk_32k_in";
-				nvidia,function = "clk";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			core_pwr_req {
-				nvidia,pins = "core_pwr_req";
-				nvidia,function = "pwron";
+			uart3_rts_n_pc0 {
+				nvidia,pins = "uart3_rts_n_pc0";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			cpu_pwr_req {
-				nvidia,pins = "cpu_pwr_req";
-				nvidia,function = "cpu";
+			uart2_txd_pc2 {
+				nvidia,pins = "uart2_txd_pc2";
+				nvidia,function = "irda";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			pwr_int_n {
-				nvidia,pins = "pwr_int_n";
-				nvidia,function = "pmi";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-			};
-			reset_out_n {
-				nvidia,pins = "reset_out_n";
-				nvidia,function = "reset_out_n";
+			uart2_rxd_pc3 {
+				nvidia,pins = "uart2_rxd_pc3";
+				nvidia,function = "irda";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
-			clk3_out_pee0 {
-				nvidia,pins = "clk3_out_pee0";
-				nvidia,function = "extperiph3";
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			gen1_i2c_scl_pc4 {
+				nvidia,pins = "gen1_i2c_scl_pc4";
+				nvidia,function = "i2c1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 			};
 			gen1_i2c_sda_pc5 {
-				nvidia,pins = "gen1_i2c_sda_pc5",
-					      "gen1_i2c_scl_pc4";
+				nvidia,pins = "gen1_i2c_sda_pc5";
 				nvidia,function = "i2c1";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 			};
-			hdmi_cec_pee3 {
-				nvidia,pins = "hdmi_cec_pee3";
-				nvidia,function = "cec";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			pc7 {
+				nvidia,pins = "pc7";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
-			};
-			hdmi_int_pn7 {
-				nvidia,pins = "hdmi_int_pn7";
-				nvidia,function = "rsvd1";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+			};
+			pg0 {
+				nvidia,pins = "pg0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			ddc_scl_pv4 {
-				nvidia,pins = "ddc_scl_pv4",
-					      "ddc_sda_pv5";
-				nvidia,function = "i2c4";
+			pg1 {
+				nvidia,pins = "pg1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg2 {
+				nvidia,pins = "pg2";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			kb_row10_ps2 {
-				nvidia,pins = "kb_row10_ps2";
-				nvidia,function = "uarta";
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+			pg3 {
+				nvidia,pins = "pg3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			kb_row9_ps1 {
-				nvidia,pins = "kb_row9_ps1";
-				nvidia,function = "uarta";
+			pg4 {
+				nvidia,pins = "pg4";
+				nvidia,function = "spi4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			usb_vbus_en0_pn4 {
-				nvidia,pins = "usb_vbus_en0_pn4",
-					      "usb_vbus_en1_pn5";
-				nvidia,function = "usb";
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			pg5 {
+				nvidia,pins = "pg5";
+				nvidia,function = "spi4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,lock = <TEGRA_PIN_DISABLE>;
-				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			drive_sdio1 {
-				nvidia,pins = "drive_sdio1";
-				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
-				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-				nvidia,pull-down-strength = <36>;
-				nvidia,pull-up-strength = <20>;
-				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
-				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
-			};
-			drive_sdio3 {
-				nvidia,pins = "drive_sdio3";
-				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
-				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-				nvidia,pull-down-strength = <22>;
-				nvidia,pull-up-strength = <36>;
-				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
-				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
-			};
-			drive_gma {
-				nvidia,pins = "drive_gma";
-				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
-				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
-				nvidia,pull-down-strength = <2>;
-				nvidia,pull-up-strength = <1>;
-				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
-				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
-				nvidia,drive-type = <1>;
-			};
-			codec_irq_l {
-				nvidia,pins = "ph4";
-				nvidia,function = "gmi";
+			pg6 {
+				nvidia,pins = "pg6";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pg7 {
+				nvidia,pins = "pg7";
+				nvidia,function = "spi4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			lcd_bl_en {
-				nvidia,pins = "ph2";
+			ph0 {
+				nvidia,pins = "ph0";
 				nvidia,function = "gmi";
 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			touch_irq_l {
-				nvidia,pins = "gpio_w3_aud_pw3";
-				nvidia,function = "spi6";
+			ph1 {
+				nvidia,pins = "ph1";
+				nvidia,function = "pwm1";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			tpm_davint_l {
-				nvidia,pins = "ph6";
-				nvidia,function = "gmi";
+			ph2 {
+				nvidia,pins = "ph2";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			ts_irq_l {
-				nvidia,pins = "pk2";
+			ph3 {
+				nvidia,pins = "ph3";
 				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ph4 {
+				nvidia,pins = "ph4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			ts_reset_l {
-				nvidia,pins = "pk4";
-				nvidia,function = "gmi";
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+			ph5 {
+				nvidia,pins = "ph5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			ts_shdn_l {
-				nvidia,pins = "pk1";
-				nvidia,function = "gmi";
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+			ph6 {
+				nvidia,pins = "ph6";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			ph7 {
 				nvidia,pins = "ph7";
-				nvidia,function = "gmi";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			kb_col0_ap {
-				nvidia,pins = "kb_col0_pq0";
-				nvidia,function = "rsvd4";
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+			pi0 {
+				nvidia,pins = "pi0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			lid_open {
-				nvidia,pins = "kb_row4_pr4";
-				nvidia,function = "rsvd3";
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+			pi1 {
+				nvidia,pins = "pi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			en_vdd_sd {
-				nvidia,pins = "kb_row0_pr0";
+			pi2 {
+				nvidia,pins = "pi2";
 				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi3 {
+				nvidia,pins = "pi3";
+				nvidia,function = "spi4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			ac_ok {
-				nvidia,pins = "pj0";
+			pi4 {
+				nvidia,pins = "pi4";
 				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi5 {
+				nvidia,pins = "pi5";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			sensor_irq_l {
+			pi6 {
 				nvidia,pins = "pi6";
-				nvidia,function = "gmi";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			wifi_en {
-				nvidia,pins = "gpio_x7_aud_px7";
-				nvidia,function = "rsvd4";
+			pi7 {
+				nvidia,pins = "pi7";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
-				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			en_vdd_bl {
-				nvidia,pins = "dap3_dout_pp2";
-				nvidia,function = "i2s2";
-				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+			pj0 {
+				nvidia,pins = "pj0";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pj2 {
+				nvidia,pins = "pj2";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			en_vdd_hdmi {
-				nvidia,pins = "spdif_in_pk6";
-				nvidia,function = "spdif";
+			uart2_cts_n_pj5 {
+				nvidia,pins = "uart2_cts_n_pj5";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart2_rts_n_pj6 {
+				nvidia,pins = "uart2_rts_n_pj6";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pj7 {
+				nvidia,pins = "pj7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pk0 {
+				nvidia,pins = "pk0";
+				nvidia,function = "rsvd1";
 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk1 {
+				nvidia,pins = "pk1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			soc_warm_reset_l {
-				nvidia,pins = "pi5";
+			pk2 {
+				nvidia,pins = "pk2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pk3 {
+				nvidia,pins = "pk3";
 				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk4 {
+				nvidia,pins = "pk4";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 			};
-			hp_det_l {
-				nvidia,pins = "pi7";
-				nvidia,function = "rsvd1";
+			spdif_out_pk5 {
+				nvidia,pins = "spdif_out_pk5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			spdif_in_pk6 {
+				nvidia,pins = "spdif_in_pk6";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk7 {
+				nvidia,pins = "pk7";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
-			mic_det_l {
-				nvidia,pins = "kb_row7_pr7";
+			dap1_fs_pn0 {
+				nvidia,pins = "dap1_fs_pn0";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_din_pn1 {
+				nvidia,pins = "dap1_din_pn1";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_dout_pn2 {
+				nvidia,pins = "dap1_dout_pn2";
+				nvidia,function = "i2s0";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_sclk_pn3 {
+				nvidia,pins = "dap1_sclk_pn3";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			usb_vbus_en0_pn4 {
+				nvidia,pins = "usb_vbus_en0_pn4";
+				nvidia,function = "usb";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			usb_vbus_en1_pn5 {
+				nvidia,pins = "usb_vbus_en1_pn5";
+				nvidia,function = "usb";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			hdmi_int_pn7 {
+				nvidia,pins = "hdmi_int_pn7";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data7_po0 {
+				nvidia,pins = "ulpi_data7_po0";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data0_po1 {
+				nvidia,pins = "ulpi_data0_po1";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data1_po2 {
+				nvidia,pins = "ulpi_data1_po2";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data2_po3 {
+				nvidia,pins = "ulpi_data2_po3";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data3_po4 {
+				nvidia,pins = "ulpi_data3_po4";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data4_po5 {
+				nvidia,pins = "ulpi_data4_po5";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data5_po6 {
+				nvidia,pins = "ulpi_data5_po6";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data6_po7 {
+				nvidia,pins = "ulpi_data6_po7";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_fs_pp0 {
+				nvidia,pins = "dap3_fs_pp0";
+				nvidia,function = "i2s2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_din_pp1 {
+				nvidia,pins = "dap3_din_pp1";
+				nvidia,function = "i2s2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_dout_pp2 {
+				nvidia,pins = "dap3_dout_pp2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_sclk_pp3 {
+				nvidia,pins = "dap3_sclk_pp3";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_fs_pp4 {
+				nvidia,pins = "dap4_fs_pp4";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_din_pp5 {
+				nvidia,pins = "dap4_din_pp5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_dout_pp6 {
+				nvidia,pins = "dap4_dout_pp6";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_sclk_pp7 {
+				nvidia,pins = "dap4_sclk_pp7";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col0_pq0 {
+				nvidia,pins = "kb_col0_pq0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col1_pq1 {
+				nvidia,pins = "kb_col1_pq1";
 				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col2_pq2 {
+				nvidia,pins = "kb_col2_pq2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col3_pq3 {
+				nvidia,pins = "kb_col3_pq3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col4_pq4 {
+				nvidia,pins = "kb_col4_pq4";
+				nvidia,function = "sdmmc3";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
+			kb_col5_pq5 {
+				nvidia,pins = "kb_col5_pq5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col6_pq6 {
+				nvidia,pins = "kb_col6_pq6";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col7_pq7 {
+				nvidia,pins = "kb_col7_pq7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row0_pr0 {
+				nvidia,pins = "kb_row0_pr0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row1_pr1 {
+				nvidia,pins = "kb_row1_pr1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row2_pr2 {
+				nvidia,pins = "kb_row2_pr2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row3_pr3 {
+				nvidia,pins = "kb_row3_pr3";
+				nvidia,function = "kbc";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row4_pr4 {
+				nvidia,pins = "kb_row4_pr4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row5_pr5 {
+				nvidia,pins = "kb_row5_pr5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row6_pr6 {
+				nvidia,pins = "kb_row6_pr6";
+				nvidia,function = "kbc";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row7_pr7 {
+				nvidia,pins = "kb_row7_pr7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row8_ps0 {
+				nvidia,pins = "kb_row8_ps0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row9_ps1 {
+				nvidia,pins = "kb_row9_ps1";
+				nvidia,function = "uarta";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row10_ps2 {
+				nvidia,pins = "kb_row10_ps2";
+				nvidia,function = "uarta";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row11_ps3 {
+				nvidia,pins = "kb_row11_ps3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row12_ps4 {
+				nvidia,pins = "kb_row12_ps4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row13_ps5 {
+				nvidia,pins = "kb_row13_ps5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row14_ps6 {
+				nvidia,pins = "kb_row14_ps6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row15_ps7 {
+				nvidia,pins = "kb_row15_ps7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row16_pt0 {
+				nvidia,pins = "kb_row16_pt0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row17_pt1 {
+				nvidia,pins = "kb_row17_pt1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			gen2_i2c_scl_pt5 {
+				nvidia,pins = "gen2_i2c_scl_pt5";
+				nvidia,function = "i2c2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			gen2_i2c_sda_pt6 {
+				nvidia,pins = "gen2_i2c_sda_pt6";
+				nvidia,function = "i2c2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_cmd_pt7 {
+				nvidia,pins = "sdmmc4_cmd_pt7";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu0 {
+				nvidia,pins = "pu0";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu1 {
+				nvidia,pins = "pu1";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu2 {
+				nvidia,pins = "pu2";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu3 {
+				nvidia,pins = "pu3";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu4 {
+				nvidia,pins = "pu4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu5 {
+				nvidia,pins = "pu5";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu6 {
+				nvidia,pins = "pu6";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pv0 {
+				nvidia,pins = "pv0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pv1 {
+				nvidia,pins = "pv1";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc3_cd_n_pv2 {
+				nvidia,pins = "sdmmc3_cd_n_pv2";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_wp_n_pv3 {
+				nvidia,pins = "sdmmc1_wp_n_pv3";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ddc_scl_pv4 {
+				nvidia,pins = "ddc_scl_pv4";
+				nvidia,function = "i2c4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			ddc_sda_pv5 {
+				nvidia,pins = "ddc_sda_pv5";
+				nvidia,function = "i2c4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_w2_aud_pw2 {
+				nvidia,pins = "gpio_w2_aud_pw2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_w3_aud_pw3 {
+				nvidia,pins = "gpio_w3_aud_pw3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap_mclk1_pw4 {
+				nvidia,pins = "dap_mclk1_pw4";
+				nvidia,function = "extperiph1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk2_out_pw5 {
+				nvidia,pins = "clk2_out_pw5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart3_txd_pw6 {
+				nvidia,pins = "uart3_txd_pw6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart3_rxd_pw7 {
+				nvidia,pins = "uart3_rxd_pw7";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dvfs_pwm_px0 {
+				nvidia,pins = "dvfs_pwm_px0";
+				nvidia,function = "cldvfs";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x1_aud_px1 {
+				nvidia,pins = "gpio_x1_aud_px1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dvfs_clk_px2 {
+				nvidia,pins = "dvfs_clk_px2";
+				nvidia,function = "cldvfs";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x3_aud_px3 {
+				nvidia,pins = "gpio_x3_aud_px3";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x4_aud_px4 {
+				nvidia,pins = "gpio_x4_aud_px4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			gpio_x5_aud_px5 {
+				nvidia,pins = "gpio_x5_aud_px5";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x6_aud_px6 {
+				nvidia,pins = "gpio_x6_aud_px6";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x7_aud_px7 {
+				nvidia,pins = "gpio_x7_aud_px7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_clk_py0 {
+				nvidia,pins = "ulpi_clk_py0";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_dir_py1 {
+				nvidia,pins = "ulpi_dir_py1";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ulpi_nxt_py2 {
+				nvidia,pins = "ulpi_nxt_py2";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_stp_py3 {
+				nvidia,pins = "ulpi_stp_py3";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc1_dat3_py4 {
+				nvidia,pins = "sdmmc1_dat3_py4";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat2_py5 {
+				nvidia,pins = "sdmmc1_dat2_py5";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat1_py6 {
+				nvidia,pins = "sdmmc1_dat1_py6";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat0_py7 {
+				nvidia,pins = "sdmmc1_dat0_py7";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_clk_pz0 {
+				nvidia,pins = "sdmmc1_clk_pz0";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_cmd_pz1 {
+				nvidia,pins = "sdmmc1_cmd_pz1";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pwr_i2c_scl_pz6 {
+				nvidia,pins = "pwr_i2c_scl_pz6";
+				nvidia,function = "i2cpwr";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			pwr_i2c_sda_pz7 {
+				nvidia,pins = "pwr_i2c_sda_pz7";
+				nvidia,function = "i2cpwr";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat0_paa0 {
+				nvidia,pins = "sdmmc4_dat0_paa0";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat1_paa1 {
+				nvidia,pins = "sdmmc4_dat1_paa1";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat2_paa2 {
+				nvidia,pins = "sdmmc4_dat2_paa2";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat3_paa3 {
+				nvidia,pins = "sdmmc4_dat3_paa3";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat4_paa4 {
+				nvidia,pins = "sdmmc4_dat4_paa4";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat5_paa5 {
+				nvidia,pins = "sdmmc4_dat5_paa5";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat6_paa6 {
+				nvidia,pins = "sdmmc4_dat6_paa6";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat7_paa7 {
+				nvidia,pins = "sdmmc4_dat7_paa7";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pbb0 {
+				nvidia,pins = "pbb0";
+				nvidia,function = "vgp6";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cam_i2c_scl_pbb1 {
+				nvidia,pins = "cam_i2c_scl_pbb1";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			cam_i2c_sda_pbb2 {
+				nvidia,pins = "cam_i2c_sda_pbb2";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			pbb3 {
+				nvidia,pins = "pbb3";
+				nvidia,function = "vgp3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb4 {
+				nvidia,pins = "pbb4";
+				nvidia,function = "vgp4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb5 {
+				nvidia,pins = "pbb5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb6 {
+				nvidia,pins = "pbb6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb7 {
+				nvidia,pins = "pbb7";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cam_mclk_pcc0 {
+				nvidia,pins = "cam_mclk_pcc0";
+				nvidia,function = "vi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pcc1 {
+				nvidia,pins = "pcc1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pcc2 {
+				nvidia,pins = "pcc2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc4_clk_pcc4 {
+				nvidia,pins = "sdmmc4_clk_pcc4";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			clk2_req_pcc5 {
+				nvidia,pins = "clk2_req_pcc5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l0_rst_n_pdd1 {
+				nvidia,pins = "pex_l0_rst_n_pdd1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l0_clkreq_n_pdd2 {
+				nvidia,pins = "pex_l0_clkreq_n_pdd2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_wake_n_pdd3 {
+				nvidia,pins = "pex_wake_n_pdd3";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l1_rst_n_pdd5 {
+				nvidia,pins = "pex_l1_rst_n_pdd5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l1_clkreq_n_pdd6 {
+				nvidia,pins = "pex_l1_clkreq_n_pdd6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk3_out_pee0 {
+				nvidia,pins = "clk3_out_pee0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk3_req_pee1 {
+				nvidia,pins = "clk3_req_pee1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap_mclk1_req_pee2 {
+				nvidia,pins = "dap_mclk1_req_pee2";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			hdmi_cec_pee3 {
+				nvidia,pins = "hdmi_cec_pee3";
+				nvidia,function = "cec";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_clk_lb_out_pee4 {
+				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_clk_lb_in_pee5 {
+				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dp_hpd_pff0 {
+				nvidia,pins = "dp_hpd_pff0";
+				nvidia,function = "dp";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			usb_vbus_en2_pff1 {
+				nvidia,pins = "usb_vbus_en2_pff1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			pff2 {
+				nvidia,pins = "pff2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			core_pwr_req {
+				nvidia,pins = "core_pwr_req";
+				nvidia,function = "pwron";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cpu_pwr_req {
+				nvidia,pins = "cpu_pwr_req";
+				nvidia,function = "cpu";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pwr_int_n {
+				nvidia,pins = "pwr_int_n";
+				nvidia,function = "pmi";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			reset_out_n {
+				nvidia,pins = "reset_out_n";
+				nvidia,function = "reset_out_n";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			owr {
+				nvidia,pins = "owr";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			clk_32k_in {
+				nvidia,pins = "clk_32k_in";
+				nvidia,function = "clk";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			jtag_rtck {
+				nvidia,pins = "jtag_rtck";
+				nvidia,function = "rtck";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
 		};
 	};
 
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 01/11] ARM: tegra: Add node for trackpad in Nyan boards Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:22   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node Tomeu Vizoso
                   ` (9 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

Patches are on its way to add a config file to alsaucm for the Nyan
boards. Use the same card ID that alsaucm will expect.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 43e58a4..9a9cffe 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -1976,9 +1976,9 @@
 	};
 
 	sound {
-		compatible = "nvidia,tegra-audio-max98090-nyan-big",
+		compatible = "nvidia,tegra-audio-max98090-nyan",
 			     "nvidia,tegra-audio-max98090";
-		nvidia,model = "Acer Chromebook 13";
+		nvidia,model = "GoogleNyan";
 
 		nvidia,audio-routing =
 			"Headphones", "HPR",
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (2 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:26   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel Tomeu Vizoso
                   ` (8 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

To silence a warning on Nyan boards.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 9a9cffe..94c7ba9 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -1660,6 +1660,7 @@
 
 		flash@0 {
 			compatible = "winbond,w25q32dw";
+			spi-max-frequency = <25000000>;
 			reg = <0>;
 		};
 	};
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (3 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-16 12:23   ` Thierry Reding
  2015-01-15 16:12 ` [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT Tomeu Vizoso
                   ` (7 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Stéphane Marchesin, Tomeu Vizoso, Thierry Reding,
	David Airlie, dri-devel, linux-kernel

From: Stéphane Marchesin <marcheu@chromium.org>

This panel is used by the Nyan Blaze board and supported by the simple-panel
driver.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index e95385b..5ee1d2c 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -722,6 +722,29 @@ static const struct panel_desc samsung_ltn101nt05 = {
 	},
 };
 
+static const struct drm_display_mode samsung_ltn140at29_301_mode = {
+	.clock = 76300,
+	.hdisplay = 1366,
+	.hsync_start = 1366 + 64,
+	.hsync_end = 1366 + 64 + 48,
+	.htotal = 1366 + 64 + 48 + 128,
+	.vdisplay = 768,
+	.vsync_start = 768 + 2,
+	.vsync_end = 768 + 2 + 5,
+	.vtotal = 768 + 2 + 5 + 17,
+	.vrefresh = 60,
+};
+
+static const struct panel_desc samsung_ltn140at29_301 = {
+	.modes = &samsung_ltn140at29_301_mode,
+	.num_modes = 1,
+	.bpc = 6,
+	.size = {
+		.width = 320,
+		.height = 187,
+	},
+};
+
 static const struct of_device_id platform_of_match[] = {
 	{
 		.compatible = "auo,b101aw03",
@@ -778,6 +801,9 @@ static const struct of_device_id platform_of_match[] = {
 		.compatible = "samsung,ltn101nt05",
 		.data = &samsung_ltn101nt05,
 	}, {
+		.compatible = "samsung,ltn140at29-301",
+		.data = &samsung_ltn140at29_301,
+	}, {
 		/* sentinel */
 	}
 };
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (4 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:28   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 07/11] ARM: tegra: Add DTS for the nyan-blaze board Tomeu Vizoso
                   ` (6 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

In preparation for adding the DT for the nyan-blaze board.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan-big.dts | 693 +-------------------------------
 arch/arm/boot/dts/tegra124-nyan.dtsi    | 684 +++++++++++++++++++++++++++++++
 2 files changed, 691 insertions(+), 686 deletions(-)
 create mode 100644 arch/arm/boot/dts/tegra124-nyan.dtsi

diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 94c7ba9..4f6fee3 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -1,46 +1,20 @@
 /dts-v1/;
 
-#include <dt-bindings/input/input.h>
-#include "tegra124.dtsi"
+#include "tegra124-nyan.dtsi"
 
 / {
 	model = "Acer Chromebook 13 CB5-311";
 	compatible = "google,nyan-big", "nvidia,tegra124";
 
-	aliases {
-		rtc0 = "/i2c@0,7000d000/pmic@40";
-		rtc1 = "/rtc@0,7000e000";
-		serial0 = &uarta;
-	};
+	panel: panel {
+		compatible = "auo,b133xtn01";
 
-	memory {
-		reg = <0x0 0x80000000 0x0 0x80000000>;
+		backlight = <&backlight>;
+		ddc-i2c-bus = <&dpaux>;
 	};
 
-	host1x@0,50000000 {
-		hdmi@0,54280000 {
-			status = "okay";
-
-			vdd-supply = <&vdd_3v3_hdmi>;
-			pll-supply = <&vdd_hdmi_pll>;
-			hdmi-supply = <&vdd_5v0_hdmi>;
-
-			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
-			nvidia,hpd-gpio =
-				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
-		};
-
-		sor@0,54540000 {
-			status = "okay";
-
-			nvidia,dpaux = <&dpaux>;
-			nvidia,panel = <&panel>;
-		};
-
-		dpaux@0,545c0000 {
-			vdd-supply = <&vdd_3v3_panel>;
-			status = "okay";
-		};
+	sdhci@0,700b0400 { /* SD Card on this bus */
+		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 	};
 
 	pinmux@0,70000868 {
@@ -1352,657 +1326,4 @@
 			};
 		};
 	};
-
-	serial@0,70006000 {
-		/* Debug connector on the bottom of the board near SD card. */
-		status = "okay";
-	};
-
-	pwm@0,7000a000 {
-		status = "okay";
-	};
-
-	i2c@0,7000c000 {
-		status = "okay";
-		clock-frequency = <100000>;
-
-		acodec: audio-codec@10 {
-			compatible = "maxim,max98090";
-			reg = <0x10>;
-			interrupt-parent = <&gpio>;
-			interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
-		};
-
-		temperature-sensor@4c {
-			compatible = "ti,tmp451";
-			reg = <0x4c>;
-			interrupt-parent = <&gpio>;
-			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
-
-			#thermal-sensor-cells = <1>;
-		};
-	};
-
-	i2c@0,7000c400 {
-		status = "okay";
-		clock-frequency = <100000>;
-
-		trackpad@15 {
-			compatible = "elan,ekth3000";
-			reg = <0x15>;
-			interrupt-parent = <&gpio>;
-			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
-			wakeup-source;
-		};
-	};
-
-	i2c@0,7000c500 {
-		status = "okay";
-		clock-frequency = <400000>;
-
-		tpm@20 {
-			compatible = "infineon,slb9645tt";
-			reg = <0x20>;
-		};
-	};
-
-	hdmi_ddc: i2c@0,7000c700 {
-		status = "okay";
-		clock-frequency = <100000>;
-	};
-
-	i2c@0,7000d000 {
-		status = "okay";
-		clock-frequency = <400000>;
-
-		pmic: pmic@40 {
-			compatible = "ams,as3722";
-			reg = <0x40>;
-			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
-
-			ams,system-power-controller;
-
-			#interrupt-cells = <2>;
-			interrupt-controller;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			pinctrl-names = "default";
-			pinctrl-0 = <&as3722_default>;
-
-			as3722_default: pinmux {
-				gpio0 {
-					pins = "gpio0";
-					function = "gpio";
-					bias-pull-down;
-				};
-
-				gpio1 {
-					pins = "gpio1";
-					function = "gpio";
-					bias-pull-up;
-				};
-
-				gpio2_4_7 {
-					pins = "gpio2", "gpio4", "gpio7";
-					function = "gpio";
-					bias-pull-up;
-				};
-
-				gpio3_6 {
-					pins = "gpio3", "gpio6";
-					bias-high-impedance;
-				};
-
-				gpio5 {
-					pins = "gpio5";
-					function = "clk32k-out";
-					bias-pull-down;
-				};
-			};
-
-			regulators {
-				vsup-sd2-supply = <&vdd_5v0_sys>;
-				vsup-sd3-supply = <&vdd_5v0_sys>;
-				vsup-sd4-supply = <&vdd_5v0_sys>;
-				vsup-sd5-supply = <&vdd_5v0_sys>;
-				vin-ldo0-supply = <&vdd_1v35_lp0>;
-				vin-ldo1-6-supply = <&vdd_3v3_run>;
-				vin-ldo2-5-7-supply = <&vddio_1v8>;
-				vin-ldo3-4-supply = <&vdd_3v3_sys>;
-				vin-ldo9-10-supply = <&vdd_5v0_sys>;
-				vin-ldo11-supply = <&vdd_3v3_run>;
-
-				sd0 {
-					regulator-name = "+VDD_CPU_AP";
-					regulator-min-microvolt = <700000>;
-					regulator-max-microvolt = <1350000>;
-					regulator-min-microamp = <3500000>;
-					regulator-max-microamp = <3500000>;
-					regulator-always-on;
-					regulator-boot-on;
-					ams,ext-control = <2>;
-				};
-
-				sd1 {
-					regulator-name = "+VDD_CORE";
-					regulator-min-microvolt = <700000>;
-					regulator-max-microvolt = <1350000>;
-					regulator-min-microamp = <2500000>;
-					regulator-max-microamp = <4000000>;
-					regulator-always-on;
-					regulator-boot-on;
-					ams,ext-control = <1>;
-				};
-
-				vdd_1v35_lp0: sd2 {
-					regulator-name = "+1.35V_LP0(sd2)";
-					regulator-min-microvolt = <1350000>;
-					regulator-max-microvolt = <1350000>;
-					regulator-always-on;
-					regulator-boot-on;
-				};
-
-				sd3 {
-					regulator-name = "+1.35V_LP0(sd3)";
-					regulator-min-microvolt = <1350000>;
-					regulator-max-microvolt = <1350000>;
-					regulator-always-on;
-					regulator-boot-on;
-				};
-
-				vdd_1v05_run: sd4 {
-					regulator-name = "+1.05V_RUN";
-					regulator-min-microvolt = <1050000>;
-					regulator-max-microvolt = <1050000>;
-				};
-
-				vddio_1v8: sd5 {
-					regulator-name = "+1.8V_VDDIO";
-					regulator-min-microvolt = <1800000>;
-					regulator-max-microvolt = <1800000>;
-					regulator-boot-on;
-					regulator-always-on;
-				};
-
-				sd6 {
-					regulator-name = "+VDD_GPU_AP";
-					regulator-min-microvolt = <650000>;
-					regulator-max-microvolt = <1200000>;
-					regulator-min-microamp = <3500000>;
-					regulator-max-microamp = <3500000>;
-					regulator-boot-on;
-					regulator-always-on;
-				};
-
-				ldo0 {
-					regulator-name = "+1.05V_RUN_AVDD";
-					regulator-min-microvolt = <1050000>;
-					regulator-max-microvolt = <1050000>;
-					regulator-boot-on;
-					regulator-always-on;
-					ams,ext-control = <1>;
-				};
-
-				ldo1 {
-					regulator-name = "+1.8V_RUN_CAM";
-					regulator-min-microvolt = <1800000>;
-					regulator-max-microvolt = <1800000>;
-				};
-
-				ldo2 {
-					regulator-name = "+1.2V_GEN_AVDD";
-					regulator-min-microvolt = <1200000>;
-					regulator-max-microvolt = <1200000>;
-					regulator-boot-on;
-					regulator-always-on;
-				};
-
-				ldo3 {
-					regulator-name = "+1.00V_LP0_VDD_RTC";
-					regulator-min-microvolt = <1000000>;
-					regulator-max-microvolt = <1000000>;
-					regulator-boot-on;
-					regulator-always-on;
-					ams,enable-tracking;
-				};
-
-				vdd_run_cam: ldo4 {
-					regulator-name = "+3.3V_RUN_CAM";
-					regulator-min-microvolt = <2800000>;
-					regulator-max-microvolt = <2800000>;
-				};
-
-				ldo5 {
-					regulator-name = "+1.2V_RUN_CAM_FRONT";
-					regulator-min-microvolt = <1200000>;
-					regulator-max-microvolt = <1200000>;
-				};
-
-				vddio_sdmmc3: ldo6 {
-					regulator-name = "+VDDIO_SDMMC3";
-					regulator-min-microvolt = <1800000>;
-					regulator-max-microvolt = <3300000>;
-				};
-
-				ldo7 {
-					regulator-name = "+1.05V_RUN_CAM_REAR";
-					regulator-min-microvolt = <1050000>;
-					regulator-max-microvolt = <1050000>;
-				};
-
-				ldo9 {
-					regulator-name = "+2.8V_RUN_TOUCH";
-					regulator-min-microvolt = <2800000>;
-					regulator-max-microvolt = <2800000>;
-				};
-
-				ldo10 {
-					regulator-name = "+2.8V_RUN_CAM_AF";
-					regulator-min-microvolt = <2800000>;
-					regulator-max-microvolt = <2800000>;
-				};
-
-				ldo11 {
-					regulator-name = "+1.8V_RUN_VPP_FUSE";
-					regulator-min-microvolt = <1800000>;
-					regulator-max-microvolt = <1800000>;
-				};
-			};
-		};
-	};
-
-	spi@0,7000d400 {
-		status = "okay";
-
-		cros_ec: cros-ec@0 {
-			compatible = "google,cros-ec-spi";
-			spi-max-frequency = <3000000>;
-			interrupt-parent = <&gpio>;
-			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
-			reg = <0>;
-
-			google,cros-ec-spi-msg-delay = <2000>;
-
-			i2c-tunnel {
-				compatible = "google,cros-ec-i2c-tunnel";
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				google,remote-bus = <0>;
-
-				charger: bq24735@9 {
-					compatible = "ti,bq24735";
-					reg = <0x9>;
-					interrupt-parent = <&gpio>;
-					interrupts = <TEGRA_GPIO(J, 0)
-							GPIO_ACTIVE_HIGH>;
-					ti,ac-detect-gpios = <&gpio
-							TEGRA_GPIO(J, 0)
-							GPIO_ACTIVE_HIGH>;
-				};
-
-				battery: sbs-battery@b {
-					compatible = "sbs,sbs-battery";
-					reg = <0xb>;
-					sbs,i2c-retry-count = <2>;
-					sbs,poll-retry-count = <10>;
-					power-supplies = <&charger>;
-				};
-			};
-		};
-	};
-
-	spi@0,7000da00 {
-		status = "okay";
-		spi-max-frequency = <25000000>;
-
-		flash@0 {
-			compatible = "winbond,w25q32dw";
-			spi-max-frequency = <25000000>;
-			reg = <0>;
-		};
-	};
-
-	pmc@0,7000e400 {
-		nvidia,invert-interrupt;
-		nvidia,suspend-mode = <0>;
-		nvidia,cpu-pwr-good-time = <500>;
-		nvidia,cpu-pwr-off-time = <300>;
-		nvidia,core-pwr-good-time = <641 3845>;
-		nvidia,core-pwr-off-time = <61036>;
-		nvidia,core-power-req-active-high;
-		nvidia,sys-clock-req-active-high;
-	};
-
-	hda@0,70030000 {
-		status = "okay";
-	};
-
-	sdhci@0,700b0000 { /* WiFi/BT on this bus */
-		status = "okay";
-		power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
-		bus-width = <4>;
-		no-1-8-v;
-		non-removable;
-	};
-
-	sdhci@0,700b0400 { /* SD Card on this bus */
-		status = "okay";
-		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
-		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
-		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
-		bus-width = <4>;
-		no-1-8-v;
-		vqmmc-supply = <&vddio_sdmmc3>;
-	};
-
-	sdhci@0,700b0600 { /* eMMC on this bus */
-		status = "okay";
-		bus-width = <8>;
-		no-1-8-v;
-		non-removable;
-	};
-
-	ahub@0,70300000 {
-		i2s@0,70301100 {
-			status = "okay";
-		};
-	};
-
-	usb@0,7d000000 { /* Rear external USB port. */
-		status = "okay";
-	};
-
-	usb-phy@0,7d000000 {
-		status = "okay";
-		vbus-supply = <&vdd_usb1_vbus>;
-	};
-
-	usb@0,7d004000 { /* Internal webcam. */
-		status = "okay";
-	};
-
-	usb-phy@0,7d004000 {
-		status = "okay";
-		vbus-supply = <&vdd_run_cam>;
-	};
-
-	usb@0,7d008000 { /* Left external USB port. */
-		status = "okay";
-	};
-
-	usb-phy@0,7d008000 {
-		status = "okay";
-		vbus-supply = <&vdd_usb3_vbus>;
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-
-		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
-		power-supply = <&vdd_led>;
-		pwms = <&pwm 1 1000000>;
-
-		default-brightness-level = <224>;
-		brightness-levels =
-			<  0   1   2   3   4   5   6   7
-			   8   9  10  11  12  13  14  15
-			  16  17  18  19  20  21  22  23
-			  24  25  26  27  28  29  30  31
-			  32  33  34  35  36  37  38  39
-			  40  41  42  43  44  45  46  47
-			  48  49  50  51  52  53  54  55
-			  56  57  58  59  60  61  62  63
-			  64  65  66  67  68  69  70  71
-			  72  73  74  75  76  77  78  79
-			  80  81  82  83  84  85  86  87
-			  88  89  90  91  92  93  94  95
-			  96  97  98  99 100 101 102 103
-			 104 105 106 107 108 109 110 111
-			 112 113 114 115 116 117 118 119
-			 120 121 122 123 124 125 126 127
-			 128 129 130 131 132 133 134 135
-			 136 137 138 139 140 141 142 143
-			 144 145 146 147 148 149 150 151
-			 152 153 154 155 156 157 158 159
-			 160 161 162 163 164 165 166 167
-			 168 169 170 171 172 173 174 175
-			 176 177 178 179 180 181 182 183
-			 184 185 186 187 188 189 190 191
-			 192 193 194 195 196 197 198 199
-			 200 201 202 203 204 205 206 207
-			 208 209 210 211 212 213 214 215
-			 216 217 218 219 220 221 222 223
-			 224 225 226 227 228 229 230 231
-			 232 233 234 235 236 237 238 239
-			 240 241 242 243 244 245 246 247
-			 248 249 250 251 252 253 254 255
-			 256>;
-	};
-
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		clk32k_in: clock@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			#clock-cells = <0>;
-			clock-frequency = <32768>;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		lid {
-			label = "Lid";
-			gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
-			linux,input-type = <5>;
-			linux,code = <KEY_RESERVED>;
-			debounce-interval = <1>;
-			gpio-key,wakeup;
-		};
-
-		power {
-			label = "Power";
-			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_POWER>;
-			debounce-interval = <30>;
-			gpio-key,wakeup;
-		};
-	};
-
-	panel: panel {
-		compatible = "auo,b133xtn01";
-
-		backlight = <&backlight>;
-		ddc-i2c-bus = <&dpaux>;
-	};
-
-	regulators {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		vdd_mux: regulator@0 {
-			compatible = "regulator-fixed";
-			reg = <0>;
-			regulator-name = "+VDD_MUX";
-			regulator-min-microvolt = <12000000>;
-			regulator-max-microvolt = <12000000>;
-			regulator-always-on;
-			regulator-boot-on;
-		};
-
-		vdd_5v0_sys: regulator@1 {
-			compatible = "regulator-fixed";
-			reg = <1>;
-			regulator-name = "+5V_SYS";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			regulator-always-on;
-			regulator-boot-on;
-			vin-supply = <&vdd_mux>;
-		};
-
-		vdd_3v3_sys: regulator@2 {
-			compatible = "regulator-fixed";
-			reg = <2>;
-			regulator-name = "+3.3V_SYS";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			regulator-always-on;
-			regulator-boot-on;
-			vin-supply = <&vdd_mux>;
-		};
-
-		vdd_3v3_run: regulator@3 {
-			compatible = "regulator-fixed";
-			reg = <3>;
-			regulator-name = "+3.3V_RUN";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			regulator-always-on;
-			regulator-boot-on;
-			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_3v3_sys>;
-		};
-
-		vdd_3v3_hdmi: regulator@4 {
-			compatible = "regulator-fixed";
-			reg = <4>;
-			regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			vin-supply = <&vdd_3v3_run>;
-		};
-
-		vdd_led: regulator@5 {
-			compatible = "regulator-fixed";
-			reg = <5>;
-			regulator-name = "+VDD_LED";
-			gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_mux>;
-		};
-
-		vdd_5v0_ts: regulator@6 {
-			compatible = "regulator-fixed";
-			reg = <6>;
-			regulator-name = "+5V_VDD_TS_SW";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			regulator-boot-on;
-			gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_5v0_sys>;
-		};
-
-		vdd_usb1_vbus: regulator@7 {
-			compatible = "regulator-fixed";
-			reg = <7>;
-			regulator-name = "+5V_USB_HS";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			gpio-open-drain;
-			vin-supply = <&vdd_5v0_sys>;
-		};
-
-		vdd_usb3_vbus: regulator@8 {
-			compatible = "regulator-fixed";
-			reg = <8>;
-			regulator-name = "+5V_USB_SS";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			gpio-open-drain;
-			vin-supply = <&vdd_5v0_sys>;
-		};
-
-		vdd_3v3_panel: regulator@9 {
-			compatible = "regulator-fixed";
-			reg = <9>;
-			regulator-name = "+3.3V_PANEL";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_3v3_run>;
-		};
-
-		vdd_3v3_lp0: regulator@10 {
-			compatible = "regulator-fixed";
-			reg = <10>;
-			regulator-name = "+3.3V_LP0";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			/*
-			 * TODO: find a way to wire this up with the USB EHCI
-			 * controllers so that it can be enabled on demand.
-			 */
-			regulator-always-on;
-			gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_3v3_sys>;
-		};
-
-		vdd_hdmi_pll: regulator@11 {
-			compatible = "regulator-fixed";
-			reg = <11>;
-			regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
-			regulator-min-microvolt = <1050000>;
-			regulator-max-microvolt = <1050000>;
-			gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
-			vin-supply = <&vdd_1v05_run>;
-		};
-
-		vdd_5v0_hdmi: regulator@12 {
-			compatible = "regulator-fixed";
-			reg = <12>;
-			regulator-name = "+5V_HDMI_CON";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
-			enable-active-high;
-			vin-supply = <&vdd_5v0_sys>;
-		};
-	};
-
-	sound {
-		compatible = "nvidia,tegra-audio-max98090-nyan",
-			     "nvidia,tegra-audio-max98090";
-		nvidia,model = "GoogleNyan";
-
-		nvidia,audio-routing =
-			"Headphones", "HPR",
-			"Headphones", "HPL",
-			"Speakers", "SPKR",
-			"Speakers", "SPKL",
-			"Mic Jack", "MICBIAS",
-			"DMICL", "Int Mic",
-			"DMICR", "Int Mic",
-			"IN34", "Mic Jack";
-
-		nvidia,i2s-controller = <&tegra_i2s1>;
-		nvidia,audio-codec = <&acodec>;
-
-		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
-			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
-			 <&tegra_car TEGRA124_CLK_EXTERN1>;
-		clock-names = "pll_a", "pll_a_out0", "mclk";
-
-		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>;
-		nvidia,mic-det-gpios =
-				<&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
-	};
 };
-
-#include "cros-ec-keyboard.dtsi"
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
new file mode 100644
index 0000000..25bbcbe
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -0,0 +1,684 @@
+#include <dt-bindings/input/input.h>
+#include "tegra124.dtsi"
+
+/ {
+	aliases {
+		rtc0 = "/i2c@0,7000d000/pmic@40";
+		rtc1 = "/rtc@0,7000e000";
+		serial0 = &uarta;
+	};
+
+	memory {
+		reg = <0x0 0x80000000 0x0 0x80000000>;
+	};
+
+	host1x@0,50000000 {
+		hdmi@0,54280000 {
+			status = "okay";
+
+			vdd-supply = <&vdd_3v3_hdmi>;
+			pll-supply = <&vdd_hdmi_pll>;
+			hdmi-supply = <&vdd_5v0_hdmi>;
+
+			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+			nvidia,hpd-gpio =
+				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+		};
+
+		sor@0,54540000 {
+			status = "okay";
+
+			nvidia,dpaux = <&dpaux>;
+			nvidia,panel = <&panel>;
+		};
+
+		dpaux@0,545c0000 {
+			vdd-supply = <&vdd_3v3_panel>;
+			status = "okay";
+		};
+	};
+
+	serial@0,70006000 {
+		/* Debug connector on the bottom of the board near SD card. */
+		status = "okay";
+	};
+
+	pwm@0,7000a000 {
+		status = "okay";
+	};
+
+	i2c@0,7000c000 {
+		status = "okay";
+		clock-frequency = <100000>;
+
+		acodec: audio-codec@10 {
+			compatible = "maxim,max98090";
+			reg = <0x10>;
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
+		};
+
+		temperature-sensor@4c {
+			compatible = "ti,tmp451";
+			reg = <0x4c>;
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+
+			#thermal-sensor-cells = <1>;
+		};
+	};
+
+	i2c@0,7000c400 {
+		status = "okay";
+		clock-frequency = <100000>;
+
+		trackpad@15 {
+			compatible = "elan,ekth3000";
+			reg = <0x15>;
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
+			wakeup-source;
+		};
+	};
+
+	i2c@0,7000c500 {
+		status = "okay";
+		clock-frequency = <400000>;
+
+		tpm@20 {
+			compatible = "infineon,slb9645tt";
+			reg = <0x20>;
+		};
+	};
+
+	hdmi_ddc: i2c@0,7000c700 {
+		status = "okay";
+		clock-frequency = <100000>;
+	};
+
+	i2c@0,7000d000 {
+		status = "okay";
+		clock-frequency = <400000>;
+
+		pmic: pmic@40 {
+			compatible = "ams,as3722";
+			reg = <0x40>;
+			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+			ams,system-power-controller;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&as3722_default>;
+
+			as3722_default: pinmux {
+				gpio0 {
+					pins = "gpio0";
+					function = "gpio";
+					bias-pull-down;
+				};
+
+				gpio1 {
+					pins = "gpio1";
+					function = "gpio";
+					bias-pull-up;
+				};
+
+				gpio2_4_7 {
+					pins = "gpio2", "gpio4", "gpio7";
+					function = "gpio";
+					bias-pull-up;
+				};
+
+				gpio3_6 {
+					pins = "gpio3", "gpio6";
+					bias-high-impedance;
+				};
+
+				gpio5 {
+					pins = "gpio5";
+					function = "clk32k-out";
+					bias-pull-down;
+				};
+			};
+
+			regulators {
+				vsup-sd2-supply = <&vdd_5v0_sys>;
+				vsup-sd3-supply = <&vdd_5v0_sys>;
+				vsup-sd4-supply = <&vdd_5v0_sys>;
+				vsup-sd5-supply = <&vdd_5v0_sys>;
+				vin-ldo0-supply = <&vdd_1v35_lp0>;
+				vin-ldo1-6-supply = <&vdd_3v3_run>;
+				vin-ldo2-5-7-supply = <&vddio_1v8>;
+				vin-ldo3-4-supply = <&vdd_3v3_sys>;
+				vin-ldo9-10-supply = <&vdd_5v0_sys>;
+				vin-ldo11-supply = <&vdd_3v3_run>;
+
+				sd0 {
+					regulator-name = "+VDD_CPU_AP";
+					regulator-min-microvolt = <700000>;
+					regulator-max-microvolt = <1350000>;
+					regulator-min-microamp = <3500000>;
+					regulator-max-microamp = <3500000>;
+					regulator-always-on;
+					regulator-boot-on;
+					ams,ext-control = <2>;
+				};
+
+				sd1 {
+					regulator-name = "+VDD_CORE";
+					regulator-min-microvolt = <700000>;
+					regulator-max-microvolt = <1350000>;
+					regulator-min-microamp = <2500000>;
+					regulator-max-microamp = <4000000>;
+					regulator-always-on;
+					regulator-boot-on;
+					ams,ext-control = <1>;
+				};
+
+				vdd_1v35_lp0: sd2 {
+					regulator-name = "+1.35V_LP0(sd2)";
+					regulator-min-microvolt = <1350000>;
+					regulator-max-microvolt = <1350000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				sd3 {
+					regulator-name = "+1.35V_LP0(sd3)";
+					regulator-min-microvolt = <1350000>;
+					regulator-max-microvolt = <1350000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				vdd_1v05_run: sd4 {
+					regulator-name = "+1.05V_RUN";
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+				};
+
+				vddio_1v8: sd5 {
+					regulator-name = "+1.8V_VDDIO";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				sd6 {
+					regulator-name = "+VDD_GPU_AP";
+					regulator-min-microvolt = <650000>;
+					regulator-max-microvolt = <1200000>;
+					regulator-min-microamp = <3500000>;
+					regulator-max-microamp = <3500000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				ldo0 {
+					regulator-name = "+1.05V_RUN_AVDD";
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+					regulator-boot-on;
+					regulator-always-on;
+					ams,ext-control = <1>;
+				};
+
+				ldo1 {
+					regulator-name = "+1.8V_RUN_CAM";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				ldo2 {
+					regulator-name = "+1.2V_GEN_AVDD";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				ldo3 {
+					regulator-name = "+1.00V_LP0_VDD_RTC";
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+					regulator-boot-on;
+					regulator-always-on;
+					ams,enable-tracking;
+				};
+
+				vdd_run_cam: ldo4 {
+					regulator-name = "+3.3V_RUN_CAM";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo5 {
+					regulator-name = "+1.2V_RUN_CAM_FRONT";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+				};
+
+				vddio_sdmmc3: ldo6 {
+					regulator-name = "+VDDIO_SDMMC3";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <3300000>;
+				};
+
+				ldo7 {
+					regulator-name = "+1.05V_RUN_CAM_REAR";
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+				};
+
+				ldo9 {
+					regulator-name = "+2.8V_RUN_TOUCH";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo10 {
+					regulator-name = "+2.8V_RUN_CAM_AF";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo11 {
+					regulator-name = "+1.8V_RUN_VPP_FUSE";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+			};
+		};
+	};
+
+	spi@0,7000d400 {
+		status = "okay";
+
+		cros_ec: cros-ec@0 {
+			compatible = "google,cros-ec-spi";
+			spi-max-frequency = <3000000>;
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
+			reg = <0>;
+
+			google,cros-ec-spi-msg-delay = <2000>;
+
+			i2c-tunnel {
+				compatible = "google,cros-ec-i2c-tunnel";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				google,remote-bus = <0>;
+
+				charger: bq24735@9 {
+					compatible = "ti,bq24735";
+					reg = <0x9>;
+					interrupt-parent = <&gpio>;
+					interrupts = <TEGRA_GPIO(J, 0)
+							GPIO_ACTIVE_HIGH>;
+					ti,ac-detect-gpios = <&gpio
+							TEGRA_GPIO(J, 0)
+							GPIO_ACTIVE_HIGH>;
+				};
+
+				battery: sbs-battery@b {
+					compatible = "sbs,sbs-battery";
+					reg = <0xb>;
+					sbs,i2c-retry-count = <2>;
+					sbs,poll-retry-count = <10>;
+					power-supplies = <&charger>;
+				};
+			};
+		};
+	};
+
+	spi@0,7000da00 {
+		status = "okay";
+		spi-max-frequency = <25000000>;
+
+		flash@0 {
+			compatible = "winbond,w25q32dw";
+			spi-max-frequency = <25000000>;
+			reg = <0>;
+		};
+	};
+
+	pmc@0,7000e400 {
+		nvidia,invert-interrupt;
+		nvidia,suspend-mode = <0>;
+		nvidia,cpu-pwr-good-time = <500>;
+		nvidia,cpu-pwr-off-time = <300>;
+		nvidia,core-pwr-good-time = <641 3845>;
+		nvidia,core-pwr-off-time = <61036>;
+		nvidia,core-power-req-active-high;
+		nvidia,sys-clock-req-active-high;
+	};
+
+	hda@0,70030000 {
+		status = "okay";
+	};
+
+	sdhci@0,700b0000 { /* WiFi/BT on this bus */
+		status = "okay";
+		bus-width = <4>;
+		no-1-8-v;
+		non-removable;
+	};
+
+	sdhci@0,700b0400 { /* SD Card on this bus */
+		status = "okay";
+		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
+		bus-width = <4>;
+		no-1-8-v;
+		vqmmc-supply = <&vddio_sdmmc3>;
+	};
+
+	sdhci@0,700b0600 { /* eMMC on this bus */
+		status = "okay";
+		bus-width = <8>;
+		no-1-8-v;
+		non-removable;
+	};
+
+	ahub@0,70300000 {
+		i2s@0,70301100 {
+			status = "okay";
+		};
+	};
+
+	usb@0,7d000000 { /* Rear external USB port. */
+		status = "okay";
+	};
+
+	usb-phy@0,7d000000 {
+		status = "okay";
+		vbus-supply = <&vdd_usb1_vbus>;
+	};
+
+	usb@0,7d004000 { /* Internal webcam. */
+		status = "okay";
+	};
+
+	usb-phy@0,7d004000 {
+		status = "okay";
+		vbus-supply = <&vdd_run_cam>;
+	};
+
+	usb@0,7d008000 { /* Left external USB port. */
+		status = "okay";
+	};
+
+	usb-phy@0,7d008000 {
+		status = "okay";
+		vbus-supply = <&vdd_usb3_vbus>;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+
+		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+		power-supply = <&vdd_led>;
+		pwms = <&pwm 1 1000000>;
+
+		default-brightness-level = <224>;
+		brightness-levels =
+			<  0   1   2   3   4   5   6   7
+			   8   9  10  11  12  13  14  15
+			  16  17  18  19  20  21  22  23
+			  24  25  26  27  28  29  30  31
+			  32  33  34  35  36  37  38  39
+			  40  41  42  43  44  45  46  47
+			  48  49  50  51  52  53  54  55
+			  56  57  58  59  60  61  62  63
+			  64  65  66  67  68  69  70  71
+			  72  73  74  75  76  77  78  79
+			  80  81  82  83  84  85  86  87
+			  88  89  90  91  92  93  94  95
+			  96  97  98  99 100 101 102 103
+			 104 105 106 107 108 109 110 111
+			 112 113 114 115 116 117 118 119
+			 120 121 122 123 124 125 126 127
+			 128 129 130 131 132 133 134 135
+			 136 137 138 139 140 141 142 143
+			 144 145 146 147 148 149 150 151
+			 152 153 154 155 156 157 158 159
+			 160 161 162 163 164 165 166 167
+			 168 169 170 171 172 173 174 175
+			 176 177 178 179 180 181 182 183
+			 184 185 186 187 188 189 190 191
+			 192 193 194 195 196 197 198 199
+			 200 201 202 203 204 205 206 207
+			 208 209 210 211 212 213 214 215
+			 216 217 218 219 220 221 222 223
+			 224 225 226 227 228 229 230 231
+			 232 233 234 235 236 237 238 239
+			 240 241 242 243 244 245 246 247
+			 248 249 250 251 252 253 254 255
+			 256>;
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		clk32k_in: clock@0 {
+			compatible = "fixed-clock";
+			reg = <0>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		lid {
+			label = "Lid";
+			gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
+			linux,input-type = <5>;
+			linux,code = <KEY_RESERVED>;
+			debounce-interval = <1>;
+			gpio-key,wakeup;
+		};
+
+		power {
+			label = "Power";
+			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+			debounce-interval = <30>;
+			gpio-key,wakeup;
+		};
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		vdd_mux: regulator@0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "+VDD_MUX";
+			regulator-min-microvolt = <12000000>;
+			regulator-max-microvolt = <12000000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		vdd_5v0_sys: regulator@1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "+5V_SYS";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-always-on;
+			regulator-boot-on;
+			vin-supply = <&vdd_mux>;
+		};
+
+		vdd_3v3_sys: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "+3.3V_SYS";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+			regulator-boot-on;
+			vin-supply = <&vdd_mux>;
+		};
+
+		vdd_3v3_run: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "+3.3V_RUN";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_3v3_sys>;
+		};
+
+		vdd_3v3_hdmi: regulator@4 {
+			compatible = "regulator-fixed";
+			reg = <4>;
+			regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			vin-supply = <&vdd_3v3_run>;
+		};
+
+		vdd_led: regulator@5 {
+			compatible = "regulator-fixed";
+			reg = <5>;
+			regulator-name = "+VDD_LED";
+			gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_mux>;
+		};
+
+		vdd_5v0_ts: regulator@6 {
+			compatible = "regulator-fixed";
+			reg = <6>;
+			regulator-name = "+5V_VDD_TS_SW";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-boot-on;
+			gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_5v0_sys>;
+		};
+
+		vdd_usb1_vbus: regulator@7 {
+			compatible = "regulator-fixed";
+			reg = <7>;
+			regulator-name = "+5V_USB_HS";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			gpio-open-drain;
+			vin-supply = <&vdd_5v0_sys>;
+		};
+
+		vdd_usb3_vbus: regulator@8 {
+			compatible = "regulator-fixed";
+			reg = <8>;
+			regulator-name = "+5V_USB_SS";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			gpio-open-drain;
+			vin-supply = <&vdd_5v0_sys>;
+		};
+
+		vdd_3v3_panel: regulator@9 {
+			compatible = "regulator-fixed";
+			reg = <9>;
+			regulator-name = "+3.3V_PANEL";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_3v3_run>;
+		};
+
+		vdd_3v3_lp0: regulator@10 {
+			compatible = "regulator-fixed";
+			reg = <10>;
+			regulator-name = "+3.3V_LP0";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			/*
+			 * TODO: find a way to wire this up with the USB EHCI
+			 * controllers so that it can be enabled on demand.
+			 */
+			regulator-always-on;
+			gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_3v3_sys>;
+		};
+
+		vdd_hdmi_pll: regulator@11 {
+			compatible = "regulator-fixed";
+			reg = <11>;
+			regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
+			vin-supply = <&vdd_1v05_run>;
+		};
+
+		vdd_5v0_hdmi: regulator@12 {
+			compatible = "regulator-fixed";
+			reg = <12>;
+			regulator-name = "+5V_HDMI_CON";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			vin-supply = <&vdd_5v0_sys>;
+		};
+	};
+
+	sound {
+		compatible = "nvidia,tegra-audio-max98090-nyan",
+			     "nvidia,tegra-audio-max98090";
+		nvidia,model = "GoogleNyan";
+
+		nvidia,audio-routing =
+			"Headphones", "HPR",
+			"Headphones", "HPL",
+			"Speakers", "SPKR",
+			"Speakers", "SPKL",
+			"Mic Jack", "MICBIAS",
+			"DMICL", "Int Mic",
+			"DMICR", "Int Mic",
+			"IN34", "Mic Jack";
+
+		nvidia,i2s-controller = <&tegra_i2s1>;
+		nvidia,audio-codec = <&acodec>;
+
+		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
+			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
+			 <&tegra_car TEGRA124_CLK_EXTERN1>;
+		clock-names = "pll_a", "pll_a_out0", "mclk";
+
+		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>;
+		nvidia,mic-det-gpios =
+				<&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
+	};
+};
+
+#include "cros-ec-keyboard.dtsi"
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 07/11] ARM: tegra: Add DTS for the nyan-blaze board
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (5 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 16:12 ` [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay Tomeu Vizoso
                   ` (5 subsequent siblings)
  12 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

It's commercial name is HP Chromebook 14 and is substantially similar to
the Acer Chromebook 13 (nyan-big).

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/Makefile                |    1 +
 arch/arm/boot/dts/tegra124-nyan-blaze.dts | 1325 +++++++++++++++++++++++++++++
 2 files changed, 1326 insertions(+)
 create mode 100644 arch/arm/boot/dts/tegra124-nyan-blaze.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd..7c9d83b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -497,6 +497,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra114-tn7.dtb \
 	tegra124-jetson-tk1.dtb \
 	tegra124-nyan-big.dtb \
+	tegra124-nyan-blaze.dtb \
 	tegra124-venice2.dtb
 dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
 dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
diff --git a/arch/arm/boot/dts/tegra124-nyan-blaze.dts b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
new file mode 100644
index 0000000..44fe769
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
@@ -0,0 +1,1325 @@
+/dts-v1/;
+
+#include "tegra124-nyan.dtsi"
+
+/ {
+	model = "HP Chromebook 14";
+	compatible = "google,nyan-blaze", "google,nyan", "nvidia,tegra124";
+
+	panel: panel {
+		compatible = "samsung,ltn140at29-301";
+
+		backlight = <&backlight>;
+		ddc-i2c-bus = <&dpaux>;
+	};
+
+	pinmux@0,70000868 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinmux_default>;
+
+		pinmux_default: common {
+			clk_32k_out_pa0 {
+				nvidia,pins = "clk_32k_out_pa0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			uart3_cts_n_pa1 {
+				nvidia,pins = "uart3_cts_n_pa1";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap2_fs_pa2 {
+				nvidia,pins = "dap2_fs_pa2";
+				nvidia,function = "i2s1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap2_sclk_pa3 {
+				nvidia,pins = "dap2_sclk_pa3";
+				nvidia,function = "i2s1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap2_din_pa4 {
+				nvidia,pins = "dap2_din_pa4";
+				nvidia,function = "i2s1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap2_dout_pa5 {
+				nvidia,pins = "dap2_dout_pa5";
+				nvidia,function = "i2s1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_clk_pa6 {
+				nvidia,pins = "sdmmc3_clk_pa6";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc3_cmd_pa7 {
+				nvidia,pins = "sdmmc3_cmd_pa7";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pb0 {
+				nvidia,pins = "pb0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pb1 {
+				nvidia,pins = "pb1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc3_dat3_pb4 {
+				nvidia,pins = "sdmmc3_dat3_pb4";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_dat2_pb5 {
+				nvidia,pins = "sdmmc3_dat2_pb5";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_dat1_pb6 {
+				nvidia,pins = "sdmmc3_dat1_pb6";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_dat0_pb7 {
+				nvidia,pins = "sdmmc3_dat0_pb7";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			uart3_rts_n_pc0 {
+				nvidia,pins = "uart3_rts_n_pc0";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart2_txd_pc2 {
+				nvidia,pins = "uart2_txd_pc2";
+				nvidia,function = "irda";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart2_rxd_pc3 {
+				nvidia,pins = "uart2_rxd_pc3";
+				nvidia,function = "irda";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gen1_i2c_scl_pc4 {
+				nvidia,pins = "gen1_i2c_scl_pc4";
+				nvidia,function = "i2c1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			gen1_i2c_sda_pc5 {
+				nvidia,pins = "gen1_i2c_sda_pc5";
+				nvidia,function = "i2c1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			pc7 {
+				nvidia,pins = "pc7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg0 {
+				nvidia,pins = "pg0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg1 {
+				nvidia,pins = "pg1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg2 {
+				nvidia,pins = "pg2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg3 {
+				nvidia,pins = "pg3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pg4 {
+				nvidia,pins = "pg4";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pg5 {
+				nvidia,pins = "pg5";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pg6 {
+				nvidia,pins = "pg6";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pg7 {
+				nvidia,pins = "pg7";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ph0 {
+				nvidia,pins = "ph0";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ph1 {
+				nvidia,pins = "ph1";
+				nvidia,function = "pwm1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ph2 {
+				nvidia,pins = "ph2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ph3 {
+				nvidia,pins = "ph3";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ph4 {
+				nvidia,pins = "ph4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ph5 {
+				nvidia,pins = "ph5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ph6 {
+				nvidia,pins = "ph6";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ph7 {
+				nvidia,pins = "ph7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi0 {
+				nvidia,pins = "pi0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pi1 {
+				nvidia,pins = "pi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pi2 {
+				nvidia,pins = "pi2";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi3 {
+				nvidia,pins = "pi3";
+				nvidia,function = "spi4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi4 {
+				nvidia,pins = "pi4";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi5 {
+				nvidia,pins = "pi5";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pi6 {
+				nvidia,pins = "pi6";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pi7 {
+				nvidia,pins = "pi7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pj0 {
+				nvidia,pins = "pj0";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pj2 {
+				nvidia,pins = "pj2";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart2_cts_n_pj5 {
+				nvidia,pins = "uart2_cts_n_pj5";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart2_rts_n_pj6 {
+				nvidia,pins = "uart2_rts_n_pj6";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pj7 {
+				nvidia,pins = "pj7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pk0 {
+				nvidia,pins = "pk0";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk1 {
+				nvidia,pins = "pk1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk2 {
+				nvidia,pins = "pk2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pk3 {
+				nvidia,pins = "pk3";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk4 {
+				nvidia,pins = "pk4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			spdif_out_pk5 {
+				nvidia,pins = "spdif_out_pk5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			spdif_in_pk6 {
+				nvidia,pins = "spdif_in_pk6";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pk7 {
+				nvidia,pins = "pk7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap1_fs_pn0 {
+				nvidia,pins = "dap1_fs_pn0";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_din_pn1 {
+				nvidia,pins = "dap1_din_pn1";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_dout_pn2 {
+				nvidia,pins = "dap1_dout_pn2";
+				nvidia,function = "i2s0";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap1_sclk_pn3 {
+				nvidia,pins = "dap1_sclk_pn3";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			usb_vbus_en0_pn4 {
+				nvidia,pins = "usb_vbus_en0_pn4";
+				nvidia,function = "usb";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			usb_vbus_en1_pn5 {
+				nvidia,pins = "usb_vbus_en1_pn5";
+				nvidia,function = "usb";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			hdmi_int_pn7 {
+				nvidia,pins = "hdmi_int_pn7";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data7_po0 {
+				nvidia,pins = "ulpi_data7_po0";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data0_po1 {
+				nvidia,pins = "ulpi_data0_po1";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data1_po2 {
+				nvidia,pins = "ulpi_data1_po2";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data2_po3 {
+				nvidia,pins = "ulpi_data2_po3";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data3_po4 {
+				nvidia,pins = "ulpi_data3_po4";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data4_po5 {
+				nvidia,pins = "ulpi_data4_po5";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data5_po6 {
+				nvidia,pins = "ulpi_data5_po6";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_data6_po7 {
+				nvidia,pins = "ulpi_data6_po7";
+				nvidia,function = "ulpi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_fs_pp0 {
+				nvidia,pins = "dap3_fs_pp0";
+				nvidia,function = "i2s2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_din_pp1 {
+				nvidia,pins = "dap3_din_pp1";
+				nvidia,function = "i2s2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_dout_pp2 {
+				nvidia,pins = "dap3_dout_pp2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap3_sclk_pp3 {
+				nvidia,pins = "dap3_sclk_pp3";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_fs_pp4 {
+				nvidia,pins = "dap4_fs_pp4";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_din_pp5 {
+				nvidia,pins = "dap4_din_pp5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_dout_pp6 {
+				nvidia,pins = "dap4_dout_pp6";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap4_sclk_pp7 {
+				nvidia,pins = "dap4_sclk_pp7";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col0_pq0 {
+				nvidia,pins = "kb_col0_pq0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col1_pq1 {
+				nvidia,pins = "kb_col1_pq1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col2_pq2 {
+				nvidia,pins = "kb_col2_pq2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col3_pq3 {
+				nvidia,pins = "kb_col3_pq3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col4_pq4 {
+				nvidia,pins = "kb_col4_pq4";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col5_pq5 {
+				nvidia,pins = "kb_col5_pq5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_col6_pq6 {
+				nvidia,pins = "kb_col6_pq6";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_col7_pq7 {
+				nvidia,pins = "kb_col7_pq7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row0_pr0 {
+				nvidia,pins = "kb_row0_pr0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row1_pr1 {
+				nvidia,pins = "kb_row1_pr1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row2_pr2 {
+				nvidia,pins = "kb_row2_pr2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row3_pr3 {
+				nvidia,pins = "kb_row3_pr3";
+				nvidia,function = "kbc";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row4_pr4 {
+				nvidia,pins = "kb_row4_pr4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row5_pr5 {
+				nvidia,pins = "kb_row5_pr5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row6_pr6 {
+				nvidia,pins = "kb_row6_pr6";
+				nvidia,function = "kbc";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row7_pr7 {
+				nvidia,pins = "kb_row7_pr7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row8_ps0 {
+				nvidia,pins = "kb_row8_ps0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row9_ps1 {
+				nvidia,pins = "kb_row9_ps1";
+				nvidia,function = "uarta";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row10_ps2 {
+				nvidia,pins = "kb_row10_ps2";
+				nvidia,function = "uarta";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row11_ps3 {
+				nvidia,pins = "kb_row11_ps3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row12_ps4 {
+				nvidia,pins = "kb_row12_ps4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row13_ps5 {
+				nvidia,pins = "kb_row13_ps5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row14_ps6 {
+				nvidia,pins = "kb_row14_ps6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row15_ps7 {
+				nvidia,pins = "kb_row15_ps7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			kb_row16_pt0 {
+				nvidia,pins = "kb_row16_pt0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			kb_row17_pt1 {
+				nvidia,pins = "kb_row17_pt1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			gen2_i2c_scl_pt5 {
+				nvidia,pins = "gen2_i2c_scl_pt5";
+				nvidia,function = "i2c2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			gen2_i2c_sda_pt6 {
+				nvidia,pins = "gen2_i2c_sda_pt6";
+				nvidia,function = "i2c2";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_cmd_pt7 {
+				nvidia,pins = "sdmmc4_cmd_pt7";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu0 {
+				nvidia,pins = "pu0";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu1 {
+				nvidia,pins = "pu1";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu2 {
+				nvidia,pins = "pu2";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu3 {
+				nvidia,pins = "pu3";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pu4 {
+				nvidia,pins = "pu4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu5 {
+				nvidia,pins = "pu5";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pu6 {
+				nvidia,pins = "pu6";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pv0 {
+				nvidia,pins = "pv0";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pv1 {
+				nvidia,pins = "pv1";
+				nvidia,function = "rsvd1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc3_cd_n_pv2 {
+				nvidia,pins = "sdmmc3_cd_n_pv2";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_wp_n_pv3 {
+				nvidia,pins = "sdmmc1_wp_n_pv3";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ddc_scl_pv4 {
+				nvidia,pins = "ddc_scl_pv4";
+				nvidia,function = "i2c4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			ddc_sda_pv5 {
+				nvidia,pins = "ddc_sda_pv5";
+				nvidia,function = "i2c4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_w2_aud_pw2 {
+				nvidia,pins = "gpio_w2_aud_pw2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_w3_aud_pw3 {
+				nvidia,pins = "gpio_w3_aud_pw3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dap_mclk1_pw4 {
+				nvidia,pins = "dap_mclk1_pw4";
+				nvidia,function = "extperiph1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk2_out_pw5 {
+				nvidia,pins = "clk2_out_pw5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart3_txd_pw6 {
+				nvidia,pins = "uart3_txd_pw6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			uart3_rxd_pw7 {
+				nvidia,pins = "uart3_rxd_pw7";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dvfs_pwm_px0 {
+				nvidia,pins = "dvfs_pwm_px0";
+				nvidia,function = "cldvfs";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x1_aud_px1 {
+				nvidia,pins = "gpio_x1_aud_px1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dvfs_clk_px2 {
+				nvidia,pins = "dvfs_clk_px2";
+				nvidia,function = "cldvfs";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x3_aud_px3 {
+				nvidia,pins = "gpio_x3_aud_px3";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x4_aud_px4 {
+				nvidia,pins = "gpio_x4_aud_px4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			gpio_x5_aud_px5 {
+				nvidia,pins = "gpio_x5_aud_px5";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x6_aud_px6 {
+				nvidia,pins = "gpio_x6_aud_px6";
+				nvidia,function = "gmi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			gpio_x7_aud_px7 {
+				nvidia,pins = "gpio_x7_aud_px7";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_clk_py0 {
+				nvidia,pins = "ulpi_clk_py0";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_dir_py1 {
+				nvidia,pins = "ulpi_dir_py1";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			ulpi_nxt_py2 {
+				nvidia,pins = "ulpi_nxt_py2";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			ulpi_stp_py3 {
+				nvidia,pins = "ulpi_stp_py3";
+				nvidia,function = "spi1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc1_dat3_py4 {
+				nvidia,pins = "sdmmc1_dat3_py4";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat2_py5 {
+				nvidia,pins = "sdmmc1_dat2_py5";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat1_py6 {
+				nvidia,pins = "sdmmc1_dat1_py6";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_dat0_py7 {
+				nvidia,pins = "sdmmc1_dat0_py7";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_clk_pz0 {
+				nvidia,pins = "sdmmc1_clk_pz0";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc1_cmd_pz1 {
+				nvidia,pins = "sdmmc1_cmd_pz1";
+				nvidia,function = "sdmmc1";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pwr_i2c_scl_pz6 {
+				nvidia,pins = "pwr_i2c_scl_pz6";
+				nvidia,function = "i2cpwr";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			pwr_i2c_sda_pz7 {
+				nvidia,pins = "pwr_i2c_sda_pz7";
+				nvidia,function = "i2cpwr";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat0_paa0 {
+				nvidia,pins = "sdmmc4_dat0_paa0";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat1_paa1 {
+				nvidia,pins = "sdmmc4_dat1_paa1";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat2_paa2 {
+				nvidia,pins = "sdmmc4_dat2_paa2";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat3_paa3 {
+				nvidia,pins = "sdmmc4_dat3_paa3";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat4_paa4 {
+				nvidia,pins = "sdmmc4_dat4_paa4";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat5_paa5 {
+				nvidia,pins = "sdmmc4_dat5_paa5";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat6_paa6 {
+				nvidia,pins = "sdmmc4_dat6_paa6";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc4_dat7_paa7 {
+				nvidia,pins = "sdmmc4_dat7_paa7";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			pbb0 {
+				nvidia,pins = "pbb0";
+				nvidia,function = "vgp6";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cam_i2c_scl_pbb1 {
+				nvidia,pins = "cam_i2c_scl_pbb1";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			cam_i2c_sda_pbb2 {
+				nvidia,pins = "cam_i2c_sda_pbb2";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			pbb3 {
+				nvidia,pins = "pbb3";
+				nvidia,function = "vgp3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb4 {
+				nvidia,pins = "pbb4";
+				nvidia,function = "vgp4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb5 {
+				nvidia,pins = "pbb5";
+				nvidia,function = "rsvd3";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb6 {
+				nvidia,pins = "pbb6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pbb7 {
+				nvidia,pins = "pbb7";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cam_mclk_pcc0 {
+				nvidia,pins = "cam_mclk_pcc0";
+				nvidia,function = "vi";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pcc1 {
+				nvidia,pins = "pcc1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pcc2 {
+				nvidia,pins = "pcc2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc4_clk_pcc4 {
+				nvidia,pins = "sdmmc4_clk_pcc4";
+				nvidia,function = "sdmmc4";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			clk2_req_pcc5 {
+				nvidia,pins = "clk2_req_pcc5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l0_rst_n_pdd1 {
+				nvidia,pins = "pex_l0_rst_n_pdd1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l0_clkreq_n_pdd2 {
+				nvidia,pins = "pex_l0_clkreq_n_pdd2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_wake_n_pdd3 {
+				nvidia,pins = "pex_wake_n_pdd3";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l1_rst_n_pdd5 {
+				nvidia,pins = "pex_l1_rst_n_pdd5";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pex_l1_clkreq_n_pdd6 {
+				nvidia,pins = "pex_l1_clkreq_n_pdd6";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk3_out_pee0 {
+				nvidia,pins = "clk3_out_pee0";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			clk3_req_pee1 {
+				nvidia,pins = "clk3_req_pee1";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			dap_mclk1_req_pee2 {
+				nvidia,pins = "dap_mclk1_req_pee2";
+				nvidia,function = "rsvd4";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			hdmi_cec_pee3 {
+				nvidia,pins = "hdmi_cec_pee3";
+				nvidia,function = "cec";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+			};
+			sdmmc3_clk_lb_out_pee4 {
+				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			sdmmc3_clk_lb_in_pee5 {
+				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
+				nvidia,function = "sdmmc3";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			dp_hpd_pff0 {
+				nvidia,pins = "dp_hpd_pff0";
+				nvidia,function = "dp";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			usb_vbus_en2_pff1 {
+				nvidia,pins = "usb_vbus_en2_pff1";
+				nvidia,function = "usb";
+				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			pff2 {
+				nvidia,pins = "pff2";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+			};
+			core_pwr_req {
+				nvidia,pins = "core_pwr_req";
+				nvidia,function = "pwron";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			cpu_pwr_req {
+				nvidia,pins = "cpu_pwr_req";
+				nvidia,function = "cpu";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			pwr_int_n {
+				nvidia,pins = "pwr_int_n";
+				nvidia,function = "pmi";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			reset_out_n {
+				nvidia,pins = "reset_out_n";
+				nvidia,function = "reset_out_n";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+			owr {
+				nvidia,pins = "owr";
+				nvidia,function = "rsvd2";
+				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+			};
+			clk_32k_in {
+				nvidia,pins = "clk_32k_in";
+				nvidia,function = "clk";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+			};
+			jtag_rtck {
+				nvidia,pins = "jtag_rtck";
+				nvidia,function = "rtck";
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
+				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+			};
+		};
+	};
+};
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (6 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 07/11] ARM: tegra: Add DTS for the nyan-blaze board Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:32   ` Stephen Warren
  2015-01-15 17:33   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan Tomeu Vizoso
                   ` (4 subsequent siblings)
  12 siblings, 2 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Chris Ball, devicetree, linux-kernel,
	linux-mmc

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt | 2 ++
 drivers/mmc/core/pwrseq_simple.c                            | 8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
index 6fe0cd6..b353381 100644
--- a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
@@ -14,10 +14,12 @@ Required properties:
 Optional properties:
 - reset-gpios : contains a list of GPIO specifiers, though currently only one
 		specifier is supported.
+- delay : delay to wait after driving the reset gpio active [ms].
 
 Example:
 
 	sdhci0_pwrseq {
 		compatible = "mmc,pwrseq-simple";
 		reset-gpios = <&gpio1 12 0>;
+		delay = <20>;
 	}
diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
index 42d9836..3e521cc 100644
--- a/drivers/mmc/core/pwrseq_simple.c
+++ b/drivers/mmc/core/pwrseq_simple.c
@@ -12,14 +12,17 @@
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/gpio/consumer.h>
+#include <linux/of_platform.h>
 
 #include <linux/mmc/host.h>
 
+#include "core.h"
 #include "pwrseq.h"
 
 struct mmc_pwrseq_simple {
 	struct mmc_pwrseq pwrseq;
 	struct gpio_desc *reset_gpio;
+	unsigned int delay_ms;
 };
 
 static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host)
@@ -29,6 +32,9 @@ static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host)
 
 	if (!IS_ERR(pwrseq->reset_gpio))
 		gpiod_set_value_cansleep(pwrseq->reset_gpio, 1);
+
+	if (pwrseq->delay_ms)
+		mmc_delay(pwrseq->delay_ms);
 }
 
 static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host)
@@ -76,6 +82,8 @@ int mmc_pwrseq_simple_alloc(struct mmc_host *host, struct device *dev)
 		goto free;
 	}
 
+	of_property_read_u32(dev->of_node, "delay", &pwrseq->delay_ms);
+
 	pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops;
 	host->pwrseq = &pwrseq->pwrseq;
 
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (7 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 17:34   ` Stephen Warren
  2015-01-15 16:12 ` [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch Tomeu Vizoso
                   ` (3 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Stephen Warren,
	Thierry Reding, Alexandre Courbot, devicetree, linux-arm-kernel,
	linux-kernel

The Nyan boards have a Marvell 88w8897 wifi card connected through SDIO
that need the reset line to be hold active for several milliseconds.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm/boot/dts/tegra124-nyan.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index 25bbcbe..dbaf261f 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -365,11 +365,19 @@
 		status = "okay";
 	};
 
+	sdhci0_pwrseq: sdhci0_pwrseq {
+		compatible = "mmc,pwrseq-simple";
+
+                reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
+                delay = <20>; /* ms */
+	};
+
 	sdhci@0,700b0000 { /* WiFi/BT on this bus */
 		status = "okay";
 		bus-width = <4>;
 		no-1-8-v;
 		non-removable;
+		mmc-pwrseq = <&sdhci0_pwrseq>;
 	};
 
 	sdhci@0,700b0400 { /* SD Card on this bus */
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (8 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 16:20   ` Mark Brown
  2015-01-15 16:12 ` [PATCH v2 11/11] ASoC: tegra: add sink for the internal mic to tegra_max98090 Tomeu Vizoso
                   ` (2 subsequent siblings)
  12 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Liam Girdwood, Mark Brown, Jaroslav Kysela,
	Takashi Iwai, Stephen Warren, Thierry Reding, Alexandre Courbot,
	Lars-Peter Clausen, Wolfram Sang, alsa-devel, linux-kernel

To be used by userspace when the headphones jack is plugged in.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 sound/soc/tegra/tegra_max98090.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/soc/tegra/tegra_max98090.c b/sound/soc/tegra/tegra_max98090.c
index af3fb99..8df71a4 100644
--- a/sound/soc/tegra/tegra_max98090.c
+++ b/sound/soc/tegra/tegra_max98090.c
@@ -136,6 +136,7 @@ static const struct snd_soc_dapm_widget tegra_max98090_dapm_widgets[] = {
 };
 
 static const struct snd_kcontrol_new tegra_max98090_controls[] = {
+	SOC_DAPM_PIN_SWITCH("Headphones"),
 	SOC_DAPM_PIN_SWITCH("Speakers"),
 };
 
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* [PATCH v2 11/11] ASoC: tegra: add sink for the internal mic to tegra_max98090
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (9 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch Tomeu Vizoso
@ 2015-01-15 16:12 ` Tomeu Vizoso
  2015-01-15 16:43 ` [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Dylan Reid
  2015-01-15 17:14 ` Mark Brown
  12 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 16:12 UTC (permalink / raw)
  To: linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Tomeu Vizoso, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Stephen Warren, Thierry Reding,
	Alexandre Courbot, Liam Girdwood, Mark Brown, Jaroslav Kysela,
	Takashi Iwai, Wolfram Sang, Lars-Peter Clausen, devicetree,
	linux-kernel, alsa-devel

This is used in the Tegra-based Chromebooks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt | 1 +
 sound/soc/tegra/tegra_max98090.c                                        | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt
index c949abc..c3495be 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt
@@ -18,6 +18,7 @@ Required properties:
   * Headphones
   * Speakers
   * Mic Jack
+  * Int Mic
 
 - nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
   connected to the CODEC.
diff --git a/sound/soc/tegra/tegra_max98090.c b/sound/soc/tegra/tegra_max98090.c
index 8df71a4..29ea87c 100644
--- a/sound/soc/tegra/tegra_max98090.c
+++ b/sound/soc/tegra/tegra_max98090.c
@@ -133,11 +133,13 @@ static const struct snd_soc_dapm_widget tegra_max98090_dapm_widgets[] = {
 	SND_SOC_DAPM_HP("Headphones", NULL),
 	SND_SOC_DAPM_SPK("Speakers", NULL),
 	SND_SOC_DAPM_MIC("Mic Jack", NULL),
+	SND_SOC_DAPM_MIC("Int Mic", NULL),
 };
 
 static const struct snd_kcontrol_new tegra_max98090_controls[] = {
 	SOC_DAPM_PIN_SWITCH("Headphones"),
 	SOC_DAPM_PIN_SWITCH("Speakers"),
+	SOC_DAPM_PIN_SWITCH("Int Mic"),
 };
 
 static int tegra_max98090_asoc_init(struct snd_soc_pcm_runtime *rtd)
-- 
1.9.3


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch
  2015-01-15 16:12 ` [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch Tomeu Vizoso
@ 2015-01-15 16:20   ` Mark Brown
  2015-01-15 17:02     ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Mark Brown @ 2015-01-15 16:20 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
	Stephen Warren, Thierry Reding, Alexandre Courbot,
	Lars-Peter Clausen, Wolfram Sang, alsa-devel, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 192 bytes --]

On Thu, Jan 15, 2015 at 05:12:22PM +0100, Tomeu Vizoso wrote:
> To be used by userspace when the headphones jack is plugged in.

I'm missing patches 1-9 of this series, what's going on there?

[-- Attachment #2: Digital signature --]
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^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 00/11] Improvements to Tegra-based Chromebook support
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (10 preceding siblings ...)
  2015-01-15 16:12 ` [PATCH v2 11/11] ASoC: tegra: add sink for the internal mic to tegra_max98090 Tomeu Vizoso
@ 2015-01-15 16:43 ` Dylan Reid
  2015-01-15 17:14 ` Mark Brown
  12 siblings, 0 replies; 40+ messages in thread
From: Dylan Reid @ 2015-01-15 16:43 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Simon Glass, Ulf Hansson,
	linux-kernel

On Thu, Jan 15, 2015 at 8:12 AM, Tomeu Vizoso
<tomeu.vizoso@collabora.com> wrote:
> Hi,
>
> this started as adding support for the Nyan Blaze, but the Big is so similar to it that I thought it would be better to have both in the same series.
>
> With these changes, I get wifi, trackpad, audio playback and recording (with the internal mic) working in both machines.
>
> Patches 2 and 7 use the pinmux data as generated by tegra-pinmux-scripts. I will be sending patches adding the configs for the boards to it. I have chosen to copy the whole pinmux data to each leaf .dts even if they are very similar because it will be easier that way to check in the future that they match the canonical data in tegra-pinmux-scripts.
>
> Patch 3 changes the nvidia,model of the sound card, so that the exposed card name is GoogleNyan instead of just "A13" as it was before. I'm leaning towards having just one UCM config for both machines, but I'm not totally convinced of it and would love to hear other opinions.

ChromeOS uses one config for both.  The only audio difference between
these two boards is the speakers, that isn't represented in UCM, so
one config file is fine.

>
> Patches 8 and 9 depend on Ulf's pwrseq series [0].
>
> http://cgit.collabora.com/git/user/tomeu/linux.git/log/?h=nyan-v2
>
> [0] http://thread.gmane.org/gmane.linux.kernel.mmc/30611
>
> Stéphane Marchesin (1):
>   drm/panel: add support for Samsung LTN140AT29 panel
>
> Tomeu Vizoso (10):
>   ARM: tegra: Add node for trackpad in Nyan boards
>   ARM: tegra: Use the generated pinmux data
>   ARM: tegra: Set the sound card model that alsaucm expects
>   ARM: tegra: Set spi-max-frequency property to flash node
>   ARM: tegra: Move out nyan-generic parts out from the nyan-big DT
>   ARM: tegra: Add DTS for the nyan-blaze board
>   mmc: pwrseq_simple: Add support for a delay
>   ARM: tegra: Use pwrseq-simple for the wifi in Nyan
>   ASoC: tegra: Add a control for the headphone switch
>   ASoC: tegra: add sink for the internal mic to tegra_max98090
>
>  .../devicetree/bindings/mmc/mmc,pwrseq-simple.txt  |    2 +
>  .../bindings/sound/nvidia,tegra-audio-max98090.txt |    1 +
>  arch/arm/boot/dts/Makefile                         |    1 +
>  arch/arm/boot/dts/tegra124-nyan-big.dts            | 2112 +++++++++++---------
>  arch/arm/boot/dts/tegra124-nyan-blaze.dts          | 1325 ++++++++++++
>  arch/arm/boot/dts/tegra124-nyan.dtsi               |  692 +++++++
>  drivers/gpu/drm/panel/panel-simple.c               |   26 +
>  drivers/mmc/core/pwrseq_simple.c                   |    8 +
>  sound/soc/tegra/tegra_max98090.c                   |    3 +
>  9 files changed, 3209 insertions(+), 961 deletions(-)
>  create mode 100644 arch/arm/boot/dts/tegra124-nyan-blaze.dts
>  create mode 100644 arch/arm/boot/dts/tegra124-nyan.dtsi
>
> --
> 1.9.3
>

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch
  2015-01-15 16:20   ` Mark Brown
@ 2015-01-15 17:02     ` Tomeu Vizoso
  2015-01-15 17:09       ` Mark Brown
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-15 17:02 UTC (permalink / raw)
  To: Mark Brown
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
	Stephen Warren, Thierry Reding, Alexandre Courbot,
	Lars-Peter Clausen, Wolfram Sang, alsa-devel, linux-kernel

On 15 January 2015 at 17:20, Mark Brown <broonie@kernel.org> wrote:
> On Thu, Jan 15, 2015 at 05:12:22PM +0100, Tomeu Vizoso wrote:
>> To be used by userspace when the headphones jack is plugged in.
>
> I'm missing patches 1-9 of this series, what's going on there?

Sorry, no idea. They have reached lkml though:

https://lkml.org/lkml/2015/1/15/473

Regards,

Tomeu

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch
  2015-01-15 17:02     ` Tomeu Vizoso
@ 2015-01-15 17:09       ` Mark Brown
  0 siblings, 0 replies; 40+ messages in thread
From: Mark Brown @ 2015-01-15 17:09 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
	Stephen Warren, Thierry Reding, Alexandre Courbot,
	Lars-Peter Clausen, Wolfram Sang, alsa-devel, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 680 bytes --]

On Thu, Jan 15, 2015 at 06:02:51PM +0100, Tomeu Vizoso wrote:
> On 15 January 2015 at 17:20, Mark Brown <broonie@kernel.org> wrote:
> > On Thu, Jan 15, 2015 at 05:12:22PM +0100, Tomeu Vizoso wrote:
> >> To be used by userspace when the headphones jack is plugged in.

> > I'm missing patches 1-9 of this series, what's going on there?

> Sorry, no idea. They have reached lkml though:

> https://lkml.org/lkml/2015/1/15/473

What's going wrong there is that you didn't CC me on either them or the
cover letter - you should always make sure that everyone is at least
getting the cover letter so they know what's going on.  Never assume
anyone is going to see anything on the list.

[-- Attachment #2: Digital signature --]
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^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 00/11] Improvements to Tegra-based Chromebook support
  2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
                   ` (11 preceding siblings ...)
  2015-01-15 16:43 ` [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Dylan Reid
@ 2015-01-15 17:14 ` Mark Brown
  12 siblings, 0 replies; 40+ messages in thread
From: Mark Brown @ 2015-01-15 17:14 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 567 bytes --]

On Thu, Jan 15, 2015 at 05:12:12PM +0100, Tomeu Vizoso wrote:

Please fix your mailer to word wrap within paragraphs so your mails are
more legible, I've reflowed.

> this started as adding support for the Nyan Blaze, but the Big is so
> similar to it that I thought it would be better to have both in the
> same series.

This seems like a series of unrelated patch series rather than a single
one and so should probably have been sent as such, they're all
independent of each other.  I'd probably have sent each of the things
you list in paragraphs here separately.

[-- Attachment #2: Digital signature --]
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^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-15 16:12 ` [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects Tomeu Vizoso
@ 2015-01-15 17:22   ` Stephen Warren
  2015-01-16  8:50     ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:22 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> Patches are on its way to add a config file to alsaucm for the Nyan
> boards. Use the same card ID that alsaucm will expect.
>
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> ---
>   arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
> index 43e58a4..9a9cffe 100644
> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
> @@ -1976,9 +1976,9 @@
>   	};
>
>   	sound {
> -		compatible = "nvidia,tegra-audio-max98090-nyan-big",
> +		compatible = "nvidia,tegra-audio-max98090-nyan",
>   			     "nvidia,tegra-audio-max98090";

If all the boards that are derived from Nyan truly have identical audio 
HW (or at least any differences can be described by this binding), then 
it seems fine to add "nvidia,tegra-audio-max98090-nyan" to the 
compatible value.

However, I don't see a reason to remove the board-specific compatible 
value "nvidia,tegra-audio-max98090-nyan-big"; we should always include 
all the values that are relevant.

> -		nvidia,model = "Acer Chromebook 13";
> +		nvidia,model = "GoogleNyan";

Why not just name the UCM config file after the ASoC card name that's 
already in use? Perhaps it's not likely to be unique enough though:-(

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data
  2015-01-15 16:12 ` [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data Tomeu Vizoso
@ 2015-01-15 17:25   ` Stephen Warren
  2015-01-20 13:59     ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:25 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Russell King, Thierry Reding, Alexandre Courbot, devicetree,
	linux-arm-kernel, linux-kernel

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> Google has submitted a board config for the pinmux programming of the
> Nyan Big board. Use the whole of it as it's generated to make it easier
> to update as the configuration gets fixed in the future.

Submitted to where? I assume you mean tegra-pinmux-scripts. I don't see 
a Nyan/Nyan-big configuration there yet. IIRC (and I might not) one was 
posted, but there were some review comments that aren't yet addressed?

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node
  2015-01-15 16:12 ` [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node Tomeu Vizoso
@ 2015-01-15 17:26   ` Stephen Warren
  2015-01-27 11:13     ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:26 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Russell King, Thierry Reding, Alexandre Courbot, devicetree,
	linux-arm-kernel, linux-kernel

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> To silence a warning on Nyan boards.
>
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> ---
>   arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
> index 9a9cffe..94c7ba9 100644
> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
> @@ -1660,6 +1660,7 @@
>
>   		flash@0 {
>   			compatible = "winbond,w25q32dw";
> +			spi-max-frequency = <25000000>;

This property already exists in the SPI controller. Isn't the max 
frequency supposed to inherit from there? If so, shouldn't the code not 
warn when such inheritance happens, i.e. it'd be better to fix the code?

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT
  2015-01-15 16:12 ` [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT Tomeu Vizoso
@ 2015-01-15 17:28   ` Stephen Warren
  2015-01-27 12:57     ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:28 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Russell King, Thierry Reding, Alexandre Courbot, devicetree,
	linux-arm-kernel, linux-kernel

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> In preparation for adding the DT for the nyan-blaze board.

"git format-patch -C" might help here; hopefully it'd highlight that 
arch/arm/boot/dts/tegra124-nyan.dtsi was a copy from 
arch/arm/boot/dts/tegra124-nyan-big.dts, with just a few small diffs?

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-15 16:12 ` [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay Tomeu Vizoso
@ 2015-01-15 17:32   ` Stephen Warren
  2015-01-15 17:33   ` Stephen Warren
  1 sibling, 0 replies; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:32 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Chris Ball, devicetree, linux-kernel, linux-mmc

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>

Some explanation of why such a delay might be useful would be ... useful!

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-15 16:12 ` [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay Tomeu Vizoso
  2015-01-15 17:32   ` Stephen Warren
@ 2015-01-15 17:33   ` Stephen Warren
  2015-01-21 10:44     ` Ulf Hansson
  1 sibling, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:33 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Chris Ball, devicetree, linux-kernel, linux-mmc

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>

Ah, having read the explanation in the next patch, I think ...

> diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt

> +- delay : delay to wait after driving the reset gpio active [ms].

... delay is the wrong name. reset-pulse-width or reset-pulse-length 
would be better. delay sounds like a delay after resetting the device 
before it can be accessed.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan
  2015-01-15 16:12 ` [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan Tomeu Vizoso
@ 2015-01-15 17:34   ` Stephen Warren
  0 siblings, 0 replies; 40+ messages in thread
From: Stephen Warren @ 2015-01-15 17:34 UTC (permalink / raw)
  To: Tomeu Vizoso, linux-tegra
  Cc: Javier Martinez Canillas, Dylan Reid, Simon Glass, Ulf Hansson,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Russell King, Thierry Reding, Alexandre Courbot, devicetree,
	linux-arm-kernel, linux-kernel

On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
> The Nyan boards have a Marvell 88w8897 wifi card connected through SDIO
> that need the reset line to be hold active for several milliseconds.

> diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi

> +	sdhci0_pwrseq: sdhci0_pwrseq {
> +		compatible = "mmc,pwrseq-simple";
> +
> +                reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
> +                delay = <20>; /* ms */

Some of these new lines are indented with spaces not TABs.


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-15 17:22   ` Stephen Warren
@ 2015-01-16  8:50     ` Tomeu Vizoso
  2015-01-16  9:01       ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-16  8:50 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 15 January 2015 at 18:22, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>
>> Patches are on its way to add a config file to alsaucm for the Nyan
>> boards. Use the same card ID that alsaucm will expect.
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> ---
>>   arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>> index 43e58a4..9a9cffe 100644
>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>> @@ -1976,9 +1976,9 @@
>>         };
>>
>>         sound {
>> -               compatible = "nvidia,tegra-audio-max98090-nyan-big",
>> +               compatible = "nvidia,tegra-audio-max98090-nyan",
>>                              "nvidia,tegra-audio-max98090";
>
>
> If all the boards that are derived from Nyan truly have identical audio HW
> (or at least any differences can be described by this binding), then it
> seems fine to add "nvidia,tegra-audio-max98090-nyan" to the compatible
> value.



> However, I don't see a reason to remove the board-specific compatible value
> "nvidia,tegra-audio-max98090-nyan-big"; we should always include all the
> values that are relevant.

Ok.

>> -               nvidia,model = "Acer Chromebook 13";
>> +               nvidia,model = "GoogleNyan";
>
>
> Why not just name the UCM config file after the ASoC card name that's
> already in use? Perhaps it's not likely to be unique enough though:-(

Yeah, that would be A13, which isn't terribly useful.

Regards,

Tomeu

> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-16  8:50     ` Tomeu Vizoso
@ 2015-01-16  9:01       ` Tomeu Vizoso
  2015-01-19 17:10         ` Stephen Warren
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-16  9:01 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 16 January 2015 at 09:50, Tomeu Vizoso <tomeu.vizoso@collabora.com> wrote:
> On 15 January 2015 at 18:22, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>
>>> Patches are on its way to add a config file to alsaucm for the Nyan
>>> boards. Use the same card ID that alsaucm will expect.
>>>
>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>> ---
>>>   arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> index 43e58a4..9a9cffe 100644
>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> @@ -1976,9 +1976,9 @@
>>>         };
>>>
>>>         sound {
>>> -               compatible = "nvidia,tegra-audio-max98090-nyan-big",
>>> +               compatible = "nvidia,tegra-audio-max98090-nyan",
>>>                              "nvidia,tegra-audio-max98090";
>>
>>
>> If all the boards that are derived from Nyan truly have identical audio HW
>> (or at least any differences can be described by this binding), then it
>> seems fine to add "nvidia,tegra-audio-max98090-nyan" to the compatible
>> value.
>
>
>
>> However, I don't see a reason to remove the board-specific compatible value
>> "nvidia,tegra-audio-max98090-nyan-big"; we should always include all the
>> values that are relevant.
>
> Ok.

Oh, actually, my intention was to move the whole sound node to the
nyan dtsi, as there isn't anything specific to the blaze regarding
sound.

Regards,

Tomeu

>>> -               nvidia,model = "Acer Chromebook 13";
>>> +               nvidia,model = "GoogleNyan";
>>
>>
>> Why not just name the UCM config file after the ASoC card name that's
>> already in use? Perhaps it's not likely to be unique enough though:-(
>
> Yeah, that would be A13, which isn't terribly useful.
>
> Regards,
>
> Tomeu
>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel
  2015-01-15 16:12 ` [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel Tomeu Vizoso
@ 2015-01-16 12:23   ` Thierry Reding
  0 siblings, 0 replies; 40+ messages in thread
From: Thierry Reding @ 2015-01-16 12:23 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Stéphane Marchesin, David Airlie, dri-devel,
	linux-kernel

[-- Attachment #1: Type: text/plain, Size: 551 bytes --]

On Thu, Jan 15, 2015 at 05:12:17PM +0100, Tomeu Vizoso wrote:
> From: Stéphane Marchesin <marcheu@chromium.org>
> 
> This panel is used by the Nyan Blaze board and supported by the simple-panel
> driver.
> 
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)

This is missing device tree binding documentation. Also since the patch
is from Stéphane you should probably add a Signed-off-by line from him.

Thierry

[-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --]

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-16  9:01       ` Tomeu Vizoso
@ 2015-01-19 17:10         ` Stephen Warren
  2015-01-19 17:11           ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-19 17:10 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 01/16/2015 02:01 AM, Tomeu Vizoso wrote:
> On 16 January 2015 at 09:50, Tomeu Vizoso <tomeu.vizoso@collabora.com> wrote:
>> On 15 January 2015 at 18:22, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>
>>>> Patches are on its way to add a config file to alsaucm for the Nyan
>>>> boards. Use the same card ID that alsaucm will expect.
>>>>
>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>> ---
>>>>    arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> index 43e58a4..9a9cffe 100644
>>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> @@ -1976,9 +1976,9 @@
>>>>          };
>>>>
>>>>          sound {
>>>> -               compatible = "nvidia,tegra-audio-max98090-nyan-big",
>>>> +               compatible = "nvidia,tegra-audio-max98090-nyan",
>>>>                               "nvidia,tegra-audio-max98090";
>>>
>>>
>>> If all the boards that are derived from Nyan truly have identical audio HW
>>> (or at least any differences can be described by this binding), then it
>>> seems fine to add "nvidia,tegra-audio-max98090-nyan" to the compatible
>>> value.
>>
>>
>>
>>> However, I don't see a reason to remove the board-specific compatible value
>>> "nvidia,tegra-audio-max98090-nyan-big"; we should always include all the
>>> values that are relevant.
>>
>> Ok.
>
> Oh, actually, my intention was to move the whole sound node to the
> nyan dtsi, as there isn't anything specific to the blaze regarding
> sound.

There are zero differences between the sound circuits of the boards? If 
so, that sounds fine. I suppose if we do need to apply a quirk to one 
board but not the other, we can always fall back on the top-level 
compatible value if we absolutely have to.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-19 17:10         ` Stephen Warren
@ 2015-01-19 17:11           ` Tomeu Vizoso
  2015-01-20 17:01             ` Dylan Reid
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-19 17:11 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 19 January 2015 at 18:10, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/16/2015 02:01 AM, Tomeu Vizoso wrote:
>>
>> On 16 January 2015 at 09:50, Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> wrote:
>>>
>>> On 15 January 2015 at 18:22, Stephen Warren <swarren@wwwdotorg.org>
>>> wrote:
>>>>
>>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>>
>>>>>
>>>>> Patches are on its way to add a config file to alsaucm for the Nyan
>>>>> boards. Use the same card ID that alsaucm will expect.
>>>>>
>>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>>> ---
>>>>>    arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>>>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>> index 43e58a4..9a9cffe 100644
>>>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>> @@ -1976,9 +1976,9 @@
>>>>>          };
>>>>>
>>>>>          sound {
>>>>> -               compatible = "nvidia,tegra-audio-max98090-nyan-big",
>>>>> +               compatible = "nvidia,tegra-audio-max98090-nyan",
>>>>>                               "nvidia,tegra-audio-max98090";
>>>>
>>>>
>>>>
>>>> If all the boards that are derived from Nyan truly have identical audio
>>>> HW
>>>> (or at least any differences can be described by this binding), then it
>>>> seems fine to add "nvidia,tegra-audio-max98090-nyan" to the compatible
>>>> value.
>>>
>>>
>>>
>>>
>>>> However, I don't see a reason to remove the board-specific compatible
>>>> value
>>>> "nvidia,tegra-audio-max98090-nyan-big"; we should always include all the
>>>> values that are relevant.
>>>
>>>
>>> Ok.
>>
>>
>> Oh, actually, my intention was to move the whole sound node to the
>> nyan dtsi, as there isn't anything specific to the blaze regarding
>> sound.
>
>
> There are zero differences between the sound circuits of the boards? If so,
> that sounds fine. I suppose if we do need to apply a quirk to one board but
> not the other, we can always fall back on the top-level compatible value if
> we absolutely have to.

Yeah, this is what Dylan said in other thread:

"ChromeOS uses one config for both.  The only audio difference between
these two boards is the speakers, that isn't represented in UCM, so
one config file is fine."

Regards,

Tomeu

> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data
  2015-01-15 17:25   ` Stephen Warren
@ 2015-01-20 13:59     ` Tomeu Vizoso
  2015-01-20 16:20       ` Stephen Warren
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-20 13:59 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 15 January 2015 at 18:25, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>
>> Google has submitted a board config for the pinmux programming of the
>> Nyan Big board. Use the whole of it as it's generated to make it easier
>> to update as the configuration gets fixed in the future.
>
>
> Submitted to where? I assume you mean tegra-pinmux-scripts. I don't see a
> Nyan/Nyan-big configuration there yet. IIRC (and I might not) one was
> posted, but there were some review comments that aren't yet addressed?

Yeah, that's what I meant by submitted. TTBOMK the v2 doesn't have any
comments pending of being addressed?

I have just sent a pinmux config file for the blaze that just changes
the configuration of usb_vbus_en0, usb_vbus_en1 and dp_hpd pins.

Regards,

Tomeu

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data
  2015-01-20 13:59     ` Tomeu Vizoso
@ 2015-01-20 16:20       ` Stephen Warren
  0 siblings, 0 replies; 40+ messages in thread
From: Stephen Warren @ 2015-01-20 16:20 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 01/20/2015 06:59 AM, Tomeu Vizoso wrote:
> On 15 January 2015 at 18:25, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>
>>> Google has submitted a board config for the pinmux programming of the
>>> Nyan Big board. Use the whole of it as it's generated to make it easier
>>> to update as the configuration gets fixed in the future.
>>
>>
>> Submitted to where? I assume you mean tegra-pinmux-scripts. I don't see a
>> Nyan/Nyan-big configuration there yet. IIRC (and I might not) one was
>> posted, but there were some review comments that aren't yet addressed?
>
> Yeah, that's what I meant by submitted. TTBOMK the v2 doesn't have any
> comments pending of being addressed?

There's a thread where you and Andrew are discussing the settings for a 
bunch of the pins, and the differences between Big and Blaze. It didn't 
seem to me that the resolution was that the V2 patch was fine as is, but 
perhaps that's what the thread meant!

Either way, it'd be nice if Andrew or someone else from ChromeOS could 
give an acked-by/reviewed-by for the patch if it's OK as is. That way, 
I'll know it's good without any doubts.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects
  2015-01-19 17:11           ` Tomeu Vizoso
@ 2015-01-20 17:01             ` Dylan Reid
  0 siblings, 0 replies; 40+ messages in thread
From: Dylan Reid @ 2015-01-20 17:01 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: Stephen Warren, linux-tegra, Javier Martinez Canillas,
	Simon Glass, Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Russell King, Thierry Reding,
	Alexandre Courbot, devicetree, linux-arm-kernel, linux-kernel

On Mon, Jan 19, 2015 at 9:11 AM, Tomeu Vizoso
<tomeu.vizoso@collabora.com> wrote:
> On 19 January 2015 at 18:10, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 01/16/2015 02:01 AM, Tomeu Vizoso wrote:
>>>
>>> On 16 January 2015 at 09:50, Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>> wrote:
>>>>
>>>> On 15 January 2015 at 18:22, Stephen Warren <swarren@wwwdotorg.org>
>>>> wrote:
>>>>>
>>>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>>>
>>>>>>
>>>>>> Patches are on its way to add a config file to alsaucm for the Nyan
>>>>>> boards. Use the same card ID that alsaucm will expect.
>>>>>>
>>>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>>>> ---
>>>>>>    arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
>>>>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>>>>
>>>>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>>> index 43e58a4..9a9cffe 100644
>>>>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>>>> @@ -1976,9 +1976,9 @@
>>>>>>          };
>>>>>>
>>>>>>          sound {
>>>>>> -               compatible = "nvidia,tegra-audio-max98090-nyan-big",
>>>>>> +               compatible = "nvidia,tegra-audio-max98090-nyan",
>>>>>>                               "nvidia,tegra-audio-max98090";
>>>>>
>>>>>
>>>>>
>>>>> If all the boards that are derived from Nyan truly have identical audio
>>>>> HW
>>>>> (or at least any differences can be described by this binding), then it
>>>>> seems fine to add "nvidia,tegra-audio-max98090-nyan" to the compatible
>>>>> value.
>>>>
>>>>
>>>>
>>>>
>>>>> However, I don't see a reason to remove the board-specific compatible
>>>>> value
>>>>> "nvidia,tegra-audio-max98090-nyan-big"; we should always include all the
>>>>> values that are relevant.
>>>>
>>>>
>>>> Ok.
>>>
>>>
>>> Oh, actually, my intention was to move the whole sound node to the
>>> nyan dtsi, as there isn't anything specific to the blaze regarding
>>> sound.
>>
>>
>> There are zero differences between the sound circuits of the boards? If so,
>> that sounds fine. I suppose if we do need to apply a quirk to one board but
>> not the other, we can always fall back on the top-level compatible value if
>> we absolutely have to.
>
> Yeah, this is what Dylan said in other thread:
>
> "ChromeOS uses one config for both.  The only audio difference between
> these two boards is the speakers, that isn't represented in UCM, so
> one config file is fine."

Correct, they share the same headset chip and codec, they are both
wired up the same.

>
> Regards,
>
> Tomeu
>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-15 17:33   ` Stephen Warren
@ 2015-01-21 10:44     ` Ulf Hansson
  2015-01-21 13:54       ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Ulf Hansson @ 2015-01-21 10:44 UTC (permalink / raw)
  To: Stephen Warren, Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Chris Ball, devicetree, linux-kernel, linux-mmc

On 15 January 2015 at 18:33, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>
>
> Ah, having read the explanation in the next patch, I think ...
>
>> diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>> b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>
>
>> +- delay : delay to wait after driving the reset gpio active [ms].
>
>
> ... delay is the wrong name. reset-pulse-width or reset-pulse-length would
> be better. delay sounds like a delay after resetting the device before it
> can be accessed.

I agree with Stephen's proposal.

This patch needs to be rebased and retested on latest version the
mmc-pwrseq patches. Moreover, if you think the patchset which $subject
patch is a part of is material for 3.20, I will need to share an
immutable branch with the mmc-pwrseq patches for ARM SOC to pull in,
tell me if you need that.

Kind regards
Uffe

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-21 10:44     ` Ulf Hansson
@ 2015-01-21 13:54       ` Tomeu Vizoso
  2015-01-21 14:15         ` Ulf Hansson
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-21 13:54 UTC (permalink / raw)
  To: Ulf Hansson, Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Chris Ball, devicetree, linux-kernel, linux-mmc

On 01/21/2015 11:44 AM, Ulf Hansson wrote:
> On 15 January 2015 at 18:33, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>
>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>
>>
>> Ah, having read the explanation in the next patch, I think ...
>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>> b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>
>>
>>> +- delay : delay to wait after driving the reset gpio active [ms].
>>
>>
>> ... delay is the wrong name. reset-pulse-width or reset-pulse-length would
>> be better. delay sounds like a delay after resetting the device before it
>> can be accessed.
> 
> I agree with Stephen's proposal.

Cool.

> This patch needs to be rebased and retested on latest version the
> mmc-pwrseq patches.

Sure.

> Moreover, if you think the patchset which $subject
> patch is a part of is material for 3.20, I will need to share an
> immutable branch with the mmc-pwrseq patches for ARM SOC to pull in,
> tell me if you need that.

I don't think this will make 3.20 as I have other series with higher
priority and there's quite some work left to do on this one.

Regards,

Tomeu

> Kind regards
> Uffe
> 


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-21 13:54       ` Tomeu Vizoso
@ 2015-01-21 14:15         ` Ulf Hansson
  2015-01-21 14:55           ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Ulf Hansson @ 2015-01-21 14:15 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: Stephen Warren, linux-tegra, Javier Martinez Canillas,
	Dylan Reid, Simon Glass, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Chris Ball, devicetree, linux-kernel,
	linux-mmc

On 21 January 2015 at 14:54, Tomeu Vizoso <tomeu.vizoso@collabora.com> wrote:
> On 01/21/2015 11:44 AM, Ulf Hansson wrote:
>> On 15 January 2015 at 18:33, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>
>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>
>>>
>>> Ah, having read the explanation in the next patch, I think ...
>>>
>>>> diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>>> b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>>
>>>
>>>> +- delay : delay to wait after driving the reset gpio active [ms].
>>>
>>>
>>> ... delay is the wrong name. reset-pulse-width or reset-pulse-length would
>>> be better. delay sounds like a delay after resetting the device before it
>>> can be accessed.
>>
>> I agree with Stephen's proposal.
>
> Cool.
>
>> This patch needs to be rebased and retested on latest version the
>> mmc-pwrseq patches.
>
> Sure.
>
>> Moreover, if you think the patchset which $subject
>> patch is a part of is material for 3.20, I will need to share an
>> immutable branch with the mmc-pwrseq patches for ARM SOC to pull in,
>> tell me if you need that.
>
> I don't think this will make 3.20 as I have other series with higher
> priority and there's quite some work left to do on this one.

If that's the case, I might as well consider this patch separately and
take it through my mmc tree. Of course, that means you anyway need to
rebase/test it.

Kind regards
Uffe

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay
  2015-01-21 14:15         ` Ulf Hansson
@ 2015-01-21 14:55           ` Tomeu Vizoso
  0 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-21 14:55 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Stephen Warren, linux-tegra, Javier Martinez Canillas,
	Dylan Reid, Simon Glass, Rob Herring, Pawel Moll, Mark Rutland,
	Ian Campbell, Kumar Gala, Chris Ball, devicetree, linux-kernel,
	linux-mmc

On 21 January 2015 at 15:15, Ulf Hansson <ulf.hansson@linaro.org> wrote:
> On 21 January 2015 at 14:54, Tomeu Vizoso <tomeu.vizoso@collabora.com> wrote:
>> On 01/21/2015 11:44 AM, Ulf Hansson wrote:
>>> On 15 January 2015 at 18:33, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>>
>>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>>
>>>>
>>>> Ah, having read the explanation in the next patch, I think ...
>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>>>> b/Documentation/devicetree/bindings/mmc/mmc,pwrseq-simple.txt
>>>>
>>>>
>>>>> +- delay : delay to wait after driving the reset gpio active [ms].
>>>>
>>>>
>>>> ... delay is the wrong name. reset-pulse-width or reset-pulse-length would
>>>> be better. delay sounds like a delay after resetting the device before it
>>>> can be accessed.
>>>
>>> I agree with Stephen's proposal.
>>
>> Cool.
>>
>>> This patch needs to be rebased and retested on latest version the
>>> mmc-pwrseq patches.
>>
>> Sure.
>>
>>> Moreover, if you think the patchset which $subject
>>> patch is a part of is material for 3.20, I will need to share an
>>> immutable branch with the mmc-pwrseq patches for ARM SOC to pull in,
>>> tell me if you need that.
>>
>> I don't think this will make 3.20 as I have other series with higher
>> priority and there's quite some work left to do on this one.
>
> If that's the case, I might as well consider this patch separately and
> take it through my mmc tree. Of course, that means you anyway need to
> rebase/test it.

Sounds good, I expect to send a v3 tomorrow.

Regards,

Tomeu

> Kind regards
> Uffe
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node
  2015-01-15 17:26   ` Stephen Warren
@ 2015-01-27 11:13     ` Tomeu Vizoso
  2015-01-27 16:48       ` Stephen Warren
  0 siblings, 1 reply; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-27 11:13 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 15 January 2015 at 18:26, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>
>> To silence a warning on Nyan boards.
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> ---
>>   arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>> index 9a9cffe..94c7ba9 100644
>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>> @@ -1660,6 +1660,7 @@
>>
>>                 flash@0 {
>>                         compatible = "winbond,w25q32dw";
>> +                       spi-max-frequency = <25000000>;
>
>
> This property already exists in the SPI controller. Isn't the max frequency
> supposed to inherit from there? If so, shouldn't the code not warn when such
> inheritance happens, i.e. it'd be better to fix the code?

I don't think it's supposed to fall back to the controller's max freq,
as each device has its own maximum frequency that it can support and
it's not related to what the master supports.

Regards,

Tomeu

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT
  2015-01-15 17:28   ` Stephen Warren
@ 2015-01-27 12:57     ` Tomeu Vizoso
  0 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-27 12:57 UTC (permalink / raw)
  To: Stephen Warren
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 15 January 2015 at 18:28, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>
>> In preparation for adding the DT for the nyan-blaze board.
>
>
> "git format-patch -C" might help here; hopefully it'd highlight that
> arch/arm/boot/dts/tegra124-nyan.dtsi was a copy from
> arch/arm/boot/dts/tegra124-nyan-big.dts, with just a few small diffs?

It doesn't, because we keep the pinmux config in the leaf files.

Regards,

Tomeu

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node
  2015-01-27 11:13     ` Tomeu Vizoso
@ 2015-01-27 16:48       ` Stephen Warren
  2015-01-28 10:24         ` Tomeu Vizoso
  0 siblings, 1 reply; 40+ messages in thread
From: Stephen Warren @ 2015-01-27 16:48 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: linux-tegra, Javier Martinez Canillas, Dylan Reid, Simon Glass,
	Ulf Hansson, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
	Kumar Gala, Russell King, Thierry Reding, Alexandre Courbot,
	devicetree, linux-arm-kernel, linux-kernel

On 01/27/2015 04:13 AM, Tomeu Vizoso wrote:
> On 15 January 2015 at 18:26, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>
>>> To silence a warning on Nyan boards.
>>>
>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>> ---
>>>    arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
>>>    1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> index 9a9cffe..94c7ba9 100644
>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>> @@ -1660,6 +1660,7 @@
>>>
>>>                  flash@0 {
>>>                          compatible = "winbond,w25q32dw";
>>> +                       spi-max-frequency = <25000000>;
>>
>>
>> This property already exists in the SPI controller. Isn't the max frequency
>> supposed to inherit from there? If so, shouldn't the code not warn when such
>> inheritance happens, i.e. it'd be better to fix the code?
>
> I don't think it's supposed to fall back to the controller's max freq,
> as each device has its own maximum frequency that it can support and
> it's not related to what the master supports.

If the controller-specific frequency property isn't ever used, we should 
remove it. No point carrying cruft that looks like it does something but 
doesn't.

Logically, each device's max frequency certainly should be influenced by 
all of the controller, board, and device max frequency. Those should all 
impose a cap on the speed used. I'd expect this to be expressed in DT as 
a single property in each device where the user has calculated that max 
for the device, with the option to have all the devices fall back to the 
"default" provided at the controller/bus level if the device imposes a 
cap that's no lower.


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node
  2015-01-27 16:48       ` Stephen Warren
@ 2015-01-28 10:24         ` Tomeu Vizoso
  0 siblings, 0 replies; 40+ messages in thread
From: Tomeu Vizoso @ 2015-01-28 10:24 UTC (permalink / raw)
  To: Stephen Warren
  Cc: Mark Rutland, Alexandre Courbot, Ulf Hansson, Russell King,
	Pawel Moll, Ian Campbell, Simon Glass, linux-kernel, devicetree,
	Rob Herring, Thierry Reding, Kumar Gala, linux-tegra, Dylan Reid,
	Javier Martinez Canillas, linux-arm-kernel

On 27 January 2015 at 17:48, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 01/27/2015 04:13 AM, Tomeu Vizoso wrote:
>>
>> On 15 January 2015 at 18:26, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>>
>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
>>>>
>>>>
>>>> To silence a warning on Nyan boards.
>>>>
>>>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>> ---
>>>>    arch/arm/boot/dts/tegra124-nyan-big.dts | 1 +
>>>>    1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> index 9a9cffe..94c7ba9 100644
>>>> --- a/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
>>>> @@ -1660,6 +1660,7 @@
>>>>
>>>>                  flash@0 {
>>>>                          compatible = "winbond,w25q32dw";
>>>> +                       spi-max-frequency = <25000000>;
>>>
>>>
>>>
>>> This property already exists in the SPI controller. Isn't the max
>>> frequency
>>> supposed to inherit from there? If so, shouldn't the code not warn when
>>> such
>>> inheritance happens, i.e. it'd be better to fix the code?
>>
>>
>> I don't think it's supposed to fall back to the controller's max freq,
>> as each device has its own maximum frequency that it can support and
>> it's not related to what the master supports.
>
>
> If the controller-specific frequency property isn't ever used, we should
> remove it. No point carrying cruft that looks like it does something but
> doesn't.
>
> Logically, each device's max frequency certainly should be influenced by all
> of the controller, board, and device max frequency. Those should all impose
> a cap on the speed used. I'd expect this to be expressed in DT as a single
> property in each device where the user has calculated that max for the
> device, with the option to have all the devices fall back to the "default"
> provided at the controller/bus level if the device imposes a cap that's no
> lower.

My understanding is that each device node needs to specify the maximum
frequency it supports, and the same for each controller.

When configuring the transfer parameters, its frequency will be capped
by both the device and controller maximum frequencies.

So we currently need to specify the maximum frequencies in both device
and controller nodes, and it sounds like a good idea to me.

I'm probably missing your point. Is it that it should be possible for
device nodes to leave unspecified their max frequency and that in that
case the one for the controller should be used instead?

Regards,

Tomeu

^ permalink raw reply	[flat|nested] 40+ messages in thread

end of thread, other threads:[~2015-01-29  2:28 UTC | newest]

Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-01-15 16:12 [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 01/11] ARM: tegra: Add node for trackpad in Nyan boards Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 02/11] ARM: tegra: Use the generated pinmux data Tomeu Vizoso
2015-01-15 17:25   ` Stephen Warren
2015-01-20 13:59     ` Tomeu Vizoso
2015-01-20 16:20       ` Stephen Warren
2015-01-15 16:12 ` [PATCH v2 03/11] ARM: tegra: Set the sound card model that alsaucm expects Tomeu Vizoso
2015-01-15 17:22   ` Stephen Warren
2015-01-16  8:50     ` Tomeu Vizoso
2015-01-16  9:01       ` Tomeu Vizoso
2015-01-19 17:10         ` Stephen Warren
2015-01-19 17:11           ` Tomeu Vizoso
2015-01-20 17:01             ` Dylan Reid
2015-01-15 16:12 ` [PATCH v2 04/11] ARM: tegra: Set spi-max-frequency property to flash node Tomeu Vizoso
2015-01-15 17:26   ` Stephen Warren
2015-01-27 11:13     ` Tomeu Vizoso
2015-01-27 16:48       ` Stephen Warren
2015-01-28 10:24         ` Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 05/11] drm/panel: add support for Samsung LTN140AT29 panel Tomeu Vizoso
2015-01-16 12:23   ` Thierry Reding
2015-01-15 16:12 ` [PATCH v2 06/11] ARM: tegra: Move out nyan-generic parts out from the nyan-big DT Tomeu Vizoso
2015-01-15 17:28   ` Stephen Warren
2015-01-27 12:57     ` Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 07/11] ARM: tegra: Add DTS for the nyan-blaze board Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 08/11] mmc: pwrseq_simple: Add support for a delay Tomeu Vizoso
2015-01-15 17:32   ` Stephen Warren
2015-01-15 17:33   ` Stephen Warren
2015-01-21 10:44     ` Ulf Hansson
2015-01-21 13:54       ` Tomeu Vizoso
2015-01-21 14:15         ` Ulf Hansson
2015-01-21 14:55           ` Tomeu Vizoso
2015-01-15 16:12 ` [PATCH v2 09/11] ARM: tegra: Use pwrseq-simple for the wifi in Nyan Tomeu Vizoso
2015-01-15 17:34   ` Stephen Warren
2015-01-15 16:12 ` [PATCH v2 10/11] ASoC: tegra: Add a control for the headphone switch Tomeu Vizoso
2015-01-15 16:20   ` Mark Brown
2015-01-15 17:02     ` Tomeu Vizoso
2015-01-15 17:09       ` Mark Brown
2015-01-15 16:12 ` [PATCH v2 11/11] ASoC: tegra: add sink for the internal mic to tegra_max98090 Tomeu Vizoso
2015-01-15 16:43 ` [PATCH v2 00/11] Improvements to Tegra-based Chromebook support Dylan Reid
2015-01-15 17:14 ` Mark Brown

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