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From: "Ondrej Mosnáček" <omosnacek+linux-crypto@gmail.com>
To: bp@alien8.de
Cc: linux-crypto@vger.kernel.org, efault@gmx.de, adobriyan@gmail.com,
	torvalds@linux-foundation.org, tglx@linutronix.de,
	mingo@kernel.org, jpoimboe@redhat.com, luto@kernel.org,
	peterz@infradead.org, brgerst@gmail.com, hpa@zytor.com,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	dvlasenk@redhat.com, h.peter.anvin@intel.com,
	linux-tip-commits@vger.kernel.org,
	Herbert Xu <herbert@gondor.apana.org.au>
Subject: Re: [PATCH] x86/crypto: Add missing RETs
Date: Sat, 23 Jun 2018 19:30:30 +0200	[thread overview]
Message-ID: <CAAUqJDvKG6T3y=Cf8B7cThmkgvjZxWYbDqVV=EA4GS5TfjBCeQ@mail.gmail.com> (raw)
In-Reply-To: <20180623103622.GA2760@zn.tnic>

so 23. 6. 2018 o 12:36 Borislav Petkov <bp@alien8.de> napísal(a):
>
> Lemme send a proper patch now...
>
> ---
> From: Borislav Petkov <bp@suse.de>
> Date: Sun, 17 Jun 2018 13:57:42 +0200
> Subject: [PATCH] x86/crypto: Add missing RETs
>
> Add explicit RETs to the tail calls of AEGIS and MORUS crypto algorithms
> otherwise they run into INT3 padding due to
>
>   51bad67ffbce ("x86/asm: Pad assembly functions with INT3 instructions")
>
> leading to spurious debug exceptions.
>
> Mike Galbraith <efault@gmx.de> took care of all the remaining callsites.
>
> Signed-off-by: Borislav Petkov <bp@suse.de>

Oh, thanks for fixing that!

Acked-by: Ondrej Mosnacek <omosnacek@gmail.com>

Cheers,
Ondrej

> ---
>  arch/x86/crypto/aegis128-aesni-asm.S  | 1 +
>  arch/x86/crypto/aegis128l-aesni-asm.S | 1 +
>  arch/x86/crypto/aegis256-aesni-asm.S  | 1 +
>  arch/x86/crypto/morus1280-avx2-asm.S  | 1 +
>  arch/x86/crypto/morus1280-sse2-asm.S  | 1 +
>  arch/x86/crypto/morus640-sse2-asm.S   | 1 +
>  6 files changed, 6 insertions(+)
>
> diff --git a/arch/x86/crypto/aegis128-aesni-asm.S b/arch/x86/crypto/aegis128-aesni-asm.S
> index 9254e0b6cc06..717bf0776421 100644
> --- a/arch/x86/crypto/aegis128-aesni-asm.S
> +++ b/arch/x86/crypto/aegis128-aesni-asm.S
> @@ -535,6 +535,7 @@ ENTRY(crypto_aegis128_aesni_enc_tail)
>         movdqu STATE3, 0x40(STATEP)
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_aegis128_aesni_enc_tail)
>
>  .macro decrypt_block a s0 s1 s2 s3 s4 i
> diff --git a/arch/x86/crypto/aegis128l-aesni-asm.S b/arch/x86/crypto/aegis128l-aesni-asm.S
> index 9263c344f2c7..4eda2b8db9e1 100644
> --- a/arch/x86/crypto/aegis128l-aesni-asm.S
> +++ b/arch/x86/crypto/aegis128l-aesni-asm.S
> @@ -645,6 +645,7 @@ ENTRY(crypto_aegis128l_aesni_enc_tail)
>         state_store0
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_aegis128l_aesni_enc_tail)
>
>  /*
> diff --git a/arch/x86/crypto/aegis256-aesni-asm.S b/arch/x86/crypto/aegis256-aesni-asm.S
> index 1d977d515bf9..32aae8397268 100644
> --- a/arch/x86/crypto/aegis256-aesni-asm.S
> +++ b/arch/x86/crypto/aegis256-aesni-asm.S
> @@ -543,6 +543,7 @@ ENTRY(crypto_aegis256_aesni_enc_tail)
>         state_store0
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_aegis256_aesni_enc_tail)
>
>  /*
> diff --git a/arch/x86/crypto/morus1280-avx2-asm.S b/arch/x86/crypto/morus1280-avx2-asm.S
> index 37d422e77931..07653d4582a6 100644
> --- a/arch/x86/crypto/morus1280-avx2-asm.S
> +++ b/arch/x86/crypto/morus1280-avx2-asm.S
> @@ -453,6 +453,7 @@ ENTRY(crypto_morus1280_avx2_enc_tail)
>         vmovdqu STATE4, (4 * 32)(%rdi)
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_morus1280_avx2_enc_tail)
>
>  /*
> diff --git a/arch/x86/crypto/morus1280-sse2-asm.S b/arch/x86/crypto/morus1280-sse2-asm.S
> index 1fe637c7be9d..bd1aa1b60869 100644
> --- a/arch/x86/crypto/morus1280-sse2-asm.S
> +++ b/arch/x86/crypto/morus1280-sse2-asm.S
> @@ -652,6 +652,7 @@ ENTRY(crypto_morus1280_sse2_enc_tail)
>         movdqu STATE4_HI, (9 * 16)(%rdi)
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_morus1280_sse2_enc_tail)
>
>  /*
> diff --git a/arch/x86/crypto/morus640-sse2-asm.S b/arch/x86/crypto/morus640-sse2-asm.S
> index 71c72a0a0862..efa02816d921 100644
> --- a/arch/x86/crypto/morus640-sse2-asm.S
> +++ b/arch/x86/crypto/morus640-sse2-asm.S
> @@ -437,6 +437,7 @@ ENTRY(crypto_morus640_sse2_enc_tail)
>         movdqu STATE4, (4 * 16)(%rdi)
>
>         FRAME_END
> +       ret
>  ENDPROC(crypto_morus640_sse2_enc_tail)
>
>  /*
> --
> 2.17.0.582.gccdcbd54c
>
> --
> Regards/Gruss,
>     Boris.
>
> Good mailing practices for 400: avoid top-posting and trim the reply.

  reply	other threads:[~2018-06-23 17:30 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-07 21:37 [PATCH] x86: pad assembly functions with INT3 Alexey Dobriyan
2018-05-07 21:41 ` hpa
2018-05-09 16:55   ` Alexey Dobriyan
2018-05-09 19:28     ` H. Peter Anvin
2018-05-10 16:39 ` David Laight
2018-05-11 18:53   ` H. Peter Anvin
2018-05-14  9:04     ` David Laight
2018-05-14 11:05       ` hpa
2018-05-15  6:54         ` Ingo Molnar
2018-05-15  6:59           ` hpa
2018-05-14 12:53 ` [tip:x86/pti] x86/asm: Pad assembly functions with INT3 instructions tip-bot for Alexey Dobriyan
2018-06-17 11:40   ` Mike Galbraith
2018-06-17 12:00     ` Borislav Petkov
2018-06-17 13:38       ` Mike Galbraith
2018-06-17 14:02         ` Mike Galbraith
2018-06-17 19:47           ` Borislav Petkov
2018-06-18  2:34             ` Mike Galbraith
2018-06-23 10:36               ` [PATCH] x86/crypto: Add missing RETs Borislav Petkov
2018-06-23 17:30                 ` Ondrej Mosnáček [this message]
2018-06-24  7:11                 ` Ingo Molnar
2018-06-24  7:12                   ` Thomas Gleixner
2018-06-24 10:15                     ` Borislav Petkov
2018-06-24 10:44                   ` Alexey Dobriyan
2018-06-25  7:24                     ` Ingo Molnar
2018-06-25 13:19                       ` Josh Poimboeuf
2018-06-26  6:49                         ` Ingo Molnar
2018-06-26 12:31                           ` Josh Poimboeuf
2018-07-05  7:58                             ` Ingo Molnar
2018-07-06 14:06                               ` Josh Poimboeuf
2018-07-06 14:57                                 ` Ingo Molnar
2018-07-01 13:19                 ` Herbert Xu
2018-07-01 15:24                   ` Ondrej Mosnáček
2018-07-01 15:45                     ` Herbert Xu
2018-06-19 11:27         ` [tip:x86/pti] x86/asm: Pad assembly functions with INT3 instructions David Laight

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