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From: Linus Walleij <linus.walleij@linaro.org>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: "zhiyong.tao" <zhiyong.tao@mediatek.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Sean Wang <sean.wang@kernel.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	hui.liu@mediatek.com, Eddie Huang <eddie.huang@mediatek.com>,
	Light Hsieh <light.hsieh@mediatek.com>,
	Biao Huang <biao.huang@mediatek.com>,
	Hongzhou Yang <hongzhou.yang@mediatek.com>,
	Sean Wang <sean.wang@mediatek.com>,
	Seiya Wang <seiya.wang@mediatek.com>,
	Devicetree List <devicetree@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define
Date: Thu, 5 Aug 2021 01:01:58 +0200	[thread overview]
Message-ID: <CACRpkdZ4k9Km3vBtdN6AnBM89c4355GtPMzCQ0_YHaTb4V5cKA@mail.gmail.com> (raw)
In-Reply-To: <CAGXv+5EagmhYYpri+nzo6WgGz8A=oiU3Vy+2AVjho=eo6Z+DLw@mail.gmail.com>

On Thu, Jul 29, 2021 at 11:43 AM Chen-Yu Tsai <wenst@chromium.org> wrote:
> On Thu, Jul 29, 2021 at 4:23 PM zhiyong.tao <zhiyong.tao@mediatek.com> wrote:

> > The rsel actual bias resistance of each setting is different in
> > different IC. we think that the define "MTK_PULL_SET_RSEL_000" is more
> > common for all different IC.
>
> I see. I personally prefer having things clearly described. I can
> understand this might be an extra burden to support different chips
> with different parameters, though this should be fairly straightforward
> with lookup tables tied to the compatible strings.
>
> Let's see if Rob and Linus have anything to add.

Not much. We have "soft pushed" for this to be described as generic
as possible, using SI units (ohms). But we also allow vendor-specific
numbers in this attribute. Especially when reverse engineering SoCs
that the contributor don't really have specs on (example M1 Mac).

The intent with the SI units is especially for people like you folks working
with Chromium to be able to use different SoCs and not feel lost
to a forest of different ways of doing things and associated
mistakes because vendors have hopelessly idiomatic pin configs.

Yours,
Linus Walleij

  reply	other threads:[~2021-08-04 23:02 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-10  8:17 [PATCH v10 0/2] Mediatek pinctrl patch on mt8195 Zhiyong Tao
2021-07-10  8:17 ` [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define Zhiyong Tao
2021-07-13  7:17   ` Chen-Yu Tsai
2021-07-22  7:54     ` zhiyong tao
2021-07-26  8:02       ` Chen-Yu Tsai
     [not found]         ` <07388dac4e25e0f260725e8f80ba099d5aa80949.camel@mediatek.com>
2021-07-29  9:43           ` Chen-Yu Tsai
2021-08-04 23:01             ` Linus Walleij [this message]
2021-08-16  6:10               ` Chen-Yu Tsai
     [not found]                 ` <4fd12d5c53f6492e5fa3ba94a78b9a149f5b6ed9.camel@mediatek.com>
2021-08-16 15:37                   ` Chen-Yu Tsai
2021-08-16 23:00                     ` Linus Walleij
     [not found]                       ` <a7c8ab68ac3513865698cde27e665bdd554f459e.camel@mediatek.com>
2021-08-17  5:44                         ` Chen-Yu Tsai
     [not found]                           ` <d40f6d5fd26aedb13e7a393202e5794b1893ecf8.camel@mediatek.com>
2021-08-17 20:09                             ` Linus Walleij
2021-08-18  6:25                               ` Chen-Yu Tsai
2021-07-10  8:17 ` [PATCH v10 2/2] pinctrl: mediatek: add rsel setting on MT8195 Zhiyong Tao

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