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[209.85.222.43]) by smtp.gmail.com with ESMTPSA id m79sm11342728vka.22.2018.11.19.11.25.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Nov 2018 11:25:20 -0800 (PST) Received: by mail-ua1-f43.google.com with SMTP id z23so10888614uam.1 for ; Mon, 19 Nov 2018 11:25:20 -0800 (PST) X-Received: by 2002:a9f:2b44:: with SMTP id q4mr7360810uaj.126.1542655520322; Mon, 19 Nov 2018 11:25:20 -0800 (PST) MIME-Version: 1.0 References: <20181026173544.136037-1-evgreen@chromium.org> <20181026173544.136037-5-evgreen@chromium.org> <154265514855.88331.12521366940818102477@swboyd.mtv.corp.google.com> In-Reply-To: <154265514855.88331.12521366940818102477@swboyd.mtv.corp.google.com> From: Doug Anderson Date: Mon, 19 Nov 2018 11:25:08 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 4/5] arm64: dts: qcom: sdm845: Add UFS nodes for sdm845-mtp To: Stephen Boyd Cc: Andy Gross , Evan Green , Kishon Vijay Abraham I , Rob Herring , cang@codeaurora.org, devicetree@vger.kernel.org, linux-arm-msm , LKML , Rob Herring , David Brown , Mark Rutland , "open list:ARM/QUALCOMM SUPPORT" , Bjorn Andersson Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Nov 19, 2018 at 11:19 AM Stephen Boyd wrote: > > Quoting Evan Green (2018-10-26 10:35:43) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > index eedfaf8922e2..d5fddea71a85 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > @@ -356,6 +356,20 @@ > > status = "okay"; > > }; > > > > +&ufshc1 { > > + status = "okay"; > > + > > + vcc-supply = <&vreg_l20a_2p95>; > > + vcc-max-microamp = <600000>; > > Is this board dependent? I would guess this is SoC specific and not > board specific. > > > +}; > > + > > +&ufsphy1 { > > + status = "okay"; > > + > > + vdda-phy-supply = <&vdda_ufs1_core>; > > + vdda-pll-supply = <&vdda_ufs1_1p2>; > > These two properties can be specified in the SoC dtsi file instead of > each board variant file. This way we don't have to specify the things > that are SoC independent in each board file. The board integrator just > has to attach the labels to the right regulator nodes, in this case > vdda_ufs1_core and vdda_ufs1_1p2, and then the sdm845.dtsi file will be > matched up with the right regulator automatically. It's also nice so > that board integrators don't have to know anything besides what > regulator goes to what pin on the SoC. This is an interesting proposal and it feels like we have to consider the tradeoffs. I agree that it would be nice not to have to specify this in every single board .dts file, but at the same time what if you've got a board that doesn't use UFS? Such a board would bother adding the labels "vdda_ufs1_core" and "vdda_ufs1_1p2". This would lead to a compile error in the device tree bindings. That seems pretty undesirable. +Bjorn since I think Bjorn wasn't a huge fan of the labels like "vdda_ufs1_core" to start with. -Doug