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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/5] arm64: dts: meson: g12a: add ethernet pinctrl definitions
Date: Sat, 11 May 2019 19:06:32 +0200	[thread overview]
Message-ID: <CAFBinCAmGRHDU5QX2VEsV8vLBXD6fJtcRHbjdW8=p9Yti0V4qA@mail.gmail.com> (raw)
In-Reply-To: <20190510164940.13496-3-jbrunet@baylibre.com>

Hi Jerome,

On Fri, May 10, 2019 at 6:49 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 37 +++++++++++++++++++++
>  1 file changed, 37 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index a32db09809f7..fe0f73730525 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -206,6 +206,43 @@
>                                                 };
>                                         };
>
> +                                       eth_leds_pins: eth-leds {
> +                                               mux {
> +                                                       groups = "eth_link_led",
> +                                                                "eth_act_led";
> +                                                       function = "eth";
> +                                                       bias-disable;
> +                                               };
> +                                       };
> +
> +                                       eth_rmii_pins: eth-rmii {
> +                                               mux {
> +                                                       groups = "eth_mdio",
> +                                                                "eth_mdc",
> +                                                                "eth_rgmii_rx_clk",
> +                                                                "eth_rx_dv",
> +                                                                "eth_rxd0",
> +                                                                "eth_rxd1",
> +                                                                "eth_txen",
> +                                                                "eth_txd0",
> +                                                                "eth_txd1";
> +                                                       function = "eth";
> +                                                       bias-disable;
> +                                               };
> +                                       };
> +
> +                                       eth_rgmii_pins: eth-rgmii {
> +                                               mux {
> +                                                       groups = "eth_rxd2_rgmii",
> +                                                                "eth_rxd3_rgmii",
> +                                                                "eth_rgmii_tx_clk",
> +                                                                "eth_txd2_rgmii",
> +                                                                "eth_txd3_rgmii";
> +                                                       function = "eth";
> +                                                       bias-disable;
> +                                               };
> +                                       };
it seems that the group definition is incomplete (missing things like
eth_mdc, eth_rx_dv, ...)

we could also mix the eth_rmii_pins and eth_rgmii_pins in a board.dts
(maybe that was your idea in the first place?):
  phy-mode = "rgmii";
  pinctrl-0 = <&eth_rmii_pins>, <&eth_rgmii_pins>;
  pinctrl-names = "default";
however, in this case I would prefer if "eth_rmii_pins" was named only
"eth_pins" (following mostly what Amlogic does with the pin group
naming: eth_* for pins that are valid in both, rmii and rgmii mode and
eth*rgmii* for pins that are only valid in rgmii mode)


Regards
Martin

  reply	other threads:[~2019-05-11 17:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10 16:49 [PATCH 0/5] arm64: dts: meson: g12a: add network support Jerome Brunet
2019-05-10 16:49 ` [PATCH 1/5] arm64: dts: meson: g12a: add ethernet mac controller Jerome Brunet
2019-05-10 16:49 ` [PATCH 2/5] arm64: dts: meson: g12a: add ethernet pinctrl definitions Jerome Brunet
2019-05-11 17:06   ` Martin Blumenstingl [this message]
2019-05-11 17:27     ` Jerome Brunet
2019-05-15  0:10       ` Kevin Hilman
2019-05-10 16:49 ` [PATCH 3/5] arm64: dts: meson: g12a: add mdio multiplexer Jerome Brunet
2019-05-11 16:59   ` Martin Blumenstingl
2019-05-11 17:30     ` Jerome Brunet
2019-05-10 16:49 ` [PATCH 4/5] arm64: dts: meson: u200: add internal network Jerome Brunet
2019-05-10 16:49 ` [PATCH 5/5] arm64: dts: meson: sei510: add network support Jerome Brunet
2019-05-10 22:45   ` Kevin Hilman
2019-05-11 15:46     ` Jerome Brunet
2019-05-13 16:31       ` Kevin Hilman
2019-05-11 17:16     ` Martin Blumenstingl
2019-05-11 17:25       ` Jerome Brunet
2019-05-10 16:52 ` [PATCH 0/5] arm64: dts: meson: g12a: " Jerome Brunet

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