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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Lukasz Luba <l.luba@partner.samsung.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org,
	"linux-samsung-soc@vger.kernel.org"
	<linux-samsung-soc@vger.kernel.org>,
	"Bartłomiej Żołnierkiewicz" <b.zolnierkie@samsung.com>,
	kgene@kernel.org, "Chanwoo Choi" <cw00.choi@samsung.com>,
	kyungmin.park@samsung.com,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
	keescook@chromium.org, tony@atomide.com, jroedel@suse.de,
	treding@nvidia.com, digetx@gmail.com,
	willy.mh.wolff.ml@gmail.com
Subject: Re: [PATCH v8 08/13] drivers: memory: add DMC driver for Exynos5422
Date: Thu, 6 Jun 2019 13:45:15 +0200	[thread overview]
Message-ID: <CAJKOXPfiFCp52rYtOBk5mfHfLLA=VtBpakAdUB__UcVCqbma-g@mail.gmail.com> (raw)
In-Reply-To: <d5758d38-c0e5-1732-1407-91d602ae5500@partner.samsung.com>

On Thu, 6 Jun 2019 at 12:38, Lukasz Luba <l.luba@partner.samsung.com> wrote:
> Hi Krzysztof,
> >> +/**
> >> + * exynos5_dmc_init_clks() - Initialize clocks needed for DMC operation.
> >> + * @dmc:       DMC structure containing needed fields
> >> + *
> >> + * Get the needed clocks defined in DT device, enable and set the right parents.
> >> + * Read current frequency and initialize the initial rate for governor.
> >> + */
> >> +static int exynos5_dmc_init_clks(struct exynos5_dmc *dmc)
> >> +{
> >> +       int ret;
> >> +       unsigned long target_volt = 0;
> >> +       unsigned long target_rate = 0;
> >> +
> >> +       dmc->fout_spll = devm_clk_get(dmc->dev, "fout_spll");
> >> +       if (IS_ERR(dmc->fout_spll))
> >> +               return PTR_ERR(dmc->fout_spll);
> >> +
> >> +       dmc->fout_bpll = devm_clk_get(dmc->dev, "fout_bpll");
> >> +       if (IS_ERR(dmc->fout_bpll))
> >> +               return PTR_ERR(dmc->fout_bpll);
> >> +
> >> +       dmc->mout_mclk_cdrex = devm_clk_get(dmc->dev, "mout_mclk_cdrex");
> >> +       if (IS_ERR(dmc->mout_mclk_cdrex))
> >> +               return PTR_ERR(dmc->mout_mclk_cdrex);
> >
> > You are not enabling this clock. It is divider so it is fine for him
> > but what about its parents? How can you guarantee that parents are
> > enabled?
> It uses two parents in this configuration:
> 1. 'mout_bpll' which is set by the bootloader and is a default mode
> 2. 'mout_mx_mspll_ccore' which is used temporary as a 'bypass clock
> source' only for the time when BPLL is changing it's settings
>
> Do you suggest to put a call:
>
> to make sure the parent is up and running?
> OR just move the lines from the end of this function:
>         clk_prepare_enable(dmc->fout_bpll);
>         clk_prepare_enable(dmc->mout_bpll);
> and add:
>         ret = clk_set_parent(dmc->mout_mclk_cdrex, dmc->mout_bpll);
> then call the clk_get_rate on 'mout_mclk_cdrex'
>

Ah, It's my mistake. I missed that later you enable its new parent. It's fine.

Best regards,
Krzysztof

  reply	other threads:[~2019-06-06 11:45 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190605165426eucas1p20524669a299f740b5502db24977b098f@eucas1p2.samsung.com>
2019-06-05 16:53 ` [PATCH v8 00/13] Exynos5 Dynamic Memory Controller driver Lukasz Luba
     [not found]   ` <CGME20190605165427eucas1p27610c38c96313dd80ab445472735a242@eucas1p2.samsung.com>
2019-06-05 16:53     ` [PATCH v8 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Lukasz Luba
2019-06-06  8:22       ` Krzysztof Kozlowski
     [not found]   ` <CGME20190605165428eucas1p11849754e0d0aa8f8d445ceb0cd6c2f61@eucas1p1.samsung.com>
2019-06-05 16:53     ` [PATCH v8 02/13] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
2019-06-06  8:34       ` Krzysztof Kozlowski
2019-06-06  9:12         ` Lukasz Luba
2019-06-06  9:45         ` Lukasz Luba
     [not found]   ` <CGME20190605165429eucas1p224e803c851c9fd28e3d8737392a8a5c3@eucas1p2.samsung.com>
2019-06-05 16:54     ` [PATCH v8 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
2019-06-06  8:25       ` Krzysztof Kozlowski
     [not found]   ` <CGME20190605165430eucas1p1d3e42d3abbaefbdda9658cb814909fad@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 04/13] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
     [not found]   ` <CGME20190605165431eucas1p12810093a1f81f5609782959d878782a0@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 05/13] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
     [not found]   ` <CGME20190605165432eucas1p170415ca2025df5b2cefdaa4ae7fb0f64@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 06/13] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
2019-06-06  8:27       ` Krzysztof Kozlowski
     [not found]   ` <CGME20190605165433eucas1p1214f65106df03ae74bbdc95e3eee71f1@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description Lukasz Luba
2019-06-06  8:29       ` Krzysztof Kozlowski
2019-06-06 10:15         ` Lukasz Luba
     [not found]   ` <CGME20190605165435eucas1p2fa32f4583f396fdce443b6943ac180d3@eucas1p2.samsung.com>
2019-06-05 16:54     ` [PATCH v8 08/13] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
2019-06-06 10:03       ` Krzysztof Kozlowski
2019-06-06 10:38         ` Lukasz Luba
2019-06-06 11:45           ` Krzysztof Kozlowski [this message]
2019-06-06 13:35             ` Lukasz Luba
     [not found]   ` <CGME20190605165436eucas1p2219af7e72feef428639ea70f496e3a9c@eucas1p2.samsung.com>
2019-06-05 16:54     ` [PATCH v8 09/13] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
     [not found]   ` <CGME20190605165437eucas1p1321cd8369e1ffc6b4b6c3ca2d69bcd70@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 10/13] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
     [not found]   ` <CGME20190605165439eucas1p12d9b7aa025fd826d4f880fd7862add62@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 11/13] ARM: dts: exynos: add syscon to clock compatible Lukasz Luba
     [not found]   ` <CGME20190605165440eucas1p104d84f6485afae10ce9d68cd25200ae1@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 12/13] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
     [not found]   ` <CGME20190605165441eucas1p1cf771211156e8aca384ed11c6498c263@eucas1p1.samsung.com>
2019-06-05 16:54     ` [PATCH v8 13/13] ARM: exynos_defconfig: enable DMC driver Lukasz Luba
2019-06-06 13:57   ` [PATCH v8 00/13] Exynos5 Dynamic Memory Controller driver Sylwester Nawrocki
2019-06-06 15:03     ` Lukasz Luba

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