Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes

[Hsin-Yi Wang <hsinyi@chromium.org>]

On Wed, Jul 28, 2021 at 1:41 AM Frank Wunderlich <linux@fw-web.de> wrote:
>
> From: CK Hu <ck.hu@mediatek.com>
>
> SOUT has many bits and need to be cleared before set new value.
> Write only could do the clear, but for MOUT, it clears bits that
> should not be cleared. So use a mask to reset only the needed bits.
>
> this fixes HDMI issues on MT7623/BPI-R2 since 5.13
>
> Cc: stable@vger.kernel.org
> Fixes: 440147639ac7 ("soc: mediatek: mmsys: Use an array for setting the routing registers")
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> Signed-off-by: CK Hu <ck.hu@mediatek.com>
> ---
> code is taken from here (upstreamed without mask part)
> https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2345186/5
> basicly CK Hu's code so i set him as author
> ---
>  drivers/soc/mediatek/mtk-mmsys.c |   7 +-
>  drivers/soc/mediatek/mtk-mmsys.h | 133 +++++++++++++++++++++----------
>  2 files changed, 98 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index 080660ef11bf..0f949896fd06 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -68,7 +68,9 @@ void mtk_mmsys_ddp_connect(struct device *dev,
>
>         for (i = 0; i < mmsys->data->num_routes; i++)
>                 if (cur == routes[i].from_comp && next == routes[i].to_comp) {
> -                       reg = readl_relaxed(mmsys->regs + routes[i].addr) | routes[i].val;
> +                       reg = readl_relaxed(mmsys->regs + routes[i].addr);
> +                       reg &= ~routes[i].mask;
> +                       reg |= routes[i].val;
>                         writel_relaxed(reg, mmsys->regs + routes[i].addr);
>                 }
>  }
> @@ -85,7 +87,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
>
>         for (i = 0; i < mmsys->data->num_routes; i++)
>                 if (cur == routes[i].from_comp && next == routes[i].to_comp) {
> -                       reg = readl_relaxed(mmsys->regs + routes[i].addr) & ~routes[i].val;
> +                       reg = readl_relaxed(mmsys->regs + routes[i].addr);
> +                       reg &= ~routes[i].mask;

This patch is breaking the mt8183 internal display. I think it's
because  ~routes[i].val; is removed?
Also what should the routes[i].mask be if it's not set in
mmsys_mt8183_routing_table?

>                         writel_relaxed(reg, mmsys->regs + routes[i].addr);
>                 }
>  }
<snip>