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From: Renius Chen <reniuschengl@gmail.com>
To: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>,
	linux-mmc <linux-mmc@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Ben Chuang <Ben.Chuang@genesyslogic.com.tw>
Subject: Re: [PATCH] [v2] mmc: sdhci-pci-gli: Improve Random 4K Read Performance of GL9763E
Date: Wed, 14 Jul 2021 10:15:08 +0800	[thread overview]
Message-ID: <CAJU4x8uCAQoozeAqa6icVba61uo_eP+NtOxgnLzsXh6g2HeQdA@mail.gmail.com> (raw)
In-Reply-To: <CAJU4x8sMJSOnfBwDq7tVygRGFRw-SyrM1z8GBsF_Mur64-Y3_g@mail.gmail.com>

Hi Adrain,

What do you think of this patch?
Or do you have any ideas or suggestions about the modification for
Ulf's comments?

Thank you.


Best regards,

Renius

Renius Chen <reniuschengl@gmail.com> 於 2021年7月7日 週三 下午9:49寫道:
>
> Ulf Hansson <ulf.hansson@linaro.org> 於 2021年7月7日 週三 下午8:16寫道:
> >
> > [...]
> >
> > >
> > > Thanks, I understand what you mean.
> > >
> > > I simply searched for the keyword "MMC_READ_MULTIPLE_BLOCK" in the
> > > drivers/mmc/host folder, and found that in some SD/MMC host controller
> > > driver codes such as alcor.c, cavium.c, ...etc, there are also
> > > behaviors for monitoring the request in their driver. What's the
> > > difference between theirs and ours?
> >
> > Those checks are there to allow the HWs to be supported properly.
> >
> > >
> > > And if the code that monitors the requstes does not belong the driver,
> > > where should I implement the code and how to add some functions only
> > > for GL9763e in that place, in your opinion?
> >
> > Honestly, I am not sure what suits your use case best.
> >
> > So far we have used runtime PM with a default auto suspend timeout, in
> > combination with dev PM Qos. In other words, run as fast as possible
> > to complete the requests in the queue then go back to idle and enter a
> > low power state. Clearly, that seems not to be sufficient for your use
> > case, sorry.
> >
> Yes, the runtime PM, auto suspend, and PM Qos are all about the
> suspend/resume behaviors of the system or related to power states such
> as D0/D3 of the device. But these are totally different from the ASPM
> L0s/L1 for link states. Entering/exiting the ASPM is pure hardware
> behavior on the link layer and is not handled by any codes in
> drivers/mmc/core or drivers/mmc/host. We'd like to try to modify the
> patch by your opinions, but we are also confused about what or where
> suits our use case best. So we wonder how to start the modification
> and may need some suggestions to deal with the work, sorry.
>
> Thank you.
>
>
> Best regards,
>
> Renius
>
>
> > Kind regards
> > Uffe

  reply	other threads:[~2021-07-14  2:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-05  9:00 Renius Chen
2021-07-05 10:02 ` Ulf Hansson
2021-07-05 10:59   ` Renius Chen
2021-07-05 12:50     ` Ulf Hansson
2021-07-05 15:09       ` Renius Chen
2021-07-06  9:16         ` Ulf Hansson
2021-07-06  9:54           ` Renius Chen
2021-07-06 10:08             ` Ulf Hansson
2021-07-06 10:56               ` Renius Chen
2021-07-07 12:15                 ` Ulf Hansson
2021-07-07 13:49                   ` Renius Chen
2021-07-14  2:15                     ` Renius Chen [this message]
2021-07-16 10:27                       ` Adrian Hunter
2021-07-19  9:26                         ` Renius Chen
2021-08-04  6:27                           ` Adrian Hunter
2021-08-10  4:23                             ` Renius Chen
2021-08-17 10:30                               ` Renius Chen

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