LKML Archive on lore.kernel.org help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org> To: "Heiko Stübner" <heiko@sntech.de> Cc: Levin Du <djw@t-chip.com.cn>, "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>, Wayne Chou <zxf@t-chip.com.cn>, devicetree@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, Mark Rutland <mark.rutland@arm.com>, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v2 2/5] gpio: syscon: Add gpio-syscon for rockchip Date: Wed, 23 May 2018 14:53:53 -0500 [thread overview] Message-ID: <CAL_Jsq+VBspzCaLD2Wy=fyC-S+LKGZbVsB+b+Etkx91ioXOCuQ@mail.gmail.com> (raw) In-Reply-To: <1685755.J6GI985WX3@diego> On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner <heiko@sntech.de> wrote: > Hi Rob, Levin, > > sorry for being late to the party. > > Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring: >> On Tue, May 22, 2018 at 9:02 PM, Levin Du <djw@t-chip.com.cn> wrote: >> > On 2018-05-23 2:02 AM, Rob Herring wrote: >> >> On Fri, May 18, 2018 at 11:52:05AM +0800, djw@t-chip.com.cn wrote: >> >>> From: Levin Du <djw@t-chip.com.cn> >> >>> >> >>> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs, >> >>> which do not belong to the general pinctrl. >> >>> >> >>> Adding gpio-syscon support makes controlling regulator or >> >>> LED using these special pins very easy by reusing existing >> >>> drivers, such as gpio-regulator and led-gpio. >> >>> >> >>> Signed-off-by: Levin Du <djw@t-chip.com.cn> >> >>> >> >>> --- >> >>> >> >>> Changes in v2: >> >>> - Rename gpio_syscon10 to gpio_mute in doc >> >>> >> >>> Changes in v1: >> >>> - Refactured for general gpio-syscon usage for Rockchip SoCs. >> >>> - Add doc rockchip,gpio-syscon.txt >> >>> >> >>> .../bindings/gpio/rockchip,gpio-syscon.txt | 41 >> >>> >> >>> ++++++++++++++++++++++ >> >>> >> >>> drivers/gpio/gpio-syscon.c | 30 >> >>> >> >>> ++++++++++++++++ >> >>> >> >>> 2 files changed, 71 insertions(+) >> >>> create mode 100644 >> >>> >> >>> Documentation/devicetree/bindings/gpio/rockchip,gpio-syscon.txt >> >>> >> >>> diff --git >> >>> a/Documentation/devicetree/bindings/gpio/rockchip,gpio-syscon.txt >> >>> b/Documentation/devicetree/bindings/gpio/rockchip,gpio-syscon.txt >> >>> new file mode 100644 >> >>> index 0000000..b1b2a67 >> >>> --- /dev/null >> >>> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-syscon.txt >> >>> @@ -0,0 +1,41 @@ >> >>> +* Rockchip GPIO support for GRF_SOC_CON registers >> >>> + >> >>> +Required properties: >> >>> +- compatible: Should contain "rockchip,gpio-syscon". >> >>> +- gpio-controller: Marks the device node as a gpio controller. >> >>> +- #gpio-cells: Should be two. The first cell is the pin number and >> >>> + the second cell is used to specify the gpio polarity: >> >>> + 0 = Active high, >> >>> + 1 = Active low. >> >> >> >> There's no need for this child node. Just make the parent node a gpio >> >> controller. >> >> >> >> Rob >> > >> > Hi Rob, it is not clear to me. Do you suggest that the grf node should be >> > a >> > gpio controller, >> > like below? >> > >> > + grf: syscon at ff100000 { >> > + compatible = "rockchip,gpio-syscon", "rockchip,rk3328-grf", >> > "syscon", "simple-mfd"; >> >> Yes, but drop "rockchip,gpio-syscon" and "simple-mfd". > > I would disagree quite a bit here. The grf are the "general register files", > a bunch of registers used for quite a lot of things, and so it seems > among other users, also a gpio-controller for some more random pins > not controlled through the regular gpio controllers. > > For a more fully stocked grf, please see > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/rk3288.dtsi#n855 > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399.dtsi#n1338 > > So the gpio controller should definitly also be a subnode. Sigh, yes, if there are a bunch of functions needing subnodes like the above, then yes that makes sense. But that's not what has been presented. Please make some attempt at defining *all* the functions. An actual binding would be nice, but I'll settle for just a list of things. The list should have functions that have DT dependencies (like clocks for phys in the above) because until you do, you don't need child nodes. > The gpio in question is called "mute", so I'd think the gpio-syscon driver > should just define a "rockchip,rk3328-gpio-mute" compatible and contain > all the register voodoo in the driver itself and not define it in the dt. Is there really just one GPIO? If it has a defined function, then is it really GP? Can you control direction? I know Linus W doesn't like that kind of abuse of GPIO. > So it should probably look like > > grf: syscon at ff100000 { > compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; > > [all the other syscon sub-devices] > > gpio_mute: gpio-mute { > compatible = "rockchip,rk3328-gpio-mute"; > gpio-controller; > #gpio-cells = <2>; > }; > > [more other syscon sub-devices] > };
next prev parent reply other threads:[~2018-05-23 19:54 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-05-18 3:32 [PATCH v2 0/5] Add sdmmc UHS support to ROC-RK3328-CC board djw 2018-05-18 3:52 ` [PATCH v2 1/5] gpio: syscon: allow fetching syscon from parent node djw 2018-05-18 3:52 ` [PATCH v2 2/5] gpio: syscon: Add gpio-syscon for rockchip djw 2018-05-22 18:02 ` Rob Herring 2018-05-23 2:02 ` Levin Du 2018-05-23 14:43 ` Rob Herring 2018-05-23 15:12 ` Heiko Stübner 2018-05-23 19:53 ` Rob Herring [this message] 2018-05-24 1:59 ` Levin Du 2018-05-24 12:18 ` Heiko Stuebner 2018-05-28 3:34 ` Levin 2018-05-24 12:07 ` Heiko Stuebner 2018-05-24 13:38 ` Rob Herring 2018-05-24 8:28 ` Linus Walleij 2018-05-24 8:35 ` Heiko Stübner 2018-05-24 8:47 ` Linus Walleij 2018-05-18 3:52 ` [PATCH v2 3/5] arm64: dts: rockchip: Add gpio-mute to rk3328 djw 2018-05-18 3:52 ` [PATCH v2 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc djw 2018-05-18 3:52 ` [PATCH v2 5/5] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc djw 2018-05-23 8:08 ` [PATCH v2 1/5] gpio: syscon: allow fetching syscon from parent node Linus Walleij
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CAL_Jsq+VBspzCaLD2Wy=fyC-S+LKGZbVsB+b+Etkx91ioXOCuQ@mail.gmail.com' \ --to=robh@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=djw@t-chip.com.cn \ --cc=heiko@sntech.de \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-rockchip@lists.infradead.org \ --cc=mark.rutland@arm.com \ --cc=zxf@t-chip.com.cn \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).