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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Michel Pollet <michel.pollet@bp.renesas.com>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Simon Horman <horms@verge.net.au>,
Phil Edworthy <phil.edworthy@renesas.com>,
Michel Pollet <buserror+upstream@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk <linux-clk@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 2/5] dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
Date: Fri, 25 May 2018 11:23:48 +0200 [thread overview]
Message-ID: <CAMuHMdUb4fWFB9oP41ejO0_FDxmgBPL0GxQnkFv18Zfb5=1-fw@mail.gmail.com> (raw)
In-Reply-To: <1527154169-32380-3-git-send-email-michel.pollet@bp.renesas.com>
Hi Michel,
On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
<michel.pollet@bp.renesas.com> wrote:
> The Renesas R9A06G032 SYSCTRL node description.
>
> Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt
> @@ -0,0 +1,32 @@
> +* Renesas R9A06G032 SYSCTRL
> +
> +Required Properties:
> +
> + - compatible: Must be:
> + - "renesas,r9a06g032-sysctrl"
> + - reg: Base address and length of the SYSCTRL IO block.
> + - #clock-cells: Must be 1
No clocks/clock-names for the external clock inputs?
"RZ/N1 has 3 clock sources, 1 reference clock inputs for RGMII, and 2
reference clock outputs for RMII/MII."
Given the documentation explicitly mentions the module clocks are to be
used for power-management, you may want to add #power-domain-cells as well,
and let the driver register clock domain. But that can be added later
(although it will break backwards compatibility with old DTBs).
As PWRCTRL_* registers allow to reset individual modules, #reset-cells is
another thing to add later. It's good to start thinking early about how to
reference resets, though.
E.g. on other Renesas-SoCs, module resets uses the same numerical
references as module clocks.
> +
> +Examples
> +--------
> +
> + - SYSCTRL node:
> +
> + sysctrl: sysctrl@4000c000 {
system-controller@
> + compatible = "renesas,r9a06g032-sysctrl";
> + reg = <0x4000c000 0x1000>;
> + #clock-cells = <1>;
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2018-05-25 9:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-24 9:28 [PATCH v7 0/5] arm: Base support for Renesas RZN1D-DB Board Michel Pollet
2018-05-24 9:28 ` [PATCH v7 1/5] dt-bindings: Add the r9a06g032-sysctrl.h file Michel Pollet
2018-05-25 10:31 ` Geert Uytterhoeven
2018-05-31 9:11 ` M P
2018-05-31 9:32 ` Geert Uytterhoeven
2018-05-31 10:01 ` M P
2018-06-01 8:18 ` Geert Uytterhoeven
2018-05-24 9:28 ` [PATCH v7 2/5] dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation Michel Pollet
2018-05-25 9:23 ` Geert Uytterhoeven [this message]
2018-05-31 10:16 ` M P
2018-06-01 8:22 ` Geert Uytterhoeven
2018-05-24 9:28 ` [PATCH v7 3/5] ARM: dts: Renesas R9A06G032 base device tree file Michel Pollet
2018-05-25 9:27 ` Geert Uytterhoeven
2018-05-28 9:15 ` Simon Horman
2018-05-24 9:28 ` [PATCH v7 4/5] ARM: dts: Renesas RZN1D-DB Board base file Michel Pollet
2018-05-25 9:28 ` Geert Uytterhoeven
2018-05-24 9:28 ` [PATCH v7 5/5] clk: renesas: Renesas R9A06G032 clock driver Michel Pollet
2018-05-26 13:45 ` kbuild test robot
2018-05-30 19:49 ` Geert Uytterhoeven
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