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From: Geert Uytterhoeven <geert@linux-m68k.org> To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be>, Rob Herring <robh+dt@kernel.org>, Fabrizio Castro <fabrizio.castro.jz@renesas.com>, Wolfgang Grandegger <wg@grandegger.com>, Marc Kleine-Budde <mkl@pengutronix.de>, "David S. Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, linux-can@vger.kernel.org, netdev <netdev@vger.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, linux-clk <linux-clk@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Linux-Renesas <linux-renesas-soc@vger.kernel.org>, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com> Subject: Re: [PATCH v2 2/5] can: rcar_canfd: Add support for RZ/G2L family Date: Tue, 20 Jul 2021 12:30:55 +0200 [thread overview] Message-ID: <CAMuHMdXkPDaaRZZTCyn-Mwfakuzui69GWuiKUWYEOyhQmuFB=w@mail.gmail.com> (raw) In-Reply-To: <20210719143811.2135-3-prabhakar.mahadev-lad.rj@bp.renesas.com> Hi Prabhakar, On Mon, Jul 19, 2021 at 4:39 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > CANFD block on RZ/G2L SoC is almost identical to one found on > R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel > are split into different sources and the IP doesn't divide (1/2) > CANFD clock within the IP. > > This patch adds compatible string for RZ/G2L family and registers > the irq handlers required for CANFD operation. IRQ numbers are now > fetched based on names instead of indices. For backward compatibility > on non RZ/G2L SoC's we fallback reading based on indices. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/drivers/net/can/rcar/rcar_canfd.c > +++ b/drivers/net/can/rcar/rcar_canfd.c > @@ -37,9 +37,15 @@ > #include <linux/bitmap.h> > #include <linux/bitops.h> > #include <linux/iopoll.h> > +#include <linux/reset.h> > > #define RCANFD_DRV_NAME "rcar_canfd" > > +enum rcanfd_chip_id { > + RENESAS_RCAR_GEN3 = 0, > + RENESAS_RZG2L, > +}; > + > /* Global register bits */ > > /* RSCFDnCFDGRMCFG */ > @@ -513,6 +519,9 @@ struct rcar_canfd_global { > enum rcar_canfd_fcanclk fcan; /* CANFD or Ext clock */ > unsigned long channels_mask; /* Enabled channels mask */ > bool fdmode; /* CAN FD or Classical CAN only mode */ > + struct reset_control *rstc1; /* Pointer to reset source1 */ > + struct reset_control *rstc2; /* Pointer to reset source2 */ Are these comments helpful? IMHO they're stating the obvious. > + enum rcanfd_chip_id chip_id; > }; > > /* CAN FD mode nominal rate constants */ > @@ -1577,6 +1586,45 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, > priv->can.clock.freq = fcan_freq; > dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); > > + if (gpriv->chip_id == RENESAS_RZG2L) { > + char *irq_name; > + int err_irq; > + int tx_irq; > + > + err_irq = platform_get_irq_byname(pdev, ch == 0 ? "can0_error" : "can1_error"); > + if (err_irq < 0) { > + err = err_irq; > + goto fail; > + } > + > + tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "can0_tx" : "can1_tx"); > + if (tx_irq < 0) { > + err = tx_irq; > + goto fail; > + } > + > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > + "canfd.chnerr%d", ch); if (!irq_name) { ret = -ENOMEM; goto fail; } > + err = devm_request_irq(&pdev->dev, err_irq, > + rcar_canfd_channel_interrupt, 0, > + irq_name, gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq CH Err(%d) failed, error %d\n", > + err_irq, err); > + goto fail; > + } > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > + "canfd.chntx%d", ch); Likewise. > + err = devm_request_irq(&pdev->dev, tx_irq, > + rcar_canfd_channel_interrupt, 0, > + irq_name, gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq Tx (%d) failed, error %d\n", > + tx_irq, err); > + goto fail; > + } > + } > + > if (gpriv->fdmode) { > priv->can.bittiming_const = &rcar_canfd_nom_bittiming_const; > priv->can.data_bittiming_const = > @@ -1649,27 +1700,64 @@ static int rcar_canfd_probe(struct platform_device *pdev) > if (of_child && of_device_is_available(of_child)) > channels_mask |= BIT(1); /* Channel 1 */ > > - ch_irq = platform_get_irq(pdev, 0); > - if (ch_irq < 0) { > - err = ch_irq; > - goto fail_dev; > - } > + if (chip_id == RENESAS_RCAR_GEN3) { > + ch_irq = platform_get_irq_byname(pdev, "ch_int"); platform_get_irq_byname_optional()? Unless you want to urge people to update their DTB. > + if (ch_irq < 0) { > + /* For backward compatibility get irq by index */ > + ch_irq = platform_get_irq(pdev, 0); > + if (ch_irq < 0) > + return ch_irq; > + } > > - g_irq = platform_get_irq(pdev, 1); > - if (g_irq < 0) { > - err = g_irq; > - goto fail_dev; > + g_irq = platform_get_irq_byname(pdev, "g_int"); Likewise, > + if (g_irq < 0) { > + /* For backward compatibility get irq by index */ > + g_irq = platform_get_irq(pdev, 1); > + if (g_irq < 0) > + return g_irq; > + } > + } else { > + g_irq = platform_get_irq_byname(pdev, "g_error"); > + if (g_irq < 0) > + return g_irq; > + > + g_rx_irq = platform_get_irq_byname(pdev, "g_rx_fifo"); > + if (g_rx_irq < 0) > + return g_rx_irq; > } > Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
next prev parent reply other threads:[~2021-07-20 10:33 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-19 14:38 [PATCH v2 0/5] Renesas RZ/G2L CANFD support Lad Prabhakar 2021-07-19 14:38 ` [PATCH v2 1/5] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar 2021-07-20 10:20 ` Geert Uytterhoeven 2021-07-20 14:37 ` Lad, Prabhakar 2021-07-20 10:22 ` Philipp Zabel 2021-07-20 14:31 ` Lad, Prabhakar 2021-07-20 15:11 ` Geert Uytterhoeven 2021-07-20 15:56 ` Lad, Prabhakar 2021-07-20 16:33 ` Philipp Zabel 2021-07-20 16:33 ` Philipp Zabel 2021-07-19 14:38 ` [PATCH v2 2/5] can: rcar_canfd: Add support for RZ/G2L family Lad Prabhakar 2021-07-20 10:23 ` Philipp Zabel 2021-07-20 14:57 ` Lad, Prabhakar 2021-07-20 10:30 ` Geert Uytterhoeven [this message] 2021-07-20 15:15 ` Lad, Prabhakar 2021-07-19 14:38 ` [PATCH v2 3/5] dt-bindings: clk: r9a07g044-cpg: Add entry for P0_DIV2 core clock Lad Prabhakar 2021-07-20 10:39 ` Geert Uytterhoeven 2021-07-19 14:38 ` [PATCH v2 4/5] clk: renesas: r9a07g044-cpg: Add entry for fixed clock P0_DIV2 Lad Prabhakar 2021-07-20 10:39 ` Geert Uytterhoeven 2021-07-19 14:38 ` [PATCH v2 5/5] arm64: dts: renesas: r9a07g044: Add CANFD node Lad Prabhakar
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