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From: Anand Moon <linux.amoon@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Linux USB Mailing List <linux-usb@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-samsung-soc@vger.kernel.org,
	Linux Kernel <linux-kernel@vger.kernel.org>,
	"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Kukjin Kim <kgene@kernel.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Felipe Balbi <balbi@kernel.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Subject: Re: [PATCHv3 2/5] ARM: dts: exynos: Add missing usbdrd3 suspend clk
Date: Sun, 15 Mar 2020 15:16:33 +0530	[thread overview]
Message-ID: <CANAwSgS1+6Dzv2XbmMUR40AbJePxUzWkKkBC1W9hBMGzaMWP3w@mail.gmail.com> (raw)
In-Reply-To: <20200314182010.GB17580@kozik-lap>

Hi Krzysztof,

On Sat, 14 Mar 2020 at 23:50, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On Sat, Mar 14, 2020 at 07:02:33PM +0530, Anand Moon wrote:
> > Hi Krzysztof,
> >
> > On Wed, 11 Mar 2020 at 01:19, Anand Moon <linux.amoon@gmail.com> wrote:
> > >
> > > Add new compatible strings for USBDRD3 for adding missing
> > > suspend clk, exynos5422 usbdrd3 support two clk USBD300 and
> > > SCLK_USBD300, so add missing suspemd_clk for Exynos542x DWC3 nodes.
> > >
> > > Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> >
> > My assumption based on the FSYS clock source diagram below was bit wrong.
> > [0] https://imgur.com/gallery/zAiBoyh
> >
> > And again re-looking into the driver source code, it turn out their
> > are *6 clock*
> > Here is the correct mapping as per the Exynos5420 clock driver.
> >
> > USB-(phy@12100000)
> > |___________________CLK_SCLK_USBD300
> > |___________________CLK_SCLK_USBPHY300
> >
> > USB-(phy@12500000)
> > |___________________CLK_SCLK_USBD301
> > |___________________CLK_SCLK_USBPHY301
> >
> > USB-(dwc3@12000000)
> > |___________________CLK_USBD300
> > USB-(dwc3@12400000)
> > |___________________CLK_USBD301
> >
> > Note: As per Exynos 5422 user manual, There are some more USB CLK
> > configuration missing in GATE_IP_FSYS. So we could enable another dwc3 clk,
> > If needed I would like too add this missing clk code and enable this
> > clk for dwc3 driver.
> >
> > For some reason we already use CLK_USBD300 and CLK_USBD301
> > for PHY nodes, which lead to this confusion. So we need to update PHY clock
> > CLK_USBD300 with CLK_SCLK_USBD300 and clock CLK_USBD301 with CLK_SCLK_USBD301.
> >
> > Please share your thought on linking PHY nodes above and add new DWC3 clock
> > and enable this clock.
>
> The real clock topology of Exynos5422 is not properly reflected in the
> kernel. However cleaning this up is quite big task.
>
>
> Best regards,
> Krzysztof
>

I would like to fix all my patches with new finding and submit them
once again for review.

-Anand

  reply	other threads:[~2020-03-15  9:46 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-10 19:48 [PATCHv3 0/5] Add support for FSYS power domain and enable suspend clk for Exynos542x SoC Anand Moon
2020-03-10 19:48 ` [PATCHv3 1/5] devicetree: bindings: exynos: Add new compatible for Exynos5420 dwc3 clocks support Anand Moon
2020-03-15  9:07   ` Felipe Balbi
2020-03-15  9:25     ` Anand Moon
2020-03-17  8:42     ` Krzysztof Kozlowski
2020-03-10 19:48 ` [PATCHv3 2/5] ARM: dts: exynos: Add missing usbdrd3 suspend clk Anand Moon
2020-03-14 13:32   ` Anand Moon
2020-03-14 18:20     ` Krzysztof Kozlowski
2020-03-15  9:46       ` Anand Moon [this message]
2020-03-10 19:48 ` [PATCHv3 3/5] ARM: dts: exynos: Add FSYS power domain to Exynos542x USB nodes Anand Moon
2020-03-10 19:48 ` [PATCHv3 4/5] usb: dwc3: exynos: Add support for Exynos5422 suspend clk Anand Moon
2020-03-10 19:48 ` [PATCHv3 5/5] clk: samsung: exynos542x: Move FSYS subsystem clocks to its sub-CMU Anand Moon
2020-03-11 14:42   ` Krzysztof Kozlowski
2020-03-12 10:34     ` Anand Moon
2020-03-12 11:36       ` Krzysztof Kozlowski
2020-03-12 12:54         ` Anand Moon
2020-03-12 14:08           ` Anand Moon
2020-03-14 17:41             ` Krzysztof Kozlowski

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