From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932543AbbCDT1i (ORCPT ); Wed, 4 Mar 2015 14:27:38 -0500 Received: from mail-oi0-f43.google.com ([209.85.218.43]:36472 "EHLO mail-oi0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754378AbbCDT1g (ORCPT ); Wed, 4 Mar 2015 14:27:36 -0500 MIME-Version: 1.0 X-Originating-IP: [64.196.191.140] In-Reply-To: <54F46C80.8050906@collabora.co.uk> References: <1425015470-4846-1-git-send-email-javier.martinez@collabora.co.uk> <1425015470-4846-3-git-send-email-javier.martinez@collabora.co.uk> <20150302134542.1a269fce@lxorguk.ukuu.org.uk> <54F46C80.8050906@collabora.co.uk> Date: Wed, 4 Mar 2015 11:27:36 -0800 Message-ID: Subject: Re: [PATCH 2/3] platform/chrome: cros_ec_lpc - Depend on X86 || COMPILE_TEST From: Olof Johansson To: Javier Martinez Canillas Cc: One Thousand Gnomes , Doug Anderson , Bill Richardson , Simon Glass , Gwendal Grignou , Fengguang Wu , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 2, 2015 at 5:58 AM, Javier Martinez Canillas wrote: > Hello Alan, > > On 03/02/2015 02:45 PM, One Thousand Gnomes wrote: >> On Fri, 27 Feb 2015 06:37:49 +0100 >> Javier Martinez Canillas wrote: >> >>> The Low Pin Count bus was introduced by Intel and is only used >>> in x86 computers >> >> The LPC bus is in all but name a slightly chopped down ISA bus. It is not >> x86 specific any more, and indeed there are wishbone/LPC busses used on >> all sorts of systems and processor types. >> > > Thanks a lot for the clarification, I didn't know that. > >> The ChromeOS EC may well be X86 specific but if so please fix the commit >> message accordingly. >> > > I'll let the ChromiumOS folks to answer if EC connected through LPC will > only be used in x86 Chromebooks and non-x86 Chromebooks will always use > either SPI or I2C. Or if a non-x86 Chromebook with a EC connected through > LPC may exist in the future. I doubt we'll connect it with LPC on anything but x86, on other platforms we tend to go with SPI or i2c instead. > To know if I should either update the commit message or drop $subject, > since after patch 1/3 the driver builds correctly in other architectures. I'll reword the commit message when I apply (which I'll do shortly). -Olof