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From: Ulf Hansson <ulf.hansson@linaro.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: "Viresh Kumar" <viresh.kumar@linaro.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Mikko Perttunen" <mperttunen@nvidia.com>,
	"Peter Chen" <peter.chen@kernel.org>,
	"Mark Brown" <broonie@kernel.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Nishanth Menon" <nm@ti.com>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Lucas Stach" <dev@lynxeye.de>, "Stefan Agner" <stefan@agner.ch>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-tegra <linux-tegra@vger.kernel.org>,
	"Linux PM" <linux-pm@vger.kernel.org>,
	"Linux USB List" <linux-usb@vger.kernel.org>,
	linux-staging@lists.linux.dev, linux-spi@vger.kernel.org,
	linux-pwm@vger.kernel.org, linux-mtd@lists.infradead.org,
	linux-mmc <linux-mmc@vger.kernel.org>,
	"Linux Media Mailing List" <linux-media@vger.kernel.org>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	DTML <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v8 01/34] opp: Add dev_pm_opp_sync() helper
Date: Mon, 23 Aug 2021 12:46:19 +0200	[thread overview]
Message-ID: <CAPDyKFrWeQVNgxzmiLBXJ2gQW=iFf4aG16xvZ+ag1MkhXs9-BQ@mail.gmail.com> (raw)
In-Reply-To: <9129a9f0-8c9b-d8e0-ddf5-c8820871fb7f@gmail.com>

[...]

> >>>> We have three components comprising PM on Tegra:
> >>>>
> >>>> 1. Power gate
> >>>> 2. Clock state
> >>>> 3. Voltage state
> >>>>
> >>>> GENPD on/off represents the 'power gate'.
> >>>>
> >>>> Clock and reset are controlled by device drivers using clk and rst APIs.
> >>>>
> >>>> Voltage state is represented by GENPD's performance level.
> >>>>
> >>>> GENPD core assumes that at a first rpm-resume of a consumer device, its
> >>>> genpd_performance=0. Not true for Tegra because h/w of the device is
> >>>> preconfigured to a non-zero perf level initially, h/w may not support
> >>>> zero level at all.
> >>>
> >>> I think you may be misunderstanding genpd's behaviour around this, but
> >>> let me elaborate.
> >>>
> >>> In genpd_runtime_resume(), we try to restore the performance state for
> >>> the device that genpd_runtime_suspend() *may* have dropped earlier.
> >>> That means, if genpd_runtime_resume() is called prior
> >>> genpd_runtime_suspend() for the first time, it means that
> >>> genpd_runtime_resume() will *not* restore a performance state, but
> >>> instead just leave the performance state as is for the device (see
> >>> genpd_restore_performance_state()).
> >>>
> >>> In other words, a consumer driver may use the following sequence to
> >>> set an initial performance state for the device during ->probe():
> >>>
> >>> ...
> >>> rate = clk_get_rate()
> >>> dev_pm_opp_set_rate(rate)
> >>>
> >>> pm_runtime_enable()
> >>> pm_runtime_resume_and_get()
> >>> ...
> >>>
> >>> Note that, it's the consumer driver's responsibility to manage device
> >>> specific resources, in its ->runtime_suspend|resume() callbacks.
> >>> Typically that means dealing with clock gating/ungating, for example.
> >>>
> >>> In the other scenario where a consumer driver prefers to *not* call
> >>> pm_runtime_resume_and_get() in its ->probe(), because it doesn't need
> >>> to power on the device to complete probing, then we don't want to vote
> >>> for an OPP at all - and we also want the performance state for the
> >>> device in genpd to be set to zero. Correct?
> >>
> >> Yes
> >>
> >>> Is this the main problem you are trying to solve, because I think this
> >>> doesn't work out of the box as of today?
> >>
> >> The main problem is that the restored performance state is zero for the
> >> first genpd_runtime_resume(), while it's not zero from the h/w perspective.
> >
> > This should not be a problem, but can be handled by the consumer driver.
> >
> > genpd_runtime_resume() calls genpd_restore_performance_state() to
> > restore a performance state for the device. However, in the scenario
> > you describe, "gpd_data->rpm_pstate" is zero, which makes
> > genpd_restore_performance_state() to just leave the device's
> > performance state as is - it will *not* restore the performance state
> > to zero.
> >
> > To make the consumer driver deal with this, it would need to call
> > dev_pm_opp_set_rate() from within its ->runtime_resume() callback.
> >
> >>
> >>> There is another concern though, but perhaps it's not a problem after
> >>> all. Viresh told us that dev_pm_opp_set_rate() may turn on resources
> >>> like clock/regulators. That could certainly be problematic, in
> >>> particular if the device and its genpd have OPP tables associated with
> >>> it and the consumer driver wants to follow the above sequence in
> >>> probe.
> >>
> >> dev_pm_opp_set_rate() won't enable clocks and regulators, but it may
> >> change the clock rate and voltage. This is also platform/driver specific
> >> because it's up to OPP user how to configure OPP table. On Tegra we only
> >> assign clock to OPP table, regulators are unused.
> >>
> >>> Viresh, can you please chime in here and elaborate on some of the
> >>> magic happening behind dev_pm_opp_set_rate() API - is there a problem
> >>> here or not?
> >>>
> >>>>
> >>>> GENPD core assumes that consumer devices can work at any performance
> >>>> level. Not true for Tegra because voltage needs to be set in accordance
> >>>> to the clock rate before clock is enabled, otherwise h/w won't work
> >>>> properly, perhaps clock may be unstable or h/w won't be latching.
> >>>
> >>> Correct. Genpd relies on the callers to use the OPP framework if there
> >>> are constraints like you describe above.
> >>>
> >>> That said, it's not forbidden for a consumer driver to call
> >>> dev_pm_genpd_set_performance_state() directly, but then it better
> >>> knows exactly what it's doing.
> >>>
> >>>>
> >>>> Performance level should be set to 0 while device is suspended.
> >>>
> >>> Do you mean system suspend or runtime suspend? Or both?
> >>
> >> Runtime suspend.
> >
> > Alright. So that's already taken care of for us in genpd_runtime_suspend().
> >
> > Or perhaps you have discovered some problem with this?
> >
> >>
> >>>> Performance level needs to be bumped on rpm-resume of a device in
> >>>> accordance to h/w state before hardware is enabled.
> >>>
> >>> Assuming there was a performance state set for the device when
> >>> genpd_runtime_suspend() was called, genpd_runtime_resume() will
> >>> restore that state according to the sequence you described.
> >>
> >> What do you think about adding API that will allow drivers to explicitly
> >> set the restored performance state of a power domain?
> >>
> >> Another option could be to change the GENPD core, making it to set the
> >> rpm_pstate when dev_pm_genpd_set_performance_state(dev) is invoked and
> >> device is rpm-suspended, instead of calling the
> >> genpd->set_performance_state callback.
> >>
> >> Then drivers will be able to sync the perf state at a probe time.
> >>
> >> What do you think?
> >
> > I don't think it's needed, see my reply earlier above. However your
> > change touches another problem though, see below.
> >
> >>
> >> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
> >> index a934c679e6ce..cc15ab9eacc9 100644
> >> --- a/drivers/base/power/domain.c
> >> +++ b/drivers/base/power/domain.c
> >> @@ -435,7 +435,7 @@ static void genpd_restore_performance_state(struct
> >> device *dev,
> >>  int dev_pm_genpd_set_performance_state(struct device *dev, unsigned int
> >> state)
> >>  {
> >>         struct generic_pm_domain *genpd;
> >> -       int ret;
> >> +       int ret = 0;
> >>
> >>         genpd = dev_to_genpd_safe(dev);
> >>         if (!genpd)
> >> @@ -446,7 +446,10 @@ int dev_pm_genpd_set_performance_state(struct
> >> device *dev, unsigned int state)
> >>                 return -EINVAL;
> >>
> >>         genpd_lock(genpd);
> >> -       ret = genpd_set_performance_state(dev, state);
> >> +       if (pm_runtime_suspended(dev))
> >> +               dev_gpd_data(dev)->rpm_pstate = state;
> >> +       else
> >> +               ret = genpd_set_performance_state(dev, state);
> >>         genpd_unlock(genpd);
> >
> > This doesn't work for all cases. For example, when a consumer driver
> > deploys runtime PM support in its ->probe() according to the below
> > sequence:
> >
> > ...
> > dev_pm_opp_set_rate(rate)
> > pm_runtime_get_noresume()
> > pm_runtime_set_active()
> > pm_runtime_enable()
> > ...
> > pm_runtime_put()
> > ...
> >
> > We need to call genpd_set_performance_state() independently of whether
> > the device is runtime suspended or not.
>
> I don't see where is the problem in yours example.
>
> pm_runtime_suspended() = false while RPM is disabled. When device is
> resumed, the rpm_pstate=0, so it won't change the pstate on resume.

Yes, you are certainly correct, my bad! I mixed it up with
pm_runtime_status_suspended(), which only cares about the status.

So, after a second thought, your suggestion sounds very much
reasonable to me! I have also tried to consider all different
scenarios, including the system suspend/resume path, but I think it
should be fine.

I also think that a patch like the above should be considered as a
fix, because it actually fixes a problem, according to what I said in
my earlier reply, below.

Fixes : 5937c3ce2122 ("PM: domains: Drop/restore performance state
votes for devices at runtime PM").

>
> > Although, it actually seems like good idea to update
> > dev_gpd_data(dev)->rpm_pstate = state here, as to make sure
> > genpd_runtime_resume() doesn't restore an old/invalid value that was
> > saved while dropping the performance state vote for the device in
> > genpd_runtime_suspend() earlier.
> >
> > Let me send a patch for this shortly, to close this window of a possible error.
>
> It will also remove the need to resume device just to change the clock
> rate, like I needed to do it in the PWM patch of this series.

Do you want to send the patch formally? Or do you prefer it if I do it?

Kind regards
Uffe

  reply	other threads:[~2021-08-23 10:47 UTC|newest]

Thread overview: 119+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-17  1:27 [PATCH v8 00/34] NVIDIA Tegra power management patches for 5.16 Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 01/34] opp: Add dev_pm_opp_sync() helper Dmitry Osipenko
2021-08-17  7:55   ` Viresh Kumar
2021-08-17 15:49     ` Dmitry Osipenko
2021-08-18  3:55       ` Viresh Kumar
2021-08-18  4:12         ` Dmitry Osipenko
2021-08-18  4:29           ` Dmitry Osipenko
2021-08-18  4:30             ` Dmitry Osipenko
2021-08-18  4:34               ` Viresh Kumar
2021-08-18  4:31           ` Viresh Kumar
2021-08-18  4:37             ` Dmitry Osipenko
2021-08-18  4:53               ` Viresh Kumar
2021-08-18  5:21                 ` Dmitry Osipenko
2021-08-18  5:58                   ` Viresh Kumar
2021-08-18  6:00                     ` Viresh Kumar
2021-08-18  6:22                     ` Dmitry Osipenko
2021-08-18  6:27                       ` Viresh Kumar
2021-08-18  8:29                         ` Ulf Hansson
2021-08-18  9:14                           ` Viresh Kumar
2021-08-18  9:41                             ` Ulf Hansson
2021-08-18  9:42                               ` Ulf Hansson
2021-08-18  9:50                               ` Viresh Kumar
2021-08-18 10:08                                 ` Ulf Hansson
2021-08-18 15:43                                   ` Dmitry Osipenko
2021-08-18 15:46                                     ` Dmitry Osipenko
2021-08-19 13:07                                     ` Ulf Hansson
2021-08-19 19:35                                       ` Dmitry Osipenko
2021-08-20  5:07                                         ` Viresh Kumar
2021-08-20 12:42                                         ` Ulf Hansson
2021-08-21 17:34                                           ` Dmitry Osipenko
2021-08-23 10:46                                             ` Ulf Hansson [this message]
2021-08-23 15:54                                               ` Dmitry Osipenko
2021-08-18 15:55                               ` Dmitry Osipenko
2021-08-19  6:16                                 ` Viresh Kumar
2021-08-19 14:55                                   ` Ulf Hansson
2021-08-20  5:18                                     ` Viresh Kumar
2021-08-20 12:57                                       ` Ulf Hansson
2021-08-23 20:24                                         ` Dmitry Osipenko
2021-08-24  3:04                                           ` Viresh Kumar
2021-08-22 18:35                                       ` Dmitry Osipenko
2021-08-25 15:41                                         ` Dmitry Osipenko
2021-08-26  2:54                                           ` Viresh Kumar
2021-08-26  2:55                                             ` Viresh Kumar
2021-08-17  1:27 ` [PATCH v8 02/34] soc/tegra: pmc: Disable PMC state syncing Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 03/34] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 04/34] soc/tegra: Add devm_tegra_core_dev_init_opp_table_simple() Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 05/34] soc/tegra: Use dev_pm_opp_sync() Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 06/34] dt-bindings: clock: tegra-car: Document new tegra-clocks sub-node Dmitry Osipenko
2021-08-18  1:15   ` Rob Herring
2021-08-18  1:44     ` Dmitry Osipenko
2021-08-18 13:52       ` Thierry Reding
2021-08-18 15:04         ` Dmitry Osipenko
2021-08-18 13:59   ` Thierry Reding
2021-08-18 15:05     ` Dmitry Osipenko
2021-08-18 16:39       ` Thierry Reding
2021-08-18 16:57         ` Dmitry Osipenko
2021-08-18 17:16           ` Dmitry Osipenko
2021-08-19 16:31           ` Thierry Reding
2021-08-19 22:20             ` Dmitry Osipenko
2021-08-20  2:51             ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 07/34] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-08-18 14:07   ` Thierry Reding
2021-08-18 15:05     ` Dmitry Osipenko
2021-08-18 16:42       ` Thierry Reding
2021-08-18 17:11         ` Dmitry Osipenko
2021-08-19 16:54           ` Thierry Reding
2021-08-19 22:09             ` Dmitry Osipenko
2021-08-20 11:42               ` Thierry Reding
2021-08-20 13:08                 ` Ulf Hansson
2021-08-21 17:45                   ` Dmitry Osipenko
2021-08-23 14:33                     ` Thierry Reding
2021-08-23 18:54                       ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 08/34] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 09/34] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-08-18  1:16   ` Rob Herring
2021-08-18  1:37     ` Dmitry Osipenko
2021-08-18  2:04       ` Dmitry Osipenko
2021-08-18  2:07         ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 10/34] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 11/34] gpu: host1x: Add runtime PM and OPP support Dmitry Osipenko
2021-08-17 12:04   ` Ulf Hansson
2021-08-17 14:02     ` Thierry Reding
2021-08-18  8:35       ` Ulf Hansson
2021-08-18 17:24         ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 12/34] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 13/34] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 14/34] drm/tegra: gr2d: Support power management Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 15/34] drm/tegra: gr3d: " Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 16/34] drm/tegra: vic: Support system suspend Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 17/34] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 18/34] bus: tegra-gmi: " Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 19/34] pwm: tegra: " Dmitry Osipenko
2021-08-19 13:21   ` Thierry Reding
2021-08-19 14:04     ` Ulf Hansson
2021-08-19 16:17       ` Thierry Reding
2021-08-17  1:27 ` [PATCH v8 20/34] mmc: sdhci-tegra: " Dmitry Osipenko
2021-08-19 17:03   ` Thierry Reding
2021-08-19 22:37     ` Dmitry Osipenko
2021-08-20 11:35       ` Thierry Reding
2021-08-25  9:45         ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 21/34] mtd: rawnand: tegra: " Dmitry Osipenko
2021-08-17  8:41   ` Miquel Raynal
2021-08-17  1:27 ` [PATCH v8 22/34] spi: tegra20-slink: Add " Dmitry Osipenko
2021-08-17 12:22   ` Mark Brown
2021-08-17 15:53     ` Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 23/34] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-08-18  1:17   ` Rob Herring
2021-08-17  1:27 ` [PATCH v8 24/34] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-08-18  1:17   ` Rob Herring
2021-08-17  1:27 ` [PATCH v8 25/34] media: staging: tegra-vde: Support generic power domain and OPP Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 26/34] soc/tegra: fuse: Add OPP support Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 27/34] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 28/34] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 29/34] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 30/34] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 31/34] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 32/34] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 33/34] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-08-17  1:27 ` [PATCH v8 34/34] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko

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