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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id n124sm6248823qkf.119.2021.08.16.05.59.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Aug 2021 05:59:29 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 16 Aug 2021 08:59:28 -0400 Message-Id: Cc: "Lars-Peter Clausen" , "Michael Hennerich" , "Jonathan Cameron" , "Charles-Antoine Couret" , =?utf-8?q?Nuno_S=C3=A1?= , "Linux Kernel Mailing List" , "linux-iio" , "devicetree" , "Rob Herring" Subject: Re: [PATCH v6 0/5] AD7949 Fixes From: "Liam Beguin" To: "Andy Shevchenko" References: <20210815213309.2847711-1-liambeguin@gmail.com> In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon Aug 16, 2021 at 4:08 AM EDT, Andy Shevchenko wrote: > On Mon, Aug 16, 2021 at 12:35 AM Liam Beguin > wrote: > > > > While working on another series[1] I ran into issues where my SPI > > controller would fail to handle 14-bit and 16-bit SPI messages. This > > addresses that issue and adds support for selecting a different voltage > > reference source from the devicetree. > > > > v1 was base on a series[2] that seems to not have made it all the way, > > and was tested on an ad7689. > > > > v6 drops support for per channel vref selection. > > After switching the voltage reference, readings take a little while to > > stabilize, invalidating consecutive readings. > > > > This could've been addressed by adding more dummy cycles at the expense > > of speed, but discussing the issue with colleagues more involved in > > hardware design, it turns out these circuits are usually designed with = a > > single vref in mind. > > > > [1] https://patchwork.kernel.org/project/linux-iio/list/?series=3D51154= 5 > > [2] https://patchwork.kernel.org/project/linux-iio/list/?series=3D11697= 1&state=3D%2A&archive=3Dboth > > > > Changes since v5: > > - rename defines: s/AD7949_CFG_BIT_/AD7949_CFG_MASK_/g > > - rename AD7949_MASK_TOTAL to match other defines > > > - make vref selection global instead of per channel, and update > > dt-bindings Hi Andy, > > Same as per v5: is it a hardware limitation? > It's unclear to me what happened here. I tried to provide more details in the last paragraph above. After switching the voltage reference, readings take a little while to stabilize invalidating consecutive readings. One option was to add more dummy cycles, but in addition to making things slower it was brought to my attention that this kind of circuit is usually designed with a single vref in mind. For those reasons and because I didn't have an explicit need for it, I decided to drop that part. Liam > > > - reword commits 2/5, 3/5, and 4/5 > > - move bits_per_word configuration to struct spi_device, and switch to > > spi_{read,write}. > > -- > With Best Regards, > Andy Shevchenko