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From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling
Date: Fri, 14 Jun 2019 14:14:39 +0000 [thread overview]
Message-ID: <SN6PR12MB263902F373B6184FEB563B89F8EE0@SN6PR12MB2639.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190613222255.GH11598@zn.tnic>
> -----Original Message-----
> From: linux-kernel-owner@vger.kernel.org <linux-kernel-owner@vger.kernel.org> On Behalf Of Borislav Petkov
> Sent: Thursday, June 13, 2019 5:23 PM
> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling
>
> On Thu, Jun 13, 2019 at 08:58:16PM +0000, Ghannam, Yazen wrote:
> > The first patch is meant as a fix for existing systems, and this patch
> > is to add new functionality.
> >
> > I can merge them together if you think that's more appropriate.
>
> Is it fixing such a critical issue that it needs to be a separate patch?
> If so, it should be CC:stable.
>
> But I think we've survived without it just fine so why bother. But maybe
> there's an aspect I'm missing...
>
No, you're right. It's not something critical.
I can squash these two patches together if you'd like.
Thanks,
Yazen
next prev parent reply other threads:[~2019-06-14 14:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 23:45 [PATCH 0/8] AMD64 EDAC fixes for v5.2 Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 1/8] EDAC/amd64: Fix number of DIMMs and Chip Select bases/masks on Family17h Ghannam, Yazen
2019-06-13 13:58 ` Borislav Petkov
2019-06-13 21:00 ` Ghannam, Yazen
2019-06-17 13:37 ` Borislav Petkov
2019-05-31 23:45 ` [PATCH 2/8] EDAC/amd64: Support more than two controllers for chip selects handling Ghannam, Yazen
2019-06-13 14:17 ` Borislav Petkov
2019-06-13 20:58 ` Ghannam, Yazen
2019-06-13 22:22 ` Borislav Petkov
2019-06-14 14:14 ` Ghannam, Yazen [this message]
2019-05-31 23:45 ` [PATCH 3/8] EDAC/amd64: Recognize DRAM device type with EDAC_CTL_CAP Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 5/8] EDAC/amd64: Find Chip Select memory size using Address Mask Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 4/8] EDAC/amd64: Initialize DIMM info for systems with more than two channels Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 7/8] EDAC/amd64: Cache secondary Chip Select registers Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 6/8] EDAC/amd64: Decode syndrome before translating address Ghannam, Yazen
2019-05-31 23:45 ` [PATCH 8/8] EDAC/amd64: Support Asymmetric Dual-Rank DIMMs Ghannam, Yazen
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