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* [PATCH v3 0/2] i2c: designware: Add support for a bus clock
@ 2019-02-20 13:25 Gareth Williams
  2019-02-20 13:42 ` Gareth Williams
  0 siblings, 1 reply; 3+ messages in thread
From: Gareth Williams @ 2019-02-20 13:25 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Alexandre Belloni, Wolfram Sang,
	Jarkko Nikula, Andy Shevchenko, Mika Westerberg
  Cc: Gareth Williams, devicetree, linux-i2c, linux-renesas-soc, linux-kernel

The Synopsys I2C Controller has a bus clock that some SoCs require to access
the registers. This series also details the new clock property in the bindings
documentation.

v3:
 - busclk renamed to pclk.
 - Added comment with dw_i2c_dev struct definition describing pclk.
 - Added enable rollback of first clock if second fails to enable.
 - Changed clocks and clock-names sections to use term "peripheral clock"
   (pclk) instead of "bus clock" (busclk) in dt-bindings documentation.
v2:
 - Use new devm_clk_get_optional() function as it simplifies handling when
   the optional clock is not present.

Phil Edworthy (2):
  dt: snps,designware-i2c: Add clock bindings documentation
  i2c: designware: Add support for a bus clock

 .../devicetree/bindings/i2c/i2c-designware.txt         |  9 +++++++++
 drivers/i2c/busses/i2c-designware-common.c             | 18 ++++++++++++++++--
 drivers/i2c/busses/i2c-designware-core.h               |  2 ++
 drivers/i2c/busses/i2c-designware-platdrv.c            |  5 +++++
 4 files changed, 32 insertions(+), 2 deletions(-)

-- 
2.7.4


^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: [PATCH v3 0/2] i2c: designware: Add support for a bus clock
  2019-02-20 13:25 [PATCH v3 0/2] i2c: designware: Add support for a bus clock Gareth Williams
@ 2019-02-20 13:42 ` Gareth Williams
  0 siblings, 0 replies; 3+ messages in thread
From: Gareth Williams @ 2019-02-20 13:42 UTC (permalink / raw)
  To: Gareth Williams, Rob Herring, Mark Rutland, Alexandre Belloni,
	Wolfram Sang, Jarkko Nikula, Andy Shevchenko, Mika Westerberg
  Cc: devicetree, linux-i2c, linux-renesas-soc, linux-kernel

Sorry, the email below was sent prematurely and will be resent shortly.

-Gareth

> On 20 February 2019 13:26 Gareth Williams wrote:
> The Synopsys I2C Controller has a bus clock that some SoCs require to access
> the registers. This series also details the new clock property in the bindings
> documentation.
>
> v3:
>  - busclk renamed to pclk.
>  - Added comment with dw_i2c_dev struct definition describing pclk.
>  - Added enable rollback of first clock if second fails to enable.
>  - Changed clocks and clock-names sections to use term "peripheral clock"
>    (pclk) instead of "bus clock" (busclk) in dt-bindings documentation.
> v2:
>  - Use new devm_clk_get_optional() function as it simplifies handling when
>    the optional clock is not present.
>
> Phil Edworthy (2):
>   dt: snps,designware-i2c: Add clock bindings documentation
>   i2c: designware: Add support for a bus clock
>
>  .../devicetree/bindings/i2c/i2c-designware.txt         |  9 +++++++++
>  drivers/i2c/busses/i2c-designware-common.c             | 18
> ++++++++++++++++--
>  drivers/i2c/busses/i2c-designware-core.h               |  2 ++
>  drivers/i2c/busses/i2c-designware-platdrv.c            |  5 +++++
>  4 files changed, 32 insertions(+), 2 deletions(-)
>
> --
> 2.7.4



Renesas Electronics Europe GmbH,Geschaeftsfuehrer/President : Michael Hannawald, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany,Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v3 0/2] i2c: designware: Add support for a bus clock
@ 2019-02-20 15:50 Gareth Williams
  0 siblings, 0 replies; 3+ messages in thread
From: Gareth Williams @ 2019-02-20 15:50 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Alexandre Belloni, Wolfram Sang,
	Jarkko Nikula, Andy Shevchenko, Mika Westerberg
  Cc: Gareth Williams, devicetree, linux-i2c, linux-renesas-soc, linux-kernel

The Synopsys I2C Controller has a bus clock that some SoCs require to access
the registers. This series also details the new clock property in the bindings
documentation.

v3:
 - busclk renamed to pclk.
 - Added comment with dw_i2c_dev struct definition describing pclk.
 - Added enable rollback of first clock if second fails to enable.
 - Changed clocks and clock-names sections to use term "peripheral clock"
   (pclk) instead of "bus clock" (busclk) in dt-bindings documentation.
v2:
 - Use new devm_clk_get_optional() function as it simplifies handling when
   the optional clock is not present.
   
Phil Edworthy (2):
  dt: snps,designware-i2c: Add clock bindings documentation
  i2c: designware: Add support for a bus clock

 .../devicetree/bindings/i2c/i2c-designware.txt         |  9 +++++++++
 drivers/i2c/busses/i2c-designware-common.c             | 18 ++++++++++++++++--
 drivers/i2c/busses/i2c-designware-core.h               |  2 ++
 drivers/i2c/busses/i2c-designware-platdrv.c            |  5 +++++
 4 files changed, 32 insertions(+), 2 deletions(-)

-- 
2.7.4


^ permalink raw reply	[flat|nested] 3+ messages in thread

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