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[66.111.4.228]) by smtp.gmail.com with ESMTPSA id u12sm1028678ill.55.2021.07.30.09.43.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jul 2021 09:43:04 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailauth.nyi.internal (Postfix) with ESMTP id 1E92127C005B; Fri, 30 Jul 2021 12:43:02 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Fri, 30 Jul 2021 12:43:03 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrheehgdeljecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpeffhffvuffkgggtugesthdtredttddtvdenucfhrhhomhepuehoqhhunhcuhfgv nhhguceosghoqhhunhdrfhgvnhhgsehgmhgrihhlrdgtohhmqeenucggtffrrghtthgvrh hnpeeuvddtudetleektdfhhfdvvedvudfgvddvhfetudffhfehieeukeekjeeugfduuden ucffohhmrghinhepghhithhhuhgsrdgtohhmnecuvehluhhsthgvrhfuihiivgeptdenuc frrghrrghmpehmrghilhhfrhhomhepsghoqhhunhdomhgvshhmthhprghuthhhphgvrhhs ohhnrghlihhthidqieelvdeghedtieegqddujeejkeehheehvddqsghoqhhunhdrfhgvnh hgpeepghhmrghilhdrtghomhesfhhigihmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 30 Jul 2021 12:43:00 -0400 (EDT) Date: Sat, 31 Jul 2021 00:42:34 +0800 From: Boqun Feng To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Miguel Ojeda , Wedson Almeida Filho , Gary Guo , Hector Martin , Arnd Bergmann , Linus Walleij Subject: [Question] Alignment requirement for readX() and writeX() Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, The background is that I'm reviewing Wedson's PR on IoMem for Rust-for-Linux project: https://github.com/Rust-for-Linux/linux/pull/462 readX() and writeX() are used to provide Rust code to read/write IO memory. And I want to find whether we need to check the alignment of the pointer. I wonder whether the addresses passed to readX() and writeX() need to be aligned to the size of the accesses (e.g. the parameter of readl() has to be a 4-byte aligned pointer). The only related information I get so far is the following quote in Documentation/driver-io/device-io.rst: On many platforms, I/O accesses must be aligned with respect to the access size; failure to do so will result in an exception or unpredictable results. Does it mean all readX() and writeX() need to use aligned addresses? Or the alignment requirement is arch-dependent, i.e. if the architecture supports and has enabled misalignment load and store, no alignment requirement on readX() and writeX(), otherwise still need to use aligned addresses. I know different archs have their own alignment requirement on memory accesses, just want to make sure the requirement of the readX() and writeX() APIs. Thanks a lot! Regards, Boqun