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* [PATCH] arm64: dts: qcom: sc7280: fix display port phy base address offset
@ 2021-08-27 16:55 Kuogee Hsieh
  2021-08-27 17:20 ` Bjorn Andersson
  0 siblings, 1 reply; 2+ messages in thread
From: Kuogee Hsieh @ 2021-08-27 16:55 UTC (permalink / raw)
  To: robdclark, sean, swboyd, vkoul, agross, bjorn.andersson, robh+dt,
	devicetree
  Cc: abhinavk, aravindh, khsieh, mkrishn, kalyan_t, rajeevny,
	freedreno, linux-arm-msm, linux-kernel

Fixes: 9886e8fd8438 ("arm64: dts: qcom: sc7280: Add USB related nodes")
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c29226b..77b0b4e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2918,15 +2918,11 @@
 			dp_phy: dp-phy@88ea200 {
 				reg = <0 0x088ea200 0 0x200>,
 				      <0 0x088ea400 0 0x200>,
-				      <0 0x088eac00 0 0x400>,
+				      <0 0x088eaa00 0 0x200>,
 				      <0 0x088ea600 0 0x200>,
-				      <0 0x088ea800 0 0x200>,
-				      <0 0x088eaa00 0 0x100>;
+				      <0 0x088ea800 0 0x200>;
 				#phy-cells = <0>;
 				#clock-cells = <1>;
-				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
-				clock-names = "pipe0";
-				clock-output-names = "usb3_phy_pipe_clk_src";
 			};
 		};
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] arm64: dts: qcom: sc7280: fix display port phy base address offset
  2021-08-27 16:55 [PATCH] arm64: dts: qcom: sc7280: fix display port phy base address offset Kuogee Hsieh
@ 2021-08-27 17:20 ` Bjorn Andersson
  0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Andersson @ 2021-08-27 17:20 UTC (permalink / raw)
  To: Kuogee Hsieh
  Cc: robdclark, sean, swboyd, vkoul, agross, robh+dt, devicetree,
	abhinavk, aravindh, mkrishn, kalyan_t, rajeevny, freedreno,
	linux-arm-msm, linux-kernel

On Fri 27 Aug 09:55 PDT 2021, Kuogee Hsieh wrote:

So the order was mixed up, 0x088eaa00 got the wrong length and you got
one hardware block too many in there?

> Fixes: 9886e8fd8438 ("arm64: dts: qcom: sc7280: Add USB related nodes")
> Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c29226b..77b0b4e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2918,15 +2918,11 @@
>  			dp_phy: dp-phy@88ea200 {
>  				reg = <0 0x088ea200 0 0x200>,
>  				      <0 0x088ea400 0 0x200>,
> -				      <0 0x088eac00 0 0x400>,
> +				      <0 0x088eaa00 0 0x200>,
>  				      <0 0x088ea600 0 0x200>,
> -				      <0 0x088ea800 0 0x200>,
> -				      <0 0x088eaa00 0 0x100>;
> +				      <0 0x088ea800 0 0x200>;
>  				#phy-cells = <0>;
>  				#clock-cells = <1>;
> -				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> -				clock-names = "pipe0";
> -				clock-output-names = "usb3_phy_pipe_clk_src";

This is not "base address offset", please fix $subject.


Looking at this makes me feel that the dp-phy node was copy-pasted from
the usb3-node and that this patch corrects a copy-paste issue. Seems
like this would be an excellent thing to write in a commit message.

Thanks,
Bjorn

>  			};
>  		};
>  
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2021-08-27 17:20 ` Bjorn Andersson

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