From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39792C4332F for ; Wed, 6 Oct 2021 07:29:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 208B26115A for ; Wed, 6 Oct 2021 07:29:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237452AbhJFHbQ (ORCPT ); Wed, 6 Oct 2021 03:31:16 -0400 Received: from muru.com ([72.249.23.125]:41330 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230013AbhJFHbM (ORCPT ); Wed, 6 Oct 2021 03:31:12 -0400 Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id BFB6880E7; Wed, 6 Oct 2021 07:29:50 +0000 (UTC) Date: Wed, 6 Oct 2021 10:29:18 +0300 From: Tony Lindgren To: Drew Fustini Cc: =?utf-8?Q?Beno=C3=AEt?= Cousson , Rob Herring , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: am335x-pocketbeagle: switch to pinconf-single Message-ID: References: <20210825202516.1384510-1-drew@pdp7.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210825202516.1384510-1-drew@pdp7.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Drew Fustini [210826 01:20]: > Switch the compatible for the am33xx_pinmux pin controller node from > pinctrl-single to pinconf-single. The only change between these two > compatibles is that PCS_HAS_PINCONF will be true. This then allows > pinconf properties to be utilized. > > The purpose of this change is to allow the PocketBeagle to use: > > pinctrl-single,bias-pullup > pinctrl-single,bias-pulldown > > This dts already defines these properites for gpio pins in the default > pinctrl state but it has no effect unless PCS_HAS_PINCONF is set. > > The bias properties can then be modified on the corresponding gpio lines > through the gpiod uapi. The mapping between the pins and gpio lines is > defined by gpio-ranges under the gpio controller nodes in am33xx-l4.dtsi Thanks applying into omap-for-v5.16/dt. Tony