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From: LABBE Corentin <clabbe@baylibre.com>
To: Guillaume Tucker <guillaume.tucker@collabora.com>
Cc: Alex Bee <knaerzche@gmail.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Kevin Hilman <khilman@baylibre.com>,
	sboyd@kernel.org, heiko@sntech.de,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	"kernelci@groups.io" <kernelci@groups.io>,
	Collabora Kernel ML <kernel@collabora.com>,
	Chen-Yu Tsai <wens@csie.org>
Subject: Re: [PATCH] clk: composite: Also consider .determine_rate for rate + mux composites
Date: Tue, 2 Nov 2021 22:40:31 +0100	[thread overview]
Message-ID: <YYGwT0CKEd5Xu2jO@Red> (raw)
In-Reply-To: <31d462cb-1158-dd13-0ca8-46d54d2502f5@collabora.com>

Le Tue, Nov 02, 2021 at 07:58:42AM +0000, Guillaume Tucker a écrit :
> +Kevin +Corentin
> 
> On 01/11/2021 22:41, Alex Bee wrote:
> > Hi Guillaume,
> > 
> > Am 01.11.21 um 23:11 schrieb Robin Murphy:
> >> On 2021-11-01 21:59, Robin Murphy wrote:
> >>> On 2021-11-01 20:58, Martin Blumenstingl wrote:
> >>>> Hi Guillaume,
> >>>>
> >>>> On Mon, Nov 1, 2021 at 9:19 PM Guillaume Tucker
> >>>> <guillaume.tucker@collabora.com> wrote:
> >>>>>
> >>>>> Hi Martin,
> >>>>>
> >>>>> Please see the bisection report below about a boot failure on
> >>>>> rk3328-rock64.
> >>>>>
> >>>>> Reports aren't automatically sent to the public while we're
> >>>>> trialing new bisection features on kernelci.org but this one
> >>>>> looks valid.
> >>>>>
> >>>>> Some more details can be found here:
> >>>>>
> >>>>>    https://linux.kernelci.org/test/case/id/617f11f5c157b666fb3358e6/
> >>>>>
> >>>>> Here's what appears to be the cause of the problem:
> >>>>>
> >>>>> [    0.033465] CPU: CPUs started in inconsistent modes
> >>>>> [    0.033557] Unexpected kernel BRK exception at EL1
> >>>>> [    0.034432] Internal error: BRK handler: f2000800 [#1] PREEMPT SMP
> >>>
> >>> What's weird is that that's really just the same WARN that's also
> >>> present in 'successful' logs, except for some reason it's behaving as
> >>> if the break handler hasn't been registered, despite that having
> >>> happened long before we got to smp_init(). At this point we're also
> >>> still some way off getting as far as initcalls, so I'm not sure that
> >>> the clock driver would be in the picture at all yet.
> >>>
> >>> Is the bisection repeatable, or is this just random flakiness
> >>> misleading things? I'd also note that you need pretty horrifically
> >>> broken firmware to hit that warning in the first place, which might
> >>> cast a bit of doubt over the trustworthiness of that board altogether.
> 
> The bisection has checks to avoid false positives, so tests that
> produce flaky results won't normally lead to a report like this.
> Then they're manually triaged, and there were 2 separate
> bisections that landed on this same commit.
> 
> >> Ah, on closer inspection it might be entirely repeatable for a given
> >> kernel build, but with the behaviour being very sensitive to code/data
> >> segment layout changes...
> >>
> >> ...
> >> 23:44:24.457917  Filename '1007060/tftp-deploy-dvdnydcw/kernel/Image'.
> >> 23:44:24.460178  Load address: 0x2000000
> >> ...
> >> 23:44:27.180962  Bytes transferred = 33681920 (201f200 hex)
> >> ...
> >> 23:44:27.288135  Filename
> >> '1007060/tftp-deploy-dvdnydcw/ramdisk/ramdisk.cpio.gz.uboot'.
> >> 23:44:27.288465  Load address: 0x4000000
> >> ...
> 
> That is indeed where the remaining false positives are still
> likely to be coming from, when the infrastructure consistently
> causes test failures following particular kernel revisions.  I
> don't think there's an easy way to rule those out, but we can try
> to address them one by one at least.
> 
> In the case of colliding address ranges in the bootloader, we
> could add a check with the "good" revision and extra data in the
> kernel image to make it at least as big as the "bad" revision...
> 
> > could you try updating u-boot to more recent version: the ramdisk
> > address has been moved [1] to 0x06000000 in v2020.01-rc5.
> 
> Thanks for investigating this.  The board is in BayLibre's lab.
> 
> Corentin, Kevin, could you please take a look?
> 

Hello

I tried to update uboot on it but failed for today.
I found only how to flash sdcard (doiing it remotly), but the board boots SPI first (and I saw no documentation on how to flash SPI).
I need to have physical access to change this.
So probably later this week.

Regards

  reply	other threads:[~2021-11-02 21:40 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-02 22:51 [PATCH v1 0/6] clk: switch dividers to .determine_rate Martin Blumenstingl
2021-07-02 22:51 ` [PATCH v1 1/6] clk: divider: Implement and wire up .determine_rate by default Martin Blumenstingl
2021-08-06  1:10   ` Stephen Boyd
2021-10-14  9:55   ` Alex Bee
2021-10-14 12:11     ` Martin Blumenstingl
2021-10-14 21:34       ` Martin Blumenstingl
2021-10-14 22:52         ` Stephen Boyd
2021-10-15 12:05           ` [PATCH] clk: composite: Also consider .determine_rate for rate + mux composites Martin Blumenstingl
2021-10-15 21:27             ` Stephen Boyd
2021-11-01 20:19             ` Guillaume Tucker
2021-11-01 20:58               ` Martin Blumenstingl
2021-11-01 21:59                 ` Robin Murphy
2021-11-01 22:11                   ` Robin Murphy
2021-11-01 22:41                     ` Alex Bee
2021-11-02  7:58                       ` Guillaume Tucker
2021-11-02 21:40                         ` LABBE Corentin [this message]
2021-10-15 19:14         ` [PATCH v1 1/6] clk: divider: Implement and wire up .determine_rate by default Alex Bee
2021-10-15 21:31           ` Stephen Boyd
2021-07-02 22:51 ` [PATCH v1 2/6] clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate Martin Blumenstingl
2021-07-19 10:43   ` Abel Vesa
2021-07-29 11:30   ` Abel Vesa
2021-07-02 22:51 ` [PATCH v1 3/6] clk: bcm2835: " Martin Blumenstingl
2021-07-05  6:57   ` Marek Szyprowski
2021-08-06  1:10   ` Stephen Boyd
2021-07-02 22:51 ` [PATCH v1 4/6] clk: stm32f4: " Martin Blumenstingl
2021-08-06  1:10   ` Stephen Boyd
2021-07-02 22:51 ` [PATCH v1 5/6] clk: stm32h7: " Martin Blumenstingl
2021-08-06  1:10   ` Stephen Boyd
2021-07-02 22:51 ` [PATCH v1 6/6] clk: stm32mp1: " Martin Blumenstingl
2021-08-06  1:10   ` Stephen Boyd
2021-08-03 19:32 ` [PATCH v1 0/6] clk: switch dividers to .determine_rate Martin Blumenstingl
2021-08-03 20:16   ` Stephen Boyd

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