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From: Jeremy Linton <jeremy.linton@arm.com>
To: Florian Fainelli <f.fainelli@gmail.com>, linux-pci@vger.kernel.org
Cc: lorenzo.pieralisi@arm.com, nsaenz@kernel.org,
	bhelgaas@google.com, rjw@rjwysocki.net, lenb@kernel.org,
	robh@kernel.org, kw@linux.com,
	bcm-kernel-feedback-list@broadcom.com,
	linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] PCI: brcmstb: Break register definitions into separate header
Date: Tue, 10 Aug 2021 10:10:30 -0500	[thread overview]
Message-ID: <ab2aa9e3-cdc7-1bc7-d493-8f3c991c3285@arm.com> (raw)
In-Reply-To: <f82761b1-fb7e-08b2-8bc3-c84d258e26d3@gmail.com>

Hi,

Thanks for taking a look at this!


On 8/10/21 5:07 AM, Florian Fainelli wrote:
> 
> 
> On 8/5/2021 2:11 PM, Jeremy Linton wrote:
>> We are about to create a standalone ACPI quirk module for the
>> bcmstb controller. Lets move the register definitions into a separate
>> file so they can be shared between the APCI quirk and the normal
>> host bridge driver.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> ---
>>   drivers/pci/controller/pcie-brcmstb.c | 179 +------------------------
>>   drivers/pci/controller/pcie-brcmstb.h | 182 ++++++++++++++++++++++++++
>>   2 files changed, 183 insertions(+), 178 deletions(-)
>>   create mode 100644 drivers/pci/controller/pcie-brcmstb.h
> 
> You moved more than just register definitions into pcie-brcmstb.h you 
> also moved internal structure definitions, enumerations, etc. which are 
> not required since pcie-brcmstb-acpi.c does not access the brcm_pcie 
> structure but open codes accesses to the MISC_STATUS register instead.
> 
> There are no include guards added to this file (it is debatable whether 
> we should add them), and it is also not covered by the existing BROADCOM 
> BCM2711/BCM2835 ARM ARCHITECTURE MAINTAINERS file entry.

Sure, I will reduce the .h to just the register definitions, guard it, 
and tweak maintainers to cover pcie-brcmstb*.


> 
> Given that there can be new platforms supported by this PCIe controller 
> in the future possibly with the same limitations as the 2711, but with a 
> seemingly different MISC_STATUS layout, you will have to think about a 
> solution that scales, maybe we cross that bridge when we get there.

Yes, given I don't know what those changes are I can't predict how they 
would have to be handled, or even if the platform would be a target of 
the community maintaining the UEFI/ACPI port on the RPi. So punting on 
that topic seems a reasonable solution at the moment. Better yet, more 
of the linux community will see the advantage of the firmware interface 
and this platform can utilize that method.

  reply	other threads:[~2021-08-10 15:10 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-05 21:11 [PATCH 0/3] CM4 ACPI PCIe quirk Jeremy Linton
2021-08-05 21:11 ` [PATCH 1/3] PCI: brcmstb: Break register definitions into separate header Jeremy Linton
2021-08-10 10:07   ` Florian Fainelli
2021-08-10 15:10     ` Jeremy Linton [this message]
2021-08-11  8:39       ` Florian Fainelli
2021-08-05 21:11 ` [PATCH 2/3] PCI: brcmstb: Add ACPI config space quirk Jeremy Linton
2021-08-06 22:21   ` Bjorn Helgaas
2021-08-07  2:55     ` Jeremy Linton
2021-08-09 17:42       ` Bjorn Helgaas
2021-08-09 19:48         ` Jeremy Linton
2021-08-09 20:33           ` Bjorn Helgaas
2021-08-09 21:21             ` Jeremy Linton
2021-08-05 21:12 ` [PATCH 3/3] PCI/ACPI: Add new quirk detection, enable bcm2711 Jeremy Linton
2021-08-06 22:12   ` Bjorn Helgaas
2021-08-07  0:34     ` Jeremy Linton
2021-08-09 15:27       ` Rob Herring
2021-08-09 16:24         ` Jeremy Linton
2021-08-10 14:31   ` Shanker R Donthineni
2021-08-10 14:47     ` Jeremy Linton
2021-08-10 15:09       ` Shanker R Donthineni
2021-08-06 11:40 ` [PATCH 0/3] CM4 ACPI PCIe quirk Stefan Wahren

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