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* [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
@ 2019-05-10 19:42 Adam Ford
  2019-05-28 11:11 ` Tomi Valkeinen
  2019-06-13 20:22 ` Rob Herring
  0 siblings, 2 replies; 40+ messages in thread
From: Adam Ford @ 2019-05-10 19:42 UTC (permalink / raw)
  To: linux-omap
  Cc: adam.ford, Adam Ford, Tomi Valkeinen, David Airlie,
	Daniel Vetter, Rob Herring, Mark Rutland, Benoît Cousson,
	Tony Lindgren, dri-devel, devicetree, linux-kernel

Currently the source code is compiled using hard-coded values
from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
clock divider value to be moved to the device tree and be changed
without having to recompile the kernel.

Signed-off-by: Adam Ford <aford173@gmail.com>

diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
index cd02516a40b6..42449d07c47e 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
@@ -40,7 +40,7 @@ Required properties:
 Optional properties:
 - max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
 			in bytes per second
-
+- min-fck-pck-ratio:  Make sure that DISPC FCK is at least n x PCK
 
 RFBI
 ----
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 4043ecb38016..bf84a8487aae 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -751,7 +751,7 @@
 			#size-cells = <1>;
 			ranges;
 
-			dispc@48050400 {
+			dispc: dispc@48050400 {
 				compatible = "ti,omap3-dispc";
 				reg = <0x48050400 0x400>;
 				interrupts = <25>;
diff --git a/drivers/gpu/drm/omapdrm/dss/Kconfig b/drivers/gpu/drm/omapdrm/dss/Kconfig
index f24ebf7f61dd..d0666edcdf2a 100644
--- a/drivers/gpu/drm/omapdrm/dss/Kconfig
+++ b/drivers/gpu/drm/omapdrm/dss/Kconfig
@@ -102,24 +102,6 @@ config OMAP2_DSS_DSI
 
 	  See http://www.mipi.org/ for DSI specifications.
 
-config OMAP2_DSS_MIN_FCK_PER_PCK
-	int "Minimum FCK/PCK ratio (for scaling)"
-	range 0 32
-	default 0
-	help
-	  This can be used to adjust the minimum FCK/PCK ratio.
-
-	  With this you can make sure that DISPC FCK is at least
-	  n x PCK. Video plane scaling requires higher FCK than
-	  normally.
-
-	  If this is set to 0, there's no extra constraint on the
-	  DISPC FCK. However, the FCK will at minimum be
-	  2xPCK (if active matrix) or 3xPCK (if passive matrix).
-
-	  Max FCK is 173MHz, so this doesn't work if your PCK
-	  is very high.
-
 config OMAP2_DSS_SLEEP_AFTER_VENC_RESET
 	bool "Sleep 20ms after VENC reset"
 	default y
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index ba82d916719c..09a130c53da2 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -198,6 +198,9 @@ struct dispc_device {
 
 	/* DISPC_CONTROL & DISPC_CONFIG lock*/
 	spinlock_t control_lock;
+
+	/* Optional min-fck-pck-ratio */
+	u32 min_fck_per_pck;
 };
 
 enum omap_color_component {
@@ -3683,15 +3686,8 @@ bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,
 	unsigned long pck, lck;
 	unsigned long lck_max;
 	unsigned long pckd_hw_min, pckd_hw_max;
-	unsigned int min_fck_per_pck;
 	unsigned long fck;
 
-#ifdef CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK
-	min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK;
-#else
-	min_fck_per_pck = 0;
-#endif
-
 	pckd_hw_min = dispc->feat->min_pcd;
 	pckd_hw_max = 255;
 
@@ -3723,7 +3719,7 @@ bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,
 			else
 				fck = lck;
 
-			if (fck < pck * min_fck_per_pck)
+			if (fck < pck * dispc->min_fck_per_pck)
 				continue;
 
 			if (func(lckd, pckd, lck, pck, data))
@@ -4826,6 +4822,8 @@ static int dispc_bind(struct device *dev, struct device *master, void *data)
 		}
 	}
 
+	of_property_read_u32(np, "min-fck-pck-ratio", &dispc->min_fck_per_pck);
+
 	r = dispc_init_gamma_tables(dispc);
 	if (r)
 		goto err_free;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-10 19:42 [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts Adam Ford
@ 2019-05-28 11:11 ` Tomi Valkeinen
  2019-05-28 15:09   ` Adam Ford
  2019-09-25 21:26   ` Andrew F. Davis
  2019-06-13 20:22 ` Rob Herring
  1 sibling, 2 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-05-28 11:11 UTC (permalink / raw)
  To: Adam Ford, linux-omap
  Cc: adam.ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, linux-kernel

Hi,

On 10/05/2019 22:42, Adam Ford wrote:
> Currently the source code is compiled using hard-coded values
> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
> clock divider value to be moved to the device tree and be changed
> without having to recompile the kernel.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>

I understand why you want to do this, but I'm not sure it's a good idea. 
It's really something the driver should figure out, and if we add it to 
the DT, it effectively becomes an ABI.

That said... I'm not sure how good of a job the driver could ever do, as 
it can't know the future scaling needs of the userspace at the time it 
is configuring the clock. And so, I'm not nacking this patch, but I 
don't feel very good about this patch...

The setting also affects all outputs (exluding venc), which may not be 
what the user wants. Then again, I think this setting is really only 
needed on OMAP2 & 3, which have only a single output. But that's the 
same with the current kconfig option, of course.

So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my 
opinion, and moving it to DT makes it a worse hack =). But I don't have 
any good suggestions either.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 11:11 ` Tomi Valkeinen
@ 2019-05-28 15:09   ` Adam Ford
  2019-05-28 15:20     ` H. Nikolaus Schaller
  2019-05-28 15:53     ` Tomi Valkeinen
  2019-09-25 21:26   ` Andrew F. Davis
  1 sibling, 2 replies; 40+ messages in thread
From: Adam Ford @ 2019-05-28 15:09 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On Tue, May 28, 2019 at 4:11 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> Hi,
>
> On 10/05/2019 22:42, Adam Ford wrote:
> > Currently the source code is compiled using hard-coded values
> > from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
> > clock divider value to be moved to the device tree and be changed
> > without having to recompile the kernel.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
>
> I understand why you want to do this, but I'm not sure it's a good idea.
> It's really something the driver should figure out, and if we add it to
> the DT, it effectively becomes an ABI.
>
> That said... I'm not sure how good of a job the driver could ever do, as
> it can't know the future scaling needs of the userspace at the time it
> is configuring the clock. And so, I'm not nacking this patch, but I
> don't feel very good about this patch...
>
> The setting also affects all outputs (exluding venc), which may not be
> what the user wants. Then again, I think this setting is really only
> needed on OMAP2 & 3, which have only a single output. But that's the
> same with the current kconfig option, of course.
>
> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
> opinion, and moving it to DT makes it a worse hack =). But I don't have
> any good suggestions either.

As it stands the Logic PD OMAP35 and AM37/DM37 boards (SOM-LV and
Torpedo) require this to be hard coded to 4 or it hangs during start.
This is the case for all versions 4.2+.  I haven't tested it with
older stuff.  Tony has a DM3730 Torpedo kit and reported the hanging
issue to me. I told him to set that value to 4 to make it not hang.
He asked that I move it to the DT to avoid custom kernels.  I agree
it's a hack, but if it's create a customized defconfig file for 4
boards or modify the device tree, it seems like the device tree
approach is less intrusive.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 15:09   ` Adam Ford
@ 2019-05-28 15:20     ` H. Nikolaus Schaller
  2019-05-28 15:53     ` Tomi Valkeinen
  1 sibling, 0 replies; 40+ messages in thread
From: H. Nikolaus Schaller @ 2019-05-28 15:20 UTC (permalink / raw)
  To: Adam Ford
  Cc: Tomi Valkeinen, Linux-OMAP, Adam Ford, David Airlie,
	Daniel Vetter, Rob Herring, Mark Rutland, Benoît Cousson,
	Tony Lindgren, dri-devel, devicetree, Linux Kernel Mailing List


> Am 28.05.2019 um 17:09 schrieb Adam Ford <aford173@gmail.com>:
> 
> On Tue, May 28, 2019 at 4:11 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>> 
>> Hi,
>> 
>> On 10/05/2019 22:42, Adam Ford wrote:
>>> Currently the source code is compiled using hard-coded values
>>> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
>>> clock divider value to be moved to the device tree and be changed
>>> without having to recompile the kernel.
>>> 
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>> 
>> I understand why you want to do this, but I'm not sure it's a good idea.
>> It's really something the driver should figure out, and if we add it to
>> the DT, it effectively becomes an ABI.
>> 
>> That said... I'm not sure how good of a job the driver could ever do, as
>> it can't know the future scaling needs of the userspace at the time it
>> is configuring the clock. And so, I'm not nacking this patch, but I
>> don't feel very good about this patch...
>> 
>> The setting also affects all outputs (exluding venc), which may not be
>> what the user wants. Then again, I think this setting is really only
>> needed on OMAP2 & 3, which have only a single output. But that's the
>> same with the current kconfig option, of course.
>> 
>> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
>> opinion, and moving it to DT makes it a worse hack =). But I don't have
>> any good suggestions either.
> 
> As it stands the Logic PD OMAP35 and AM37/DM37 boards (SOM-LV and
> Torpedo) require this to be hard coded to 4 or it hangs during start.
> This is the case for all versions 4.2+.  I haven't tested it with
> older stuff.  Tony has a DM3730 Torpedo kit and reported the hanging
> issue to me. I told him to set that value to 4 to make it not hang.
> He asked that I move it to the DT to avoid custom kernels.  I agree
> it's a hack, but if it's create a customized defconfig file for 4
> boards or modify the device tree, it seems like the device tree
> approach is less intrusive.

Well, if this boards needs a factor 4 to be defined, it is IMHO
100 % correct to describe this in the DTS and nowhere else. Like
minimum and maximum voltage of a regulator which is also very board
specific.

Unless it can be figured out automatically. If it turns out later
that it can, I would assume the drivers can simply ignore the hint
in the DTS?

Just my 2cts without knowing details and having tested anything
on our DM37 boards.

BR,
Nikolaus


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 15:09   ` Adam Ford
  2019-05-28 15:20     ` H. Nikolaus Schaller
@ 2019-05-28 15:53     ` Tomi Valkeinen
  2019-05-31 12:13       ` Adam Ford
  2019-09-25 20:51       ` Adam Ford
  1 sibling, 2 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-05-28 15:53 UTC (permalink / raw)
  To: Adam Ford
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

Hi,

On 28/05/2019 18:09, Adam Ford wrote:
> On Tue, May 28, 2019 at 4:11 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>>
>> Hi,
>>
>> On 10/05/2019 22:42, Adam Ford wrote:
>>> Currently the source code is compiled using hard-coded values
>>> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
>>> clock divider value to be moved to the device tree and be changed
>>> without having to recompile the kernel.
>>>
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>
>> I understand why you want to do this, but I'm not sure it's a good idea.
>> It's really something the driver should figure out, and if we add it to
>> the DT, it effectively becomes an ABI.
>>
>> That said... I'm not sure how good of a job the driver could ever do, as
>> it can't know the future scaling needs of the userspace at the time it
>> is configuring the clock. And so, I'm not nacking this patch, but I
>> don't feel very good about this patch...
>>
>> The setting also affects all outputs (exluding venc), which may not be
>> what the user wants. Then again, I think this setting is really only
>> needed on OMAP2 & 3, which have only a single output. But that's the
>> same with the current kconfig option, of course.
>>
>> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
>> opinion, and moving it to DT makes it a worse hack =). But I don't have
>> any good suggestions either.
> 
> As it stands the Logic PD OMAP35 and AM37/DM37 boards (SOM-LV and
> Torpedo) require this to be hard coded to 4 or it hangs during start.
> This is the case for all versions 4.2+.  I haven't tested it with
> older stuff.  Tony has a DM3730 Torpedo kit and reported the hanging
> issue to me. I told him to set that value to 4 to make it not hang.
> He asked that I move it to the DT to avoid custom kernels.  I agree
> it's a hack, but if it's create a customized defconfig file for 4
> boards or modify the device tree, it seems like the device tree
> approach is less intrusive.

Ok, well, I think that's a separate thing from its intended use. The 
point of the kconfig option is to ensure that the fclk/pclk ratio stays 
under a certain number to allow enough scaling range. It should never 
affect a basic non-scaling use case, unless you set it to a too high 
value, which prevents finding any pclk.

Has anyone debugged why the hang is happening?

If we can't fix the bug itself, rather than adding a DT option, we could 
change add a min_fck_per_pck field (as you do), keep the kconfig option, 
and set the min_fck_per_pck based on the kconfig option, _or_ in case of 
those affected SoCs, set the min_fck_per_pck even without the kconfig 
option.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 15:53     ` Tomi Valkeinen
@ 2019-05-31 12:13       ` Adam Ford
  2019-09-25 20:51       ` Adam Ford
  1 sibling, 0 replies; 40+ messages in thread
From: Adam Ford @ 2019-05-31 12:13 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On Tue, May 28, 2019 at 10:53 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> Hi,
>
> On 28/05/2019 18:09, Adam Ford wrote:
> > On Tue, May 28, 2019 at 4:11 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> >>
> >> Hi,
> >>
> >> On 10/05/2019 22:42, Adam Ford wrote:
> >>> Currently the source code is compiled using hard-coded values
> >>> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
> >>> clock divider value to be moved to the device tree and be changed
> >>> without having to recompile the kernel.
> >>>
> >>> Signed-off-by: Adam Ford <aford173@gmail.com>
> >>
> >> I understand why you want to do this, but I'm not sure it's a good idea.
> >> It's really something the driver should figure out, and if we add it to
> >> the DT, it effectively becomes an ABI.
> >>
> >> That said... I'm not sure how good of a job the driver could ever do, as
> >> it can't know the future scaling needs of the userspace at the time it
> >> is configuring the clock. And so, I'm not nacking this patch, but I
> >> don't feel very good about this patch...
> >>
> >> The setting also affects all outputs (exluding venc), which may not be
> >> what the user wants. Then again, I think this setting is really only
> >> needed on OMAP2 & 3, which have only a single output. But that's the
> >> same with the current kconfig option, of course.
> >>
> >> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
> >> opinion, and moving it to DT makes it a worse hack =). But I don't have
> >> any good suggestions either.
> >
> > As it stands the Logic PD OMAP35 and AM37/DM37 boards (SOM-LV and
> > Torpedo) require this to be hard coded to 4 or it hangs during start.
> > This is the case for all versions 4.2+.  I haven't tested it with
> > older stuff.  Tony has a DM3730 Torpedo kit and reported the hanging
> > issue to me. I told him to set that value to 4 to make it not hang.
> > He asked that I move it to the DT to avoid custom kernels.  I agree
> > it's a hack, but if it's create a customized defconfig file for 4
> > boards or modify the device tree, it seems like the device tree
> > approach is less intrusive.
>
> Ok, well, I think that's a separate thing from its intended use. The
> point of the kconfig option is to ensure that the fclk/pclk ratio stays
> under a certain number to allow enough scaling range. It should never
> affect a basic non-scaling use case, unless you set it to a too high
> value, which prevents finding any pclk.
>
> Has anyone debugged why the hang is happening?

I tried debugging this years ago, and I was told to use the
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.
>
> If we can't fix the bug itself, rather than adding a DT option, we could
> change add a min_fck_per_pck field (as you do), keep the kconfig option,
> and set the min_fck_per_pck based on the kconfig option, _or_ in case of
> those affected SoCs, set the min_fck_per_pck even without the kconfig
> option.

I am just curious if anyone else sees this.  If nobody is using this
hack, I wonder how much of the impact it will be.  I'm trying trying
to get my board to boot without hanging without creating a custom
defconfig.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-10 19:42 [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts Adam Ford
  2019-05-28 11:11 ` Tomi Valkeinen
@ 2019-06-13 20:22 ` Rob Herring
  1 sibling, 0 replies; 40+ messages in thread
From: Rob Herring @ 2019-06-13 20:22 UTC (permalink / raw)
  To: Adam Ford
  Cc: linux-omap, adam.ford, Tomi Valkeinen, David Airlie,
	Daniel Vetter, Mark Rutland, Benoît Cousson, Tony Lindgren,
	dri-devel, devicetree, linux-kernel

On Fri, May 10, 2019 at 02:42:29PM -0500, Adam Ford wrote:
> Currently the source code is compiled using hard-coded values
> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
> clock divider value to be moved to the device tree and be changed
> without having to recompile the kernel.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
> index cd02516a40b6..42449d07c47e 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
> +++ b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
> @@ -40,7 +40,7 @@ Required properties:
>  Optional properties:
>  - max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
>  			in bytes per second
> -
> +- min-fck-pck-ratio:  Make sure that DISPC FCK is at least n x PCK

Assuming this patch progresses, this needs a vendor prefix and please 
split bindings to separate patch.

>  
>  RFBI
>  ----
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index 4043ecb38016..bf84a8487aae 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -751,7 +751,7 @@
>  			#size-cells = <1>;
>  			ranges;
>  
> -			dispc@48050400 {
> +			dispc: dispc@48050400 {

Unrelated change.

>  				compatible = "ti,omap3-dispc";
>  				reg = <0x48050400 0x400>;
>  				interrupts = <25>;
> diff --git a/drivers/gpu/drm/omapdrm/dss/Kconfig b/drivers/gpu/drm/omapdrm/dss/Kconfig
> index f24ebf7f61dd..d0666edcdf2a 100644
> --- a/drivers/gpu/drm/omapdrm/dss/Kconfig
> +++ b/drivers/gpu/drm/omapdrm/dss/Kconfig
> @@ -102,24 +102,6 @@ config OMAP2_DSS_DSI
>  
>  	  See http://www.mipi.org/ for DSI specifications.
>  
> -config OMAP2_DSS_MIN_FCK_PER_PCK
> -	int "Minimum FCK/PCK ratio (for scaling)"
> -	range 0 32
> -	default 0
> -	help
> -	  This can be used to adjust the minimum FCK/PCK ratio.
> -
> -	  With this you can make sure that DISPC FCK is at least
> -	  n x PCK. Video plane scaling requires higher FCK than
> -	  normally.
> -
> -	  If this is set to 0, there's no extra constraint on the
> -	  DISPC FCK. However, the FCK will at minimum be
> -	  2xPCK (if active matrix) or 3xPCK (if passive matrix).
> -
> -	  Max FCK is 173MHz, so this doesn't work if your PCK
> -	  is very high.
> -
>  config OMAP2_DSS_SLEEP_AFTER_VENC_RESET
>  	bool "Sleep 20ms after VENC reset"
>  	default y
> diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
> index ba82d916719c..09a130c53da2 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dispc.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
> @@ -198,6 +198,9 @@ struct dispc_device {
>  
>  	/* DISPC_CONTROL & DISPC_CONFIG lock*/
>  	spinlock_t control_lock;
> +
> +	/* Optional min-fck-pck-ratio */
> +	u32 min_fck_per_pck;
>  };
>  
>  enum omap_color_component {
> @@ -3683,15 +3686,8 @@ bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,
>  	unsigned long pck, lck;
>  	unsigned long lck_max;
>  	unsigned long pckd_hw_min, pckd_hw_max;
> -	unsigned int min_fck_per_pck;
>  	unsigned long fck;
>  
> -#ifdef CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK
> -	min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK;
> -#else
> -	min_fck_per_pck = 0;
> -#endif
> -
>  	pckd_hw_min = dispc->feat->min_pcd;
>  	pckd_hw_max = 255;
>  
> @@ -3723,7 +3719,7 @@ bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,
>  			else
>  				fck = lck;
>  
> -			if (fck < pck * min_fck_per_pck)
> +			if (fck < pck * dispc->min_fck_per_pck)
>  				continue;
>  
>  			if (func(lckd, pckd, lck, pck, data))
> @@ -4826,6 +4822,8 @@ static int dispc_bind(struct device *dev, struct device *master, void *data)
>  		}
>  	}
>  
> +	of_property_read_u32(np, "min-fck-pck-ratio", &dispc->min_fck_per_pck);
> +
>  	r = dispc_init_gamma_tables(dispc);
>  	if (r)
>  		goto err_free;
> -- 
> 2.17.1
> 

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 15:53     ` Tomi Valkeinen
  2019-05-31 12:13       ` Adam Ford
@ 2019-09-25 20:51       ` Adam Ford
  2019-09-26  6:55         ` Tomi Valkeinen
  1 sibling, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-25 20:51 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On Tue, May 28, 2019 at 10:53 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> Hi,
>
> On 28/05/2019 18:09, Adam Ford wrote:
> > On Tue, May 28, 2019 at 4:11 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> >>
> >> Hi,
> >>
> >> On 10/05/2019 22:42, Adam Ford wrote:
> >>> Currently the source code is compiled using hard-coded values
> >>> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
> >>> clock divider value to be moved to the device tree and be changed
> >>> without having to recompile the kernel.
> >>>
> >>> Signed-off-by: Adam Ford <aford173@gmail.com>
> >>
> >> I understand why you want to do this, but I'm not sure it's a good idea.
> >> It's really something the driver should figure out, and if we add it to
> >> the DT, it effectively becomes an ABI.
> >>
> >> That said... I'm not sure how good of a job the driver could ever do, as
> >> it can't know the future scaling needs of the userspace at the time it
> >> is configuring the clock. And so, I'm not nacking this patch, but I
> >> don't feel very good about this patch...
> >>
> >> The setting also affects all outputs (exluding venc), which may not be
> >> what the user wants. Then again, I think this setting is really only
> >> needed on OMAP2 & 3, which have only a single output. But that's the
> >> same with the current kconfig option, of course.
> >>
> >> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
> >> opinion, and moving it to DT makes it a worse hack =). But I don't have
> >> any good suggestions either.
> >
> > As it stands the Logic PD OMAP35 and AM37/DM37 boards (SOM-LV and
> > Torpedo) require this to be hard coded to 4 or it hangs during start.
> > This is the case for all versions 4.2+.  I haven't tested it with
> > older stuff.  Tony has a DM3730 Torpedo kit and reported the hanging
> > issue to me. I told him to set that value to 4 to make it not hang.
> > He asked that I move it to the DT to avoid custom kernels.  I agree
> > it's a hack, but if it's create a customized defconfig file for 4
> > boards or modify the device tree, it seems like the device tree
> > approach is less intrusive.
>
> Ok, well, I think that's a separate thing from its intended use. The
> point of the kconfig option is to ensure that the fclk/pclk ratio stays
> under a certain number to allow enough scaling range. It should never
> affect a basic non-scaling use case, unless you set it to a too high
> value, which prevents finding any pclk.
>
> Has anyone debugged why the hang is happening?
I started to debug this, but I got distracted when I noticed the LCD
did't work at all on modern kernels.  I have that fixed now, so I can
go back to investigating this.

Working version:

[    7.999359] DISPC: dispc_runtime_get
[    7.999542] DSS: dss_restore_context
[    7.999542] DSS: context restored
[    7.999572] DISPC: dispc_runtime_put
[    7.999603] DISPC: dispc_save_context
[    7.999633] DISPC: context saved
[    7.999694] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    7.999694] [drm] No driver support for vblank timestamp query.
[    8.025909] DSS: dss_save_context
[    8.025939] DSS: context saved
[    8.031951] DISPC: dispc_runtime_get
[    8.032043] DSS: dss_restore_context
[    8.032043] DSS: context restored
[    8.032073] DPI: dpi_set_timings
[    8.032104] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[    8.032135] DISPC: scrw 480, width 480
[    8.032135] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[    8.032135] DISPC: 0,0 480x272 -> 480x272
[    8.032135] DISPC: dispc_enable_plane 0, 1
[    8.032165] DISPC: dispc_runtime_get
[    8.032196] DISPC: dispc_runtime_get
[    8.032196] DSS: set fck to 36000000
[    8.032257] DISPC: lck = 36000000 (1)
[    8.032257] DISPC: pck = 9000000 (4)
[    8.034240] DISPC: channel 0 xres 480 yres 272
[    8.034271] DISPC: pck 9000000
[    8.034271] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
[    8.034271] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
de_level 1 sync_pclk_edge -1
[    8.034271] DISPC: hsync 17077Hz, vsync 59Hz
[    8.493347] DISPC: dispc_runtime_put
[    8.493438] Console: switching to colour frame buffer device 60x34
[    8.493774] DISPC: dispc_runtime_get
[    8.493835] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[    8.493896] DISPC: scrw 480, width 480
[    8.493896] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[    8.493927] DISPC: 0,0 480x272 -> 480x272
[    8.493957] DISPC: dispc_enable_plane 0, 1
[    8.493988] DISPC: GO LCD
[    8.506774] DISPC: dispc_runtime_put
[    8.512298] omapdrm omapdrm.0: fb0: omapdrmdrmfb frame buffer device
[    8.516632] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0
[    8.581359] wlcore: WARNING Detected unconfigured mac address in
nvs, derive from fuse instead.
[    8.581359] wlcore: WARNING Your device performance is not optimized.
[    8.581390] wlcore: WARNING Please use the calibrator tool to
configure your device.
[    8.583862] wlcore: loaded
[    9.520355] DISPC: dispc_runtime_get
[    9.520446] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[    9.520477] DISPC: scrw 480, width 480
[    9.520507] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[    9.520538] DISPC: 0,0 480x272 -> 480x272
[    9.520568] DISPC: dispc_enable_plane 0, 1
[    9.520599] DISPC: GO LCD
[    9.535400] DISPC: dispc_runtime_put


The Non-working version with the divisor set to 0:

[   10.719512] DSS: dss_runtime_get
[   10.723022] DSS: dss_restore_context
[   10.726623] DSS: OMAP DSS rev 2.0
[   10.730041] DSS: dss_runtime_put
[   10.733306] DSS: dss_save_context
[   10.736633] DSS: context saved
[   10.740417] DSS: dss_restore_context
[   10.744018] DSS: context restored
[   10.748046] DISPC: dispc_runtime_get
[   10.751770] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[   10.758514] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[   10.765289] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[   10.772033] DISPC: dispc_restore_context
[   10.775970] DISPC: dispc_restore_gamma_tables()
[   10.780578] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[   10.787322] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[   10.794067] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[   10.800842] omapdss_dispc 48050400.dispc: OMAP DISPC rev 3.0
[   10.806518] DISPC: dispc_runtime_put
[   10.810150] DISPC: dispc_save_context
[   10.813873] DISPC: context saved
[   10.817291] omapdss_dss 48050000.dss: bound 48050400.dispc (ops
hdmi5_configure [omapdss])
[   10.927215] DSS: dss_save_context
[   10.930725] DSS: context saved
[   11.097503] omapdrm omapdrm.0: DMM not available, disable DMM support
[   11.104248] omapdss_dss 48050000.dss: connect(NULL, 48050000.dss)
[   11.110473] omapdss_dss 48050000.dss: connect(48050000.dss, NULL)
[   11.116729] DISPC: dispc_runtime_get
[   11.120452] DSS: dss_restore_context
[   11.124053] DSS: context restored
[   11.127410] DISPC: dispc_runtime_put
[   11.131072] DISPC: dispc_save_context
[   11.134765] DISPC: context saved
[   11.138092] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   11.144775] [drm] No driver support for vblank timestamp query.
[   11.156372] DSS: dss_save_context
[   11.159729] DSS: context saved

** hang **

I noticed there doesn't seem to be the calculation for setting fck,
pck or any of the timings.  Are there any more debug options I can
enable?

I would prefer to fix the calculation so the display can work without
the defconfig or device tree modification, and then we dump this all
together.

>
> If we can't fix the bug itself, rather than adding a DT option, we could
> change add a min_fck_per_pck field (as you do), keep the kconfig option,
> and set the min_fck_per_pck based on the kconfig option, _or_ in case of
> those affected SoCs, set the min_fck_per_pck even without the kconfig
> option.
>
>   Tomi
>

thanks

adam
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-05-28 11:11 ` Tomi Valkeinen
  2019-05-28 15:09   ` Adam Ford
@ 2019-09-25 21:26   ` Andrew F. Davis
  1 sibling, 0 replies; 40+ messages in thread
From: Andrew F. Davis @ 2019-09-25 21:26 UTC (permalink / raw)
  To: Tomi Valkeinen, Adam Ford, linux-omap
  Cc: Mark Rutland, devicetree, David Airlie, linux-kernel, dri-devel,
	Tony Lindgren, Rob Herring, Benoît Cousson, adam.ford

On 5/28/19 4:11 AM, Tomi Valkeinen wrote:
> Hi,
> 
> On 10/05/2019 22:42, Adam Ford wrote:
>> Currently the source code is compiled using hard-coded values
>> from CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK.  This patch allows this
>> clock divider value to be moved to the device tree and be changed
>> without having to recompile the kernel.
>>
>> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> I understand why you want to do this, but I'm not sure it's a good idea.
> It's really something the driver should figure out, and if we add it to
> the DT, it effectively becomes an ABI.
> 
> That said... I'm not sure how good of a job the driver could ever do, as
> it can't know the future scaling needs of the userspace at the time it
> is configuring the clock. And so, I'm not nacking this patch, but I
> don't feel very good about this patch...
> 
> The setting also affects all outputs (exluding venc), which may not be
> what the user wants. Then again, I think this setting is really only
> needed on OMAP2 & 3, which have only a single output. But that's the
> same with the current kconfig option, of course.
> 
> So, the current CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK is an ugly hack, in my
> opinion, and moving it to DT makes it a worse hack =). But I don't have
> any good suggestions either.
> 


Module param?

Andrew


>  Tomi
> 

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-25 20:51       ` Adam Ford
@ 2019-09-26  6:55         ` Tomi Valkeinen
  2019-09-26 14:12           ` Adam Ford
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-26  6:55 UTC (permalink / raw)
  To: Adam Ford
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On 25/09/2019 23:51, Adam Ford wrote:

>> Has anyone debugged why the hang is happening?
> I started to debug this, but I got distracted when I noticed the LCD
> did't work at all on modern kernels.  I have that fixed now, so I can
> go back to investigating this.
> 
> Working version:
> 
> [    7.999359] DISPC: dispc_runtime_get
> [    7.999542] DSS: dss_restore_context
> [    7.999542] DSS: context restored
> [    7.999572] DISPC: dispc_runtime_put
> [    7.999603] DISPC: dispc_save_context
> [    7.999633] DISPC: context saved
> [    7.999694] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [    7.999694] [drm] No driver support for vblank timestamp query.
> [    8.025909] DSS: dss_save_context
> [    8.025939] DSS: context saved
> [    8.031951] DISPC: dispc_runtime_get
> [    8.032043] DSS: dss_restore_context
> [    8.032043] DSS: context restored
> [    8.032073] DPI: dpi_set_timings
> [    8.032104] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
> 0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
> chan 0 repl 1
> [    8.032135] DISPC: scrw 480, width 480
> [    8.032135] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
> [    8.032135] DISPC: 0,0 480x272 -> 480x272
> [    8.032135] DISPC: dispc_enable_plane 0, 1
> [    8.032165] DISPC: dispc_runtime_get
> [    8.032196] DISPC: dispc_runtime_get
> [    8.032196] DSS: set fck to 36000000
> [    8.032257] DISPC: lck = 36000000 (1)
> [    8.032257] DISPC: pck = 9000000 (4)
> [    8.034240] DISPC: channel 0 xres 480 yres 272
> [    8.034271] DISPC: pck 9000000
> [    8.034271] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
> [    8.034271] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
> de_level 1 sync_pclk_edge -1
> [    8.034271] DISPC: hsync 17077Hz, vsync 59Hz
> [    8.493347] DISPC: dispc_runtime_put
> [    8.493438] Console: switching to colour frame buffer device 60x34
> [    8.493774] DISPC: dispc_runtime_get
> [    8.493835] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
> 0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
> chan 0 repl 1
> [    8.493896] DISPC: scrw 480, width 480
> [    8.493896] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
> [    8.493927] DISPC: 0,0 480x272 -> 480x272
> [    8.493957] DISPC: dispc_enable_plane 0, 1
> [    8.493988] DISPC: GO LCD
> [    8.506774] DISPC: dispc_runtime_put
> [    8.512298] omapdrm omapdrm.0: fb0: omapdrmdrmfb frame buffer device
> [    8.516632] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0
> [    8.581359] wlcore: WARNING Detected unconfigured mac address in
> nvs, derive from fuse instead.
> [    8.581359] wlcore: WARNING Your device performance is not optimized.
> [    8.581390] wlcore: WARNING Please use the calibrator tool to
> configure your device.
> [    8.583862] wlcore: loaded
> [    9.520355] DISPC: dispc_runtime_get
> [    9.520446] DISPC: dispc_ovl_setup 0, pa 0x9e900000, pa_uv
> 0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
> chan 0 repl 1
> [    9.520477] DISPC: scrw 480, width 480
> [    9.520507] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
> [    9.520538] DISPC: 0,0 480x272 -> 480x272
> [    9.520568] DISPC: dispc_enable_plane 0, 1
> [    9.520599] DISPC: GO LCD
> [    9.535400] DISPC: dispc_runtime_put
> 
> 
> The Non-working version with the divisor set to 0:
> 
> [   10.719512] DSS: dss_runtime_get
> [   10.723022] DSS: dss_restore_context
> [   10.726623] DSS: OMAP DSS rev 2.0
> [   10.730041] DSS: dss_runtime_put
> [   10.733306] DSS: dss_save_context
> [   10.736633] DSS: context saved
> [   10.740417] DSS: dss_restore_context
> [   10.744018] DSS: context restored
> [   10.748046] DISPC: dispc_runtime_get
> [   10.751770] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
> [   10.758514] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
> [   10.765289] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
> [   10.772033] DISPC: dispc_restore_context
> [   10.775970] DISPC: dispc_restore_gamma_tables()
> [   10.780578] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
> [   10.787322] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
> [   10.794067] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
> [   10.800842] omapdss_dispc 48050400.dispc: OMAP DISPC rev 3.0
> [   10.806518] DISPC: dispc_runtime_put
> [   10.810150] DISPC: dispc_save_context
> [   10.813873] DISPC: context saved
> [   10.817291] omapdss_dss 48050000.dss: bound 48050400.dispc (ops
> hdmi5_configure [omapdss])
> [   10.927215] DSS: dss_save_context
> [   10.930725] DSS: context saved
> [   11.097503] omapdrm omapdrm.0: DMM not available, disable DMM support
> [   11.104248] omapdss_dss 48050000.dss: connect(NULL, 48050000.dss)
> [   11.110473] omapdss_dss 48050000.dss: connect(48050000.dss, NULL)
> [   11.116729] DISPC: dispc_runtime_get
> [   11.120452] DSS: dss_restore_context
> [   11.124053] DSS: context restored
> [   11.127410] DISPC: dispc_runtime_put
> [   11.131072] DISPC: dispc_save_context
> [   11.134765] DISPC: context saved
> [   11.138092] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [   11.144775] [drm] No driver support for vblank timestamp query.
> [   11.156372] DSS: dss_save_context
> [   11.159729] DSS: context saved
> 
> ** hang **
> 
> I noticed there doesn't seem to be the calculation for setting fck,
> pck or any of the timings.  Are there any more debug options I can
> enable?

The logs here look very different. The first one doesn't even show the 
DSS rev prints. Can you get full logs for both? And even better, if you 
can build omapdss as a kernel module, and load it after the boot, you 
won't have any "extra" going on at the same time.

And what is the hdmi5_configure there? I don't see anything in the 
driver that would print hdmi5_configure. And, of course, there's no 
hdmi5 on that platform. Hmm, ok... it's from component.c, using "%ps". 
Somehow that goes wrong. Which is a bit alarming, but perhaps a totally 
different issue.

The hang happens at an odd time. The last line shows that the driver has 
managed to do its work at suspend time. Afaics, the only thing the 
driver does after that is calling pinctrl_pm_select_sleep_state(). You 
could add a print after that to be sure that goes fine. But I suspect it 
does.

Which then hints that the hang is somewhere outside the driver, in 
omap_device perhaps?

You could try adding an extra call to dss_runtime_get(). Say, at the 
beginning of dss_probe_hardware(), do another dss_runtime_get(). That 
should force DSS to be always on (until reboot). runtime PM suspend 
related bugs should disappear.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-26  6:55         ` Tomi Valkeinen
@ 2019-09-26 14:12           ` Adam Ford
  2019-09-27  6:21             ` Tomi Valkeinen
  2019-09-27  7:55             ` Tomi Valkeinen
  0 siblings, 2 replies; 40+ messages in thread
From: Adam Ford @ 2019-09-26 14:12 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On Thu, Sep 26, 2019 at 1:55 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> On 25/09/2019 23:51, Adam Ford wrote:
>
> >> Has anyone debugged why the hang is happening?
> > I started to debug this, but I got distracted when I noticed the LCD
> > did't work at all on modern kernels.  I have that fixed now, so I can
> > go back to investigating this.
> >
> > Working version:
> >

> >
> > I noticed there doesn't seem to be the calculation for setting fck,
> > pck or any of the timings.  Are there any more debug options I can
> > enable?
>
> The logs here look very different. The first one doesn't even show the
> DSS rev prints. Can you get full logs for both? And even better, if you
> can build omapdss as a kernel module, and load it after the boot, you
> won't have any "extra" going on at the same time.

Since it's build as a module, I only dumped the stuff starting after
the modules are loading.  I can provide more if you want, but I am
trying to avoid excessive noise.

5.3.1 with drivers build as modules:

[    5.143615] random: udevd: uninitialized urandom read (16 bytes read)
[    5.153869] random: udevd: uninitialized urandom read (16 bytes read)
[    5.160522] random: udevd: uninitialized urandom read (16 bytes read)
[    5.187286] udevd[104]: specified group 'kvm' unknown
[    5.240875] udevd[105]: starting eudev-3.2.7
[    6.026672] DSS: set fck to 172800000
[    6.030487] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.084716] omap_ssi 48058000.ssi-controller: ssi controller 0
initialized (2 ports)!
[    6.093536] omap_ssi_port 4805a000.ssi-port: GPIO lookup for
consumer ti,ssi-cawake
[    6.101348] omap_ssi_port 4805a000.ssi-port: using device tree for
GPIO lookup
[    6.108642] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpios' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    6.122131] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpio' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    6.135559] omap_ssi_port 4805a000.ssi-port: using lookup tables
for GPIO lookup
[    6.143035] omap_ssi_port 4805a000.ssi-port: No GPIO consumer
ti,ssi-cawake found
[    6.150543] omap_ssi_port 4805a000.ssi-port: couldn't get cawake
gpio (err=-2)!
[    6.157958] omap_ssi_port: probe of 4805a000.ssi-port failed with error -2
[    6.164978] omap_ssi_port 4805b000.ssi-port: GPIO lookup for
consumer ti,ssi-cawake
[    6.172698] omap_ssi_port 4805b000.ssi-port: using device tree for
GPIO lookup
[    6.179992] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpios' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    6.193481] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpio' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    6.206909] omap_ssi_port 4805b000.ssi-port: using lookup tables
for GPIO lookup
[    6.214355] omap_ssi_port 4805b000.ssi-port: No GPIO consumer
ti,ssi-cawake found
[    6.221923] omap_ssi_port 4805b000.ssi-port: couldn't get cawake
gpio (err=-2)!
[    6.229278] omap_ssi_port: probe of 4805b000.ssi-port failed with error -2
[    6.265075] at24 2-0050: GPIO lookup for consumer wp
[    6.270080] at24 2-0050: using device tree for GPIO lookup
[    6.275756] of_get_named_gpiod_flags: can't parse 'wp-gpios'
property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    6.286499] of_get_named_gpiod_flags: can't parse 'wp-gpio'
property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    6.297119] at24 2-0050: using lookup tables for GPIO lookup
[    6.302856] at24 2-0050: No GPIO consumer wp found
[    6.324035] tsc2004 2-0048: GPIO lookup for consumer reset
[    6.329559] tsc2004 2-0048: using device tree for GPIO lookup
[    6.335571] of_get_named_gpiod_flags: can't parse 'reset-gpios'
property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.346862] of_get_named_gpiod_flags: can't parse 'reset-gpio'
property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.358001] tsc2004 2-0048: using lookup tables for GPIO lookup
[    6.363983] tsc2004 2-0048: No GPIO consumer reset found
[    6.417541] usbcore: registered new interface driver usbfs
[    6.423309] usbcore: registered new interface driver hub
[    6.428802] usbcore: registered new device driver usb
[    6.474761] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    6.523010] twl4030_keypad 48070000.i2c:twl@48:keypad: missing or
malformed property linux,keymap: -22
[    6.532531] twl4030_keypad 48070000.i2c:twl@48:keypad: Failed to build keymap
[    6.539764] twl4030_keypad: probe of 48070000.i2c:twl@48:keypad
failed with error -22
[    6.590362] ehci-omap: OMAP-EHCI Host Controller driver
[    6.596557] ehci-omap 48064800.ehci: EHCI Host Controller
[    6.602203] ehci-omap 48064800.ehci: new USB bus registered,
assigned bus number 1
[    6.646911] DSS: set fck to 172800000
[    6.650848] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.730804] at24 2-0050: 8192 byte 24c64 EEPROM, writable, 1 bytes/write
[    6.756164] input: twl4030_pwrbutton as
/devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:pwrbutton/input/input2
[    6.778076] DSS: set fck to 172800000
[    6.782104] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.794891] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    6.892547] ohci-platform: OHCI generic platform driver
[    6.898437] ohci-platform 48064400.ohci: Generic Platform OHCI controller
[    6.905456] ohci-platform 48064400.ohci: new USB bus registered,
assigned bus number 2
[    6.954040] DSS: set fck to 172800000
[    6.957824] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.968170] input: TSC200X touchscreen as
/devices/platform/68000000.ocp/48060000.i2c/i2c-2/2-0048/input/input0
[    7.093811] DSS: set fck to 172800000
[    7.097625] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.224639] omap-mailbox 48094000.mailbox: omap mailbox rev 0x40
[    7.274658] twl_rtc 48070000.i2c:twl@48:rtc: Enabling TWL-RTC
[    7.292907] DSS: set fck to 172800000
[    7.297119] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.316192] twl_rtc 48070000.i2c:twl@48:rtc: registered as rtc0
[    7.431549] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
[    7.437469] musb-hdrc musb-hdrc.0.auto: new USB bus registered,
assigned bus number 3
[    7.450439] twl4030_usb 48070000.i2c:twl@48:twl4030-usb:
Initialized TWL4030 USB module
[    7.526092] usb usb3: New USB device found, idVendor=1d6b,
idProduct=0002, bcdDevice= 5.03
[    7.534576] usb usb3: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    7.541931] usb usb3: Product: MUSB HDRC host driver
[    7.546936] usb usb3: Manufacturer: Linux
5.3.1-00003-g848fbc000e72-dirty musb-hcd
[    7.554595] usb usb3: SerialNumber: musb-hdrc.0.auto
[    7.590911] Driver for 1-wire Dallas network protocol.
[    7.640197] DSS: set fck to 172800000
[    7.644134] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.711212] omap_hdq 480b2000.1w: OMAP HDQ Hardware Rev 0.5. Driver
in Interrupt mode
[    7.722930] mc: Linux media interface: v0.10
[    7.809753] videodev: Linux video capture interface: v2.00
[    7.858215] ohci-platform 48064400.ohci: irq 92, io mem 0x48064400
[    7.875671] hub 3-0:1.0: USB hub found
[    7.890167] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    7.899566] DSS: set fck to 172800000
[    7.903533] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.915832] hub 3-0:1.0: 1 port detected
[    7.959960] w1_master_driver w1_bus_master1: Attaching one wire
slave 01.000000000000 crc 3d
[    8.080474] DSS: set fck to 172800000
[    8.084411] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    8.127838] power_supply bq27000-battery:
power_supply_get_battery_info currently only supports devicetree
[    8.162322] usb usb2: New USB device found, idVendor=1d6b,
idProduct=0001, bcdDevice= 5.03
[    8.170654] usb usb2: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    8.178039] usb usb2: Product: Generic Platform OHCI controller
[    8.184051] usb usb2: Manufacturer: Linux
5.3.1-00003-g848fbc000e72-dirty ohci_hcd
[    8.191680] usb usb2: SerialNumber: 48064400.ohci
[    8.202484] ehci-omap 48064800.ehci: irq 93, io mem 0x48064800
[    8.245422] ehci-omap 48064800.ehci: USB 2.0 started, EHCI 1.00
[    8.283508] DSS: set fck to 172800000
[    8.287322] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    8.304565] omap3isp 480bc000.isp: ignoring dependency for device,
assuming no driver
[    8.312774] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy1
not found, using dummy regulator
[    8.322143] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy2
not found, using dummy regulator
[    8.331665] omap3isp 480bc000.isp: Revision 15.0 found
[    8.337585] omap-iommu 480bd400.mmu: 480bd400.mmu: version 1.1
[    8.343811] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CCP2 was not initialized!
[    8.502380] DSS: set fck to 172800000
[    8.506195] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    8.580474] hub 2-0:1.0: USB hub found
[    8.611572] pwm-backlight backlight: GPIO lookup for consumer enable
[    8.617980] pwm-backlight backlight: using device tree for GPIO lookup
[    8.624694] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/backlight[0]' - status (0)
[    8.634368] gpio gpiochip4: Persistence not supported for GPIO 26
[    8.640502] no flags found for enable
[    8.644287] pwm-backlight backlight: backlight supply power not
found, using dummy regulator
[    8.661285] hub 2-0:1.0: 3 ports detected
[    8.674255] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/sysboot2[0]' - status (0)
[    8.684326] gpio gpiochip0: Persistence not supported for GPIO 2
[    8.690673] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/sysboot5[0]' - status (0)
[    8.700561] gpio gpiochip0: Persistence not supported for GPIO 7
[    8.706848] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/gpio1[0]' - status (0)
[    8.716491] gpio gpiochip5: Persistence not supported for GPIO 21
[    8.722839] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/gpio2[0]' - status (0)
[    8.732421] gpio gpiochip5: Persistence not supported for GPIO 18
[    8.738983] input: gpio_keys as /devices/platform/gpio_keys/input/input3
[    8.791473] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/user0[0]' - status (0)
[    8.812042] usb usb1: New USB device found, idVendor=1d6b,
idProduct=0002, bcdDevice= 5.03
[    8.820373] usb usb1: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    8.827728] usb usb1: Product: EHCI Host Controller
[    8.832672] usb usb1: Manufacturer: Linux
5.3.1-00003-g848fbc000e72-dirty ehci_hcd
[    8.840270] usb usb1: SerialNumber: 48064800.ehci
[    8.903961] no flags found for gpios
[    8.909759] of_get_named_gpiod_flags: can't parse
'ti,jack-det-gpio' property of node '/sound[0]'
[    8.919403] of_get_named_gpiod_flags: can't parse
'ti,hs_extmute_gpio' property of node
'/ocp@68000000/i2c@48070000/twl@48/audio/codec[0]'
[    8.933105] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/led1[0]' - status (0)
[    8.942230] gpio gpiochip5: Persistence not supported for GPIO 20
[    8.948364] no flags found for gpios
[    8.952270] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/led2[0]' - status (0)
[    8.961334] gpio gpiochip5: Persistence not supported for GPIO 19
[    8.967468] no flags found for gpios
[    9.002960] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CSI2a was not initialized!
[    9.035003] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CCDC was not initialized!
[    9.055084] hub 1-0:1.0: USB hub found
[    9.068878] panel-simple display: display supply power not found,
using dummy regulator
[    9.077239] panel-simple display: GPIO lookup for consumer enable
[    9.083465] panel-simple display: using device tree for GPIO lookup
[    9.089813] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/display[0]' - status (0)
[    9.099304] gpio gpiochip4: Persistence not supported for GPIO 27
[    9.115875] hub 1-0:1.0: 3 ports detected
[    9.120910] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
preview was not initialized!
[    9.164428] omap-twl4030 sound: twl4030-hifi <-> 49022000.mcbsp mapping ok
[    9.187957] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
resizer was not initialized!
[    9.244628] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
AEWB was not initialized!
[    9.253326] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
AF was not initialized!
[    9.261810] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
histogram was not initialized!
[    9.332031] pwm-backlight backlight: GPIO lookup for consumer enable
[    9.338439] pwm-backlight backlight: using device tree for GPIO lookup
[    9.345184] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/backlight[0]' - status (0)
[    9.354858] gpio gpiochip4: Persistence not supported for GPIO 26
[    9.361022] no flags found for enable
[    9.364776] pwm-backlight backlight: backlight supply power not
found, using dummy regulator
[    9.376739] panel-simple display: display supply power not found,
using dummy regulator
[    9.385040] panel-simple display: GPIO lookup for consumer enable
[    9.391204] panel-simple display: using device tree for GPIO lookup
[    9.397552] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/display[0]' - status (0)
[    9.407043] gpio gpiochip4: Persistence not supported for GPIO 27
[    9.413970] DSS: set fck to 172800000
[    9.417724] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    9.714416] DSS: dss_runtime_get
[    9.717773] DSS: dss_restore_context
[    9.721557] DSS: OMAP DSS rev 2.0
[    9.724884] DSS: dss_runtime_put
[    9.728149] DSS: dss_save_context
[    9.731506] DSS: context saved
[    9.735382] DSS: dss_restore_context
[    9.738983] DSS: context restored
[    9.743286] DISPC: dispc_runtime_get
[    9.746917] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.753753] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.760498] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.767242] DISPC: dispc_restore_context
[    9.771301] DISPC: dispc_restore_gamma_tables()
[    9.775909] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.782714] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.789428] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.796203] omapdss_dispc 48050400.dispc: OMAP DISPC rev 3.0
[    9.801940] DISPC: dispc_runtime_put
[    9.805541] DISPC: dispc_save_context
[    9.809265] DISPC: context saved
[    9.812744] omapdss_dss 48050000.dss: bound 48050400.dispc (ops
hdmi5_configure [omapdss])
[    9.839477] mousedev: PS/2 mouse device common for all mice
[   10.145874] cfg80211: Loading compiled-in X.509 certificates for
regulatory database
[   10.173217] DSS: dss_save_context
[   10.176666] DSS: context saved
[   10.317047] omapdrm omapdrm.0: DMM not available, disable DMM support
[   10.323730] omapdss_dss 48050000.dss: connect(NULL, 48050000.dss)
[   10.329864] omapdss_dss 48050000.dss: connect(48050000.dss, NULL)
[   10.336151] DISPC: dispc_runtime_get
[   10.339813] DSS: dss_restore_context
[   10.343475] DSS: context restored
[   10.346832] DISPC: dispc_runtime_put
[   10.350433] DISPC: dispc_save_context
[   10.354156] DISPC: context saved
[   10.357452] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   10.364135] [drm] No driver support for vblank timestamp query.
[   10.374847] DSS: dss_save_context
[   10.378265] DSS: context saved

Sorry for all the nosice, but the working splat with the divider set to 4:

Populating /dev using udev: [    4.766082] udevd[104]: starting version 3.2.7
[    4.829711] random: udevd: uninitialized urandom read (16 bytes read)
[    4.839935] random: udevd: uninitialized urandom read (16 bytes read)
[    4.847320] random: udevd: uninitialized urandom read (16 bytes read)
[    4.873870] udevd[104]: specified group 'kvm' unknown
[    4.926696] udevd[105]: starting eudev-3.2.7
[    5.715698] DSS: set fck to 172800000
[    5.719512] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    5.777435] omap_ssi 48058000.ssi-controller: ssi controller 0
initialized (2 ports)!
[    5.786315] omap_ssi_port 4805a000.ssi-port: GPIO lookup for
consumer ti,ssi-cawake
[    5.794128] omap_ssi_port 4805a000.ssi-port: using device tree for
GPIO lookup
[    5.801452] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpios' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    5.814971] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpio' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    5.828369] omap_ssi_port 4805a000.ssi-port: using lookup tables
for GPIO lookup
[    5.835845] omap_ssi_port 4805a000.ssi-port: No GPIO consumer
ti,ssi-cawake found
[    5.843414] omap_ssi_port 4805a000.ssi-port: couldn't get cawake
gpio (err=-2)!
[    5.850769] omap_ssi_port: probe of 4805a000.ssi-port failed with error -2
[    5.857788] omap_ssi_port 4805b000.ssi-port: GPIO lookup for
consumer ti,ssi-cawake
[    5.865539] omap_ssi_port 4805b000.ssi-port: using device tree for
GPIO lookup
[    5.872863] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpios' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    5.886352] of_get_named_gpiod_flags: can't parse
'ti,ssi-cawake-gpio' property of node
'/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    5.899780] omap_ssi_port 4805b000.ssi-port: using lookup tables
for GPIO lookup
[    5.907257] omap_ssi_port 4805b000.ssi-port: No GPIO consumer
ti,ssi-cawake found
[    5.914794] omap_ssi_port 4805b000.ssi-port: couldn't get cawake
gpio (err=-2)!
[    5.922180] omap_ssi_port: probe of 4805b000.ssi-port failed with error -2
[    5.973175] at24 2-0050: GPIO lookup for consumer wp
[    5.978210] at24 2-0050: using device tree for GPIO lookup
[    5.983856] of_get_named_gpiod_flags: can't parse 'wp-gpios'
property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    5.994567] of_get_named_gpiod_flags: can't parse 'wp-gpio'
property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    6.005187] at24 2-0050: using lookup tables for GPIO lookup
[    6.010894] at24 2-0050: No GPIO consumer wp found
[    6.018280] tsc2004 2-0048: GPIO lookup for consumer reset
[    6.023956] tsc2004 2-0048: using device tree for GPIO lookup
[    6.029754] of_get_named_gpiod_flags: can't parse 'reset-gpios'
property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.041015] of_get_named_gpiod_flags: can't parse 'reset-gpio'
property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.052154] tsc2004 2-0048: using lookup tables for GPIO lookup
[    6.058105] tsc2004 2-0048: No GPIO consumer reset found
[    6.159973] usbcore: registered new interface driver usbfs
[    6.165771] usbcore: registered new interface driver hub
[    6.171325] usbcore: registered new device driver usb
[    6.211181] twl4030_keypad 48070000.i2c:twl@48:keypad: missing or
malformed property linux,keymap: -22
[    6.220550] twl4030_keypad 48070000.i2c:twl@48:keypad: Failed to build keymap
[    6.227844] twl4030_keypad: probe of 48070000.i2c:twl@48:keypad
failed with error -22
[    6.242553] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    6.265563] ohci-platform: OHCI generic platform driver
[    6.271759] ohci-platform 48064400.ohci: Generic Platform OHCI controller
[    6.278625] ohci-platform 48064400.ohci: new USB bus registered,
assigned bus number 1
[    6.420623] input: twl4030_pwrbutton as
/devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:pwrbutton/input/input2
[    6.438446] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    6.445220] Warning! ehci_hcd should always be loaded before
uhci_hcd and ohci_hcd, not after
[    6.491607] at24 2-0050: 8192 byte 24c64 EEPROM, writable, 1 bytes/write
[    6.506927] DSS: set fck to 172800000
[    6.510711] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.608886] ehci-omap: OMAP-EHCI Host Controller driver
[    6.614868] ehci-omap 48064800.ehci: EHCI Host Controller
[    6.620330] ehci-omap 48064800.ehci: new USB bus registered,
assigned bus number 2
[    6.647247] input: TSC200X touchscreen as
/devices/platform/68000000.ocp/48060000.i2c/i2c-2/2-0048/input/input0
[    6.659362] DSS: set fck to 172800000
[    6.663299] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.804473] DSS: set fck to 172800000
[    6.808288] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    6.890747] ohci-platform 48064400.ohci: irq 92, io mem 0x48064400
[    6.947784] omap-mailbox 48094000.mailbox: omap mailbox rev 0x40
[    7.014312] DSS: set fck to 172800000
[    7.018127] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.029022] twl_rtc 48070000.i2c:twl@48:rtc: Enabling TWL-RTC
[    7.096252] twl_rtc 48070000.i2c:twl@48:rtc: registered as rtc0
[    7.154327] DSS: set fck to 172800000
[    7.158111] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.168792] usb usb1: New USB device found, idVendor=1d6b,
idProduct=0001, bcdDevice= 5.03
[    7.177246] usb usb1: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    7.184570] usb usb1: Product: Generic Platform OHCI controller
[    7.190521] usb usb1: Manufacturer: Linux
5.3.1-00004-g468b8eee984c-dirty ohci_hcd
[    7.198181] usb usb1: SerialNumber: 48064400.ohci
[    7.204467] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
[    7.235412] Driver for 1-wire Dallas network protocol.
[    7.282104] omap_hdq 480b2000.1w: OMAP HDQ Hardware Rev 0.5. Driver
in Interrupt mode
[    7.322814] ehci-omap 48064800.ehci: irq 93, io mem 0x48064800
[    7.330871] twl4030_usb 48070000.i2c:twl@48:twl4030-usb:
Initialized TWL4030 USB module
[    7.342529] DSS: set fck to 172800000
[    7.346435] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.375427] ehci-omap 48064800.ehci: USB 2.0 started, EHCI 1.00
[    7.429779] hub 1-0:1.0: USB hub found
[    7.433898] hub 1-0:1.0: 3 ports detected
[    7.458923] DSS: set fck to 172800000
[    7.462921] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.472778] musb-hdrc musb-hdrc.0.auto: new USB bus registered,
assigned bus number 3
[    7.510559] w1_master_driver w1_bus_master1: Attaching one wire
slave 01.000000000000 crc 3d
[    7.526550] mc: Linux media interface: v0.10
[    7.590454] usb usb3: New USB device found, idVendor=1d6b,
idProduct=0002, bcdDevice= 5.03
[    7.598937] usb usb3: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    7.606231] usb usb3: Product: MUSB HDRC host driver
[    7.611297] usb usb3: Manufacturer: Linux
5.3.1-00004-g468b8eee984c-dirty musb-hcd
[    7.618896] usb usb3: SerialNumber: musb-hdrc.0.auto
[    7.691284] DSS: set fck to 172800000
[    7.695190] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    7.738800] power_supply bq27000-battery:
power_supply_get_battery_info currently only supports devicetree
[    7.772583] videodev: Linux video capture interface: v2.00
[    7.810089] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    7.908386] DSS: set fck to 172800000
[    7.912292] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    8.029205] hub 3-0:1.0: USB hub found
[    8.077514] hub 3-0:1.0: 1 port detected
[    8.129760] usb usb2: New USB device found, idVendor=1d6b,
idProduct=0002, bcdDevice= 5.03
[    8.138305] usb usb2: New USB device strings: Mfr=3, Product=2,
SerialNumber=1
[    8.145629] usb usb2: Product: EHCI Host Controller
[    8.150543] usb usb2: Manufacturer: Linux
5.3.1-00004-g468b8eee984c-dirty ehci_hcd
[    8.158172] usb usb2: SerialNumber: 48064800.ehci
[    8.201690] omap3isp 480bc000.isp: ignoring dependency for device,
assuming no driver
[    8.209808] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy1
not found, using dummy regulator
[    8.219207] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy2
not found, using dummy regulator
[    8.228729] omap3isp 480bc000.isp: Revision 15.0 found
[    8.234710] omap-iommu 480bd400.mmu: 480bd400.mmu: version 1.1
[    8.240844] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CCP2 was not initialized!
[    8.268341] DSS: set fck to 172800000
[    8.272338] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    8.372863] pwm-backlight backlight: GPIO lookup for consumer enable
[    8.379272] pwm-backlight backlight: using device tree for GPIO lookup
[    8.386047] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/backlight[0]' - status (0)
[    8.395751] gpio gpiochip4: Persistence not supported for GPIO 26
[    8.401916] no flags found for enable
[    8.405639] pwm-backlight backlight: backlight supply power not
found, using dummy regulator
[    8.437988] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/sysboot2[0]' - status (0)
[    8.448120] gpio gpiochip0: Persistence not supported for GPIO 2
[    8.454620] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/sysboot5[0]' - status (0)
[    8.464477] gpio gpiochip0: Persistence not supported for GPIO 7
[    8.470733] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/gpio1[0]' - status (0)
[    8.480346] gpio gpiochip5: Persistence not supported for GPIO 21
[    8.486694] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/gpio_keys/gpio2[0]' - status (0)
[    8.496307] gpio gpiochip5: Persistence not supported for GPIO 18
[    8.502868] input: gpio_keys as /devices/platform/gpio_keys/input/input3
[    8.555450] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/user0[0]' - status (0)
[    8.614593] of_get_named_gpiod_flags: can't parse
'ti,jack-det-gpio' property of node '/sound[0]'
[    8.624176] of_get_named_gpiod_flags: can't parse
'ti,hs_extmute_gpio' property of node
'/ocp@68000000/i2c@48070000/twl@48/audio/codec[0]'
[    8.655914] hub 2-0:1.0: USB hub found
[    8.671874] hub 2-0:1.0: 3 ports detected
[    8.738494] no flags found for gpios
[    8.746582] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/led1[0]' - status (0)
[    8.755798] gpio gpiochip5: Persistence not supported for GPIO 20
[    8.761993] no flags found for gpios
[    8.765838] of_get_named_gpiod_flags: parsed 'gpios' property of
node '/leds/led2[0]' - status (0)
[    8.774902] gpio gpiochip5: Persistence not supported for GPIO 19
[    8.781066] no flags found for gpios
[    8.815582] panel-simple display: display supply power not found,
using dummy regulator
[    8.823944] panel-simple display: GPIO lookup for consumer enable
[    8.830078] panel-simple display: using device tree for GPIO lookup
[    8.836517] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/display[0]' - status (0)
[    8.846038] gpio gpiochip4: Persistence not supported for GPIO 27
[    8.863037] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CSI2a was not initialized!
[    8.880096] omap-twl4030 sound: twl4030-hifi <-> 49022000.mcbsp mapping ok
[    8.909973] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
CCDC was not initialized!
[    8.955505] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
preview was not initialized!
[    8.996673] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
resizer was not initialized!
[    9.024017] pwm-backlight backlight: GPIO lookup for consumer enable
[    9.030426] pwm-backlight backlight: using device tree for GPIO lookup
[    9.037170] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/backlight[0]' - status (0)
[    9.046813] gpio gpiochip4: Persistence not supported for GPIO 26
[    9.052978] no flags found for enable
[    9.056701] pwm-backlight backlight: backlight supply power not
found, using dummy regulator
[    9.068450] panel-simple display: display supply power not found,
using dummy regulator
[    9.076690] panel-simple display: GPIO lookup for consumer enable
[    9.082855] panel-simple display: using device tree for GPIO lookup
[    9.089202] of_get_named_gpiod_flags: parsed 'enable-gpios'
property of node '/display[0]' - status (0)
[    9.098693] gpio gpiochip4: Persistence not supported for GPIO 27
[    9.105438] DSS: set fck to 172800000
[    9.109191] omapdss_dss 48050000.dss: 48050000.dss supply
vdda_video not found, using dummy regulator
[    9.139343] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
AEWB was not initialized!
[    9.148101] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
AF was not initialized!
[    9.156555] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP
histogram was not initialized!
[    9.296691] mousedev: PS/2 mouse device common for all mice
[    9.480438] DSS: dss_runtime_get
[    9.483886] DSS: dss_restore_context
[    9.487487] DSS: OMAP DSS rev 2.0
[    9.490814] DSS: dss_runtime_put
[    9.494140] DSS: dss_save_context
[    9.497467] DSS: context saved
[    9.501251] DSS: dss_restore_context
[    9.504852] DSS: context restored
[    9.508941] DISPC: dispc_runtime_get
[    9.512725] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.519470] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.526275] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.533020] DISPC: dispc_restore_context
[    9.536987] DISPC: dispc_restore_gamma_tables()
[    9.541564] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.548309] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.555053] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.561828] omapdss_dispc 48050400.dispc: OMAP DISPC rev 3.0
[    9.567504] DISPC: dispc_runtime_put
[    9.571136] DISPC: dispc_save_context
[    9.574829] DISPC: context saved
[    9.578247] omapdss_dss 48050000.dss: bound 48050400.dispc (ops
hdmi5_configure [omapdss])
[    9.709533] cfg80211: Loading compiled-in X.509 certificates for
regulatory database
[    9.781860] DSS: dss_save_context
[    9.785278] DSS: context saved
[    9.967437] omapdrm omapdrm.0: DMM not available, disable DMM support
[    9.974121] omapdss_dss 48050000.dss: connect(NULL, 48050000.dss)
[    9.980255] omapdss_dss 48050000.dss: connect(48050000.dss, NULL)
[    9.986541] DISPC: dispc_runtime_get
[    9.990203] DSS: dss_restore_context
[    9.993865] DSS: context restored
[    9.997222] DISPC: dispc_runtime_put
[   10.000793] DISPC: dispc_save_context
[   10.004547] DISPC: context saved
[   10.007843] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   10.014526] [drm] No driver support for vblank timestamp query.
[   10.022430] DSS: dss_save_context
[   10.025787] DSS: context saved
[   10.059051] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[   10.076721] DISPC: dispc_runtime_get
[   10.076812] DSS: dss_restore_context
[   10.076812] DSS: context restored
[   10.076873] DPI: dpi_set_timings
[   10.076904] DISPC: dispc_ovl_setup 0, pa 0x8e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[   10.076904] DISPC: scrw 480, width 480
[   10.076904] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[   10.076934] DISPC: 0,0 480x272 -> 480x272
[   10.076934] DISPC: dispc_enable_plane 0, 1
[   10.076934] DISPC: dispc_runtime_get
[   10.076995] DISPC: dispc_runtime_get
[   10.076995] DSS: set fck to 36000000
[   10.077026] DISPC: lck = 36000000 (1)
[   10.077026] DISPC: pck = 9000000 (4)
[   10.079132] DISPC: channel 0 xres 480 yres 272
[   10.079132] DISPC: pck 9000000
[   10.079132] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
[   10.079162] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
de_level 1 sync_pclk_edge -1
[   10.079162] DISPC: hsync 17077Hz, vsync 59Hz
[   10.564025] DISPC: dispc_runtime_put
[   10.564147] Console: switching to colour frame buffer device 60x34
[   10.564514] DISPC: dispc_runtime_get
[   10.564575] DISPC: dispc_ovl_setup 0, pa 0x8e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[   10.564605] DISPC: scrw 480, width 480
[   10.564636] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[   10.564666] DISPC: 0,0 480x272 -> 480x272
[   10.564666] DISPC: dispc_enable_plane 0, 1
[   10.564697] DISPC: GO LCD
[   10.568481] DISPC: dispc_runtime_put
[   10.718139] omapdrm omapdrm.0: fb0: omapdrmdrmfb frame buffer device
[   10.726226] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0
done
Initializing random number generator... [   10.828277] urandom_read: 1
callbacks suppressed
[   10.828277] random: dd: uninitialized urandom read (512 bytes read)
done.
Starting system message bus: [   10.896789] random: dbus-uuidgen:
uninitialized urandom read (12 bytes read)
[   10.904510] random: dbus-uuidgen: uninitialized urandom read (8 bytes read)
done
Starting network: OK

Welcome to Buildroot
buildroot login: [   11.284576] wlcore: WARNING Detected unconfigured
mac address in nvs, derive from fuse instead.
[   11.293518] wlcore: WARNING Your device performance is not optimized.
[   11.299987] wlcore: WARNING Please use the calibrator tool to
configure your device.
[   11.313751] wlcore: loaded
[   11.761871] DISPC: dispc_runtime_get
[   11.765563] DISPC: dispc_ovl_setup 0, pa 0x8e900000, pa_uv
0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1,
chan 0 repl 1
[   11.778472] DISPC: scrw 480, width 480
[   11.782348] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[   11.788177] DISPC: 0,0 480x272 -> 480x272
[   11.792297] DISPC: dispc_enable_plane 0, 1
[   11.796447] DISPC: GO LCD
[   11.803985] DISPC: dispc_runtime_put

>
> And what is the hdmi5_configure there? I don't see anything in the
> driver that would print hdmi5_configure. And, of course, there's no
> hdmi5 on that platform. Hmm, ok... it's from component.c, using "%ps".
> Somehow that goes wrong. Which is a bit alarming, but perhaps a totally
> different issue.

I'll try to take a look later.  For Logic PD distributions, we create
a custom defconfig with all those drivers removed, so I'm not worked
up about it, but it would be nice to not call drivers that don't
exist.

>
> The hang happens at an odd time. The last line shows that the driver has
> managed to do its work at suspend time. Afaics, the only thing the
> driver does after that is calling pinctrl_pm_select_sleep_state(). You
> could add a print after that to be sure that goes fine. But I suspect it
> does.
>
> Which then hints that the hang is somewhere outside the driver, in
> omap_device perhaps?

Thanks for reviewing this.  I've been coping for a while by manually
changing the config option, but with 5.4 being the expected next LTS,
I was hoping to address this so I don't have to keep working around
it.

>
> You could try adding an extra call to dss_runtime_get(). Say, at the
> beginning of dss_probe_hardware(), do another dss_runtime_get(). That
> should force DSS to be always on (until reboot). runtime PM suspend
> related bugs should disappear.

I'll send out a second e-mail with some of your suggestions, but I
don't want to litter this e-mail with too many logs.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-26 14:12           ` Adam Ford
@ 2019-09-27  6:21             ` Tomi Valkeinen
  2019-09-27 12:13               ` Adam Ford
  2019-09-27  7:55             ` Tomi Valkeinen
  1 sibling, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-27  6:21 UTC (permalink / raw)
  To: Adam Ford
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On 26/09/2019 17:12, Adam Ford wrote:

>> And what is the hdmi5_configure there? I don't see anything in the
>> driver that would print hdmi5_configure. And, of course, there's no
>> hdmi5 on that platform. Hmm, ok... it's from component.c, using "%ps".
>> Somehow that goes wrong. Which is a bit alarming, but perhaps a totally
>> different issue.
> 
> I'll try to take a look later.  For Logic PD distributions, we create
> a custom defconfig with all those drivers removed, so I'm not worked
> up about it, but it would be nice to not call drivers that don't
> exist.

So you have CONFIG_OMAP5_DSS_HDMI=n? Then it's even more disturbing, as 
there's no way the string "hdmi5_configure" can be in the kernel image...

Maybe it's nothing, but... It's just so odd.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-26 14:12           ` Adam Ford
  2019-09-27  6:21             ` Tomi Valkeinen
@ 2019-09-27  7:55             ` Tomi Valkeinen
  2019-09-27 12:33               ` Adam Ford
  1 sibling, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-27  7:55 UTC (permalink / raw)
  To: Adam Ford, Tony Lindgren, Tero Kristo, Linux-OMAP
  Cc: Linux-OMAP, Adam Ford, Benoît Cousson, dri-devel,
	devicetree, Linux Kernel Mailing List

(dropping folks who're probably not interested...)

On 26/09/2019 17:12, Adam Ford wrote:
> On Thu, Sep 26, 2019 at 1:55 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>>
>> On 25/09/2019 23:51, Adam Ford wrote:
>>
>>>> Has anyone debugged why the hang is happening?
>>> I started to debug this, but I got distracted when I noticed the LCD
>>> did't work at all on modern kernels.  I have that fixed now, so I can
>>> go back to investigating this.

I dont' have the same board, but I was testing with omap3 beagle xm. I 
can reproduce rather similar issue, although I don't get a hang but 
instead sync lost and underflow flood (which makes the device unusable).

It looks like a bug in omap clock handling.

DSS uses dss1_alwon_fck_3430es2 as fclk. dss1_alwon_fck_3430es2 comes 
from dpll4_ck, and there's a divider after the PLL, dpll4_m4_ck.

When the DSS driver sets dss1_alwon_fck_3430es2 rate to 27000000 or 
27870967, which can be created with m4 dividers 32 and 31, it looks like 
the divider goes to bypass, or to a very small value. DSS gets a very 
high clock rate and breaks down.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27  6:21             ` Tomi Valkeinen
@ 2019-09-27 12:13               ` Adam Ford
  2019-09-27 13:45                 ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-27 12:13 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On Fri, Sep 27, 2019 at 1:22 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> On 26/09/2019 17:12, Adam Ford wrote:
>
> >> And what is the hdmi5_configure there? I don't see anything in the
> >> driver that would print hdmi5_configure. And, of course, there's no
> >> hdmi5 on that platform. Hmm, ok... it's from component.c, using "%ps".
> >> Somehow that goes wrong. Which is a bit alarming, but perhaps a totally
> >> different issue.
> >
> > I'll try to take a look later.  For Logic PD distributions, we create
> > a custom defconfig with all those drivers removed, so I'm not worked
> > up about it, but it would be nice to not call drivers that don't
> > exist.
>
> So you have CONFIG_OMAP5_DSS_HDMI=n? Then it's even more disturbing, as
> there's no way the string "hdmi5_configure" can be in the kernel image...

For the logs and problems I am showing in this thread, I am using a
stock omap2plus_defconfig which has it enabled.  I was only trying to
state that I am not worried about the omap5 hdmi stuff, because when I
do a custom distribution for Logic PD, I remove those config options
to make the issue go away.
>
> Maybe it's nothing, but... It's just so odd.

I don't think we need to worry about it now.  Ideally, it would be
nice to have the drivers recognize they are not needed and or setup
the Kconfig options to make these drivers dependent on the platforms
that support it so unselecting OMAP5 could make the omap5 options
disappear.

Sorry if I accidentally threw in a distraction or confusion.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27  7:55             ` Tomi Valkeinen
@ 2019-09-27 12:33               ` Adam Ford
  2019-09-27 13:47                 ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-27 12:33 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Tony Lindgren, Tero Kristo, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Fri, Sep 27, 2019 at 2:55 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> (dropping folks who're probably not interested...)
>
> On 26/09/2019 17:12, Adam Ford wrote:
> > On Thu, Sep 26, 2019 at 1:55 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> >>
> >> On 25/09/2019 23:51, Adam Ford wrote:
> >>
> >>>> Has anyone debugged why the hang is happening?
> >>> I started to debug this, but I got distracted when I noticed the LCD
> >>> did't work at all on modern kernels.  I have that fixed now, so I can
> >>> go back to investigating this.
>
> I dont' have the same board, but I was testing with omap3 beagle xm. I
> can reproduce rather similar issue, although I don't get a hang but
> instead sync lost and underflow flood (which makes the device unusable).
>
> It looks like a bug in omap clock handling.
>
> DSS uses dss1_alwon_fck_3430es2 as fclk. dss1_alwon_fck_3430es2 comes
> from dpll4_ck, and there's a divider after the PLL, dpll4_m4_ck.
>
> When the DSS driver sets dss1_alwon_fck_3430es2 rate to 27000000 or
> 27870967, which can be created with m4 dividers 32 and 31, it looks like
> the divider goes to bypass, or to a very small value. DSS gets a very
> high clock rate and breaks down.

Is there anything I can do to help troubleshoot this?  I could insert
a hack that checks if we're omap3 and if so make the divider equal to
4, but that seems like just a hack.
I can run more tests or insert code somewhere if you want.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27 12:13               ` Adam Ford
@ 2019-09-27 13:45                 ` Tomi Valkeinen
  0 siblings, 0 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-27 13:45 UTC (permalink / raw)
  To: Adam Ford
  Cc: Linux-OMAP, Adam Ford, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Tony Lindgren, dri-devel,
	devicetree, Linux Kernel Mailing List

On 27/09/2019 15:13, Adam Ford wrote:
> On Fri, Sep 27, 2019 at 1:22 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>>
>> On 26/09/2019 17:12, Adam Ford wrote:
>>
>>>> And what is the hdmi5_configure there? I don't see anything in the
>>>> driver that would print hdmi5_configure. And, of course, there's no
>>>> hdmi5 on that platform. Hmm, ok... it's from component.c, using "%ps".
>>>> Somehow that goes wrong. Which is a bit alarming, but perhaps a totally
>>>> different issue.
>>>
>>> I'll try to take a look later.  For Logic PD distributions, we create
>>> a custom defconfig with all those drivers removed, so I'm not worked
>>> up about it, but it would be nice to not call drivers that don't
>>> exist.
>>
>> So you have CONFIG_OMAP5_DSS_HDMI=n? Then it's even more disturbing, as
>> there's no way the string "hdmi5_configure" can be in the kernel image...
> 
> For the logs and problems I am showing in this thread, I am using a
> stock omap2plus_defconfig which has it enabled.  I was only trying to
> state that I am not worried about the omap5 hdmi stuff, because when I
> do a custom distribution for Logic PD, I remove those config options
> to make the issue go away.
>>
>> Maybe it's nothing, but... It's just so odd.
> 
> I don't think we need to worry about it now.  Ideally, it would be
> nice to have the drivers recognize they are not needed and or setup
> the Kconfig options to make these drivers dependent on the platforms
> that support it so unselecting OMAP5 could make the omap5 options
> disappear.

My point is that something is bugging there. It should not print 
hdmi5_configure, regardless of setup or platform. If I'm not mistaken, 
it should print "dispc_component_ops". But somehow it gets a wrong 
symbol string.

But yes, I'm 99.9% sure it's not related, so let's ignore it here =).

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27 12:33               ` Adam Ford
@ 2019-09-27 13:47                 ` Tomi Valkeinen
  2019-09-27 15:37                   ` Tero Kristo
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-27 13:47 UTC (permalink / raw)
  To: Adam Ford
  Cc: Tony Lindgren, Tero Kristo, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 27/09/2019 15:33, Adam Ford wrote:

>> It looks like a bug in omap clock handling.
>>
>> DSS uses dss1_alwon_fck_3430es2 as fclk. dss1_alwon_fck_3430es2 comes
>> from dpll4_ck, and there's a divider after the PLL, dpll4_m4_ck.
>>
>> When the DSS driver sets dss1_alwon_fck_3430es2 rate to 27000000 or
>> 27870967, which can be created with m4 dividers 32 and 31, it looks like
>> the divider goes to bypass, or to a very small value. DSS gets a very
>> high clock rate and breaks down.
> 
> Is there anything I can do to help troubleshoot this?  I could insert
> a hack that checks if we're omap3 and if so make the divider equal to
> 4, but that seems like just a hack.
> I can run more tests or insert code somewhere if you want.

I think it's up to someone who's knowledgeable in omap clock framework. 
I'm kind of hoping that Tero or Tony would be willing to debug =). I can 
try to find time to debug the omap clk framework, but I'll be going on 
blindly there.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27 13:47                 ` Tomi Valkeinen
@ 2019-09-27 15:37                   ` Tero Kristo
  2019-09-27 15:47                     ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Tero Kristo @ 2019-09-27 15:37 UTC (permalink / raw)
  To: Tomi Valkeinen, Adam Ford
  Cc: Tony Lindgren, Linux-OMAP, Adam Ford, Benoît Cousson,
	dri-devel, devicetree, Linux Kernel Mailing List

On 27/09/2019 16:47, Tomi Valkeinen wrote:
> On 27/09/2019 15:33, Adam Ford wrote:
> 
>>> It looks like a bug in omap clock handling.
>>>
>>> DSS uses dss1_alwon_fck_3430es2 as fclk. dss1_alwon_fck_3430es2 comes
>>> from dpll4_ck, and there's a divider after the PLL, dpll4_m4_ck.
>>>
>>> When the DSS driver sets dss1_alwon_fck_3430es2 rate to 27000000 or
>>> 27870967, which can be created with m4 dividers 32 and 31, it looks like
>>> the divider goes to bypass, or to a very small value. DSS gets a very
>>> high clock rate and breaks down.
>>
>> Is there anything I can do to help troubleshoot this?  I could insert
>> a hack that checks if we're omap3 and if so make the divider equal to
>> 4, but that seems like just a hack.
>> I can run more tests or insert code somewhere if you want.
> 
> I think it's up to someone who's knowledgeable in omap clock framework. 
> I'm kind of hoping that Tero or Tony would be willing to debug =). I can 
> try to find time to debug the omap clk framework, but I'll be going on 
> blindly there.

If you can provide details about what clock framework / driver does 
wrong (sample clk_set_xyz call sequence, expected results via 
clk_get_xyz, and what fails), I can take a look at it. Just reporting 
arbitrary display driver issues I won't be able to debug at all (I don't 
have access to any of the displays, nor do I want to waste time 
debugging them without absolutely no knowledge whatsoever.)

-Tero
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27 15:37                   ` Tero Kristo
@ 2019-09-27 15:47                     ` Tomi Valkeinen
  2019-09-30  6:45                       ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-27 15:47 UTC (permalink / raw)
  To: Tero Kristo, Adam Ford
  Cc: Tony Lindgren, Linux-OMAP, Adam Ford, Benoît Cousson,
	dri-devel, devicetree, Linux Kernel Mailing List

On 27/09/2019 18:37, Tero Kristo wrote:

> If you can provide details about what clock framework / driver does 
> wrong (sample clk_set_xyz call sequence, expected results via 
> clk_get_xyz, and what fails), I can take a look at it. Just reporting 
> arbitrary display driver issues I won't be able to debug at all (I don't 
> have access to any of the displays, nor do I want to waste time 
> debugging them without absolutely no knowledge whatsoever.)

I used your hack patches to allow changing rates via debugfs. And set 
dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was that 
DSS gets some very high clock from dss1_alwon_fck_3430es2, as the frame 
rate jumps to many hundreds fps.

So, these numbers are not real, but to give the idea what I saw. Running 
first with 50 MHz, I can see, say, 40 fps. Then I set the clock to 30 
MHz, and fps dropped to, say, 30fps, as expected with lower clock. Then 
I set the clock to 27MHz (or the other one), expecting a bit lower fps, 
but instead I saw hundreds of fps.

I don't know if there's any other way to observe the wrong clock rate 
but have the dss enabled and running kmstest or similar. I can help you 
set that up next week, should be trivial. You don't need a display for that.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-27 15:47                     ` Tomi Valkeinen
@ 2019-09-30  6:45                       ` Tomi Valkeinen
  2019-09-30  8:53                         ` Tero Kristo
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-30  6:45 UTC (permalink / raw)
  To: Tero Kristo, Adam Ford
  Cc: Tony Lindgren, Linux-OMAP, Adam Ford, Benoît Cousson,
	dri-devel, devicetree, Linux Kernel Mailing List

[-- Attachment #1: Type: text/plain, Size: 2626 bytes --]

Hi,

On 27/09/2019 18:47, Tomi Valkeinen wrote:
> On 27/09/2019 18:37, Tero Kristo wrote:
> 
>> If you can provide details about what clock framework / driver does 
>> wrong (sample clk_set_xyz call sequence, expected results via 
>> clk_get_xyz, and what fails), I can take a look at it. Just reporting 
>> arbitrary display driver issues I won't be able to debug at all (I 
>> don't have access to any of the displays, nor do I want to waste time 
>> debugging them without absolutely no knowledge whatsoever.)
> 
> I used your hack patches to allow changing rates via debugfs. And set 
> dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was that 
> DSS gets some very high clock from dss1_alwon_fck_3430es2, as the frame 
> rate jumps to many hundreds fps.
> 
> So, these numbers are not real, but to give the idea what I saw. Running 
> first with 50 MHz, I can see, say, 40 fps. Then I set the clock to 30 
> MHz, and fps dropped to, say, 30fps, as expected with lower clock. Then 
> I set the clock to 27MHz (or the other one), expecting a bit lower fps, 
> but instead I saw hundreds of fps.
> 
> I don't know if there's any other way to observe the wrong clock rate 
> but have the dss enabled and running kmstest or similar. I can help you 
> set that up next week, should be trivial. You don't need a display for 
> that.

Here's how to reproduce. I have the attached patches. Three of them are 
the clk-debug ones, and one of mine to make it easy to test without a 
display, and without underflow flood halting the device. There are on 
top of v5.3. Kernel config also attached.

kmstest is from kms++ project (https://github.com/tomba/kmsxx). It 
should be straightforward to compile, but kmstest binary is also 
included in TI's rootfs.

I boot up, and run this in one terminal:

# kmstest -c dvi -r 640x480 --flip

It shows ~60 fps, as expected:

Connector 0: fps 60.499982, slowest 16.72 ms

In another terminal:

# cd /debug/clk/dss1_alwon_fck_3430es2/
# cat clk_rate
50823530
# echo 30000000 > clk_rate

Now with lower clock, the fps dropped as expected:

Connector 0: fps 35.468961, slowest 28.41 ms

Then:

# echo 27000000 > clk_rate

And fps goes through the roof and underflows start to come:

Connector 0: fps 514.734527, slowest 2.11 ms

I don't know what exactly goes on here, but 514 fps matches quite 
exactly the PLL/2 rate:

864000000/2/2/((640+16+96+48)*(480+10+2+33)) = 514.2857142857143

(The second /2 there is DSS's internal pclk divider)

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[-- Attachment #2: 0001-clk-debug-add-support-for-setting-clk_rate-from-debu.patch --]
[-- Type: text/x-patch, Size: 1762 bytes --]

From 4289f2a98b2fc5a0fd98f9809281442aac5e07a9 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Wed, 20 Jun 2018 14:48:26 +0300
Subject: [PATCH 1/4] clk: debug: add support for setting clk_rate from debugfs

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/clk.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 1c46babeb093..3429680691bd 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3087,6 +3087,26 @@ static int clk_duty_cycle_show(struct seq_file *s, void *data)
 }
 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
 
+static int clk_dbg_rate_get(void *data, u64 *val)
+{
+	struct clk_core *core = data;
+
+	*val = core->rate;
+
+	return 0;
+}
+
+static int clk_dbg_rate_set(void *data, u64 val)
+{
+	struct clk_core *core = data;
+
+	clk_core_set_rate_nolock(core, val);
+
+	return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_rate, clk_dbg_rate_get, clk_dbg_rate_set, "%llu\n");
+
 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
 {
 	struct dentry *root;
@@ -3097,7 +3117,7 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
 	root = debugfs_create_dir(core->name, pdentry);
 	core->dentry = root;
 
-	debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
+	debugfs_create_file("clk_rate", 0666, root, core, &clk_dbg_option_rate);
 	debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
 	debugfs_create_u32("clk_phase", 0444, root, &core->phase);
 	debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


[-- Attachment #3: 0002-sci-clk-debug-add-reparenting-support-via-debugfs.patch --]
[-- Type: text/x-patch, Size: 2016 bytes --]

From 97c030ef053c7f7aa09cfed3e273f6b5600c471b Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Fri, 21 Sep 2018 10:53:20 +0300
Subject: [PATCH 2/4] sci-clk: debug: add reparenting support via debugfs

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/keystone/sci-clk.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index 7edf8c8432b6..7df582bb4ceb 100644
--- a/drivers/clk/keystone/sci-clk.c
+++ b/drivers/clk/keystone/sci-clk.c
@@ -24,6 +24,7 @@
 #include <linux/soc/ti/ti_sci_protocol.h>
 #include <linux/bsearch.h>
 #include <linux/list_sort.h>
+#include <linux/debugfs.h>
 
 #define SCI_CLK_SSC_ENABLE		BIT(0)
 #define SCI_CLK_ALLOW_FREQ_CHANGE	BIT(1)
@@ -254,6 +255,36 @@ static int sci_clk_set_parent(struct clk_hw *hw, u8 index)
 					      index + 1 + clk->clk_id);
 }
 
+static int dbg_pid_get(void *data, u64 *val)
+{
+	struct clk_hw *hw = data;
+
+	*val = sci_clk_get_parent(hw);
+
+	return 0;
+}
+
+static int dbg_pid_set(void *data, u64 val)
+{
+	struct clk_hw *hw = data;
+	struct clk_hw *parent = clk_hw_get_parent_by_index(hw, val);
+
+	if (!parent)
+		return -EINVAL;
+
+	clk_hw_reparent(hw, parent);
+
+	return sci_clk_set_parent(hw, val);
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(sci_parent_id_fops, dbg_pid_get, dbg_pid_set, "%llu\n");
+
+static void sci_clk_debug_init(struct clk_hw *hw, struct dentry *dentry)
+{
+	debugfs_create_file("parent_id", S_IRUGO | S_IWUSR, dentry,
+			    hw, &sci_parent_id_fops);
+}
+
 static const struct clk_ops sci_clk_ops = {
 	.prepare = sci_clk_prepare,
 	.unprepare = sci_clk_unprepare,
@@ -263,6 +294,7 @@ static const struct clk_ops sci_clk_ops = {
 	.set_rate = sci_clk_set_rate,
 	.get_parent = sci_clk_get_parent,
 	.set_parent = sci_clk_set_parent,
+	.debug_init = sci_clk_debug_init,
 };
 
 /**
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


[-- Attachment #4: 0003-clk-debug-add-support-for-enabling-preparing-clocks-.patch --]
[-- Type: text/x-patch, Size: 3177 bytes --]

From 0560509bb2dc01fe2e8b173336ffb06830e49f20 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Mon, 1 Oct 2018 15:53:47 +0300
Subject: [PATCH 3/4] clk: debug: add support for enabling / preparing clocks
 manually

Add support for enabling / disabling clocks manually from debugfs.
Setting 1 to prepare/enable counts calls corresponding enable routine
once, incrementing the usecounts by 1. Setting the same files as -1
does the unprepare / disable call similarly. Reading both files
returns the current usecount, as is done without this patch.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/clk.c | 54 +++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 52 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 3429680691bd..b40b3cae0c6b 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3107,6 +3107,56 @@ static int clk_dbg_rate_set(void *data, u64 val)
 
 DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_rate, clk_dbg_rate_get, clk_dbg_rate_set, "%llu\n");
 
+static int clk_dbg_prepare_get(void *data, u64 *val)
+{
+	struct clk_core *core = data;
+
+	*val = core->prepare_count;
+
+	return 0;
+}
+
+static int clk_dbg_prepare_set(void *data, u64 val)
+{
+	struct clk_core *core = data;
+
+	if (val == 1) {
+		return clk_core_prepare(core);
+	} else if (val == -1) {
+		clk_core_unprepare(core);
+		return 0;
+	} else {
+		pr_err("1: prepare, -1: unprepare\n");
+		return -EINVAL;
+	}
+}
+DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_prepare, clk_dbg_prepare_get, clk_dbg_prepare_set, "%llu\n");
+
+static int clk_dbg_enable_get(void *data, u64 *val)
+{
+	struct clk_core *core = data;
+
+	*val = core->enable_count;
+
+	return 0;
+}
+
+static int clk_dbg_enable_set(void *data, u64 val)
+{
+	struct clk_core *core = data;
+
+	if (val == 1) {
+		return clk_core_enable(core);
+	} else if (val == -1) {
+		clk_core_disable(core);
+		return 0;
+	} else {
+		pr_err("1: enable, -1: disable\n");
+		return -EINVAL;
+	}
+}
+DEFINE_SIMPLE_ATTRIBUTE(clk_dbg_option_enable, clk_dbg_enable_get, clk_dbg_enable_set, "%llu\n");
+
 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
 {
 	struct dentry *root;
@@ -3121,8 +3171,8 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
 	debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
 	debugfs_create_u32("clk_phase", 0444, root, &core->phase);
 	debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
-	debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
-	debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
+	debugfs_create_file("clk_prepare_count", 0666, root, core, &clk_dbg_option_prepare);
+	debugfs_create_file("clk_enable_count", 0666, root, core, &clk_dbg_option_enable);
 	debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
 	debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
 	debugfs_create_file("clk_duty_cycle", 0444, root, core,
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


[-- Attachment #5: 0004-dss1_alwon_fck_3430es2-test-hacks.patch --]
[-- Type: text/x-patch, Size: 1970 bytes --]

From 34c0611b55551dfbe2aea119f25ad8fd19c6d091 Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Mon, 30 Sep 2019 09:17:54 +0300
Subject: [PATCH 4/4] dss1_alwon_fck_3430es2 test hacks

---
 drivers/gpu/drm/bridge/ti-tfp410.c | 4 ++++
 drivers/gpu/drm/omapdrm/omap_irq.c | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c
index dbf35c7bc85e..f048823e8bc9 100644
--- a/drivers/gpu/drm/bridge/ti-tfp410.c
+++ b/drivers/gpu/drm/bridge/ti-tfp410.c
@@ -55,6 +55,8 @@ static int tfp410_get_modes(struct drm_connector *connector)
 	struct edid *edid;
 	int ret;
 
+	goto fallback;
+
 	if (!dvi->ddc)
 		goto fallback;
 
@@ -91,6 +93,8 @@ tfp410_connector_detect(struct drm_connector *connector, bool force)
 {
 	struct tfp410 *dvi = drm_connector_to_tfp410(connector);
 
+	return connector_status_connected;
+
 	if (dvi->hpd) {
 		if (gpiod_get_value_cansleep(dvi->hpd))
 			return connector_status_connected;
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
index 726a013e7988..eb388ec4e250 100644
--- a/drivers/gpu/drm/omapdrm/omap_irq.c
+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
@@ -272,7 +272,7 @@ int omap_drm_irq_install(struct drm_device *dev)
 	INIT_LIST_HEAD(&priv->wait_list);
 
 	priv->irq_mask = DISPC_IRQ_OCP_ERR;
-
+/*
 	max_planes = min(ARRAY_SIZE(priv->planes),
 			 ARRAY_SIZE(omap_underflow_irqs));
 	for (i = 0; i < max_planes; ++i) {
@@ -282,7 +282,7 @@ int omap_drm_irq_install(struct drm_device *dev)
 
 	for (i = 0; i < num_mgrs; ++i)
 		priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, i);
-
+*/
 	priv->dispc_ops->runtime_get(priv->dispc);
 	priv->dispc_ops->clear_irqstatus(priv->dispc, 0xffffffff);
 	priv->dispc_ops->runtime_put(priv->dispc);
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


[-- Attachment #6: tomi-config --]
[-- Type: text/plain, Size: 128074 bytes --]

#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.3.0 Kernel Configuration
#

#
# Compiler: arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.2-2019.01 (arm-rel-8.28)) 8.2.1 20180802
#
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=80201
CONFIG_CLANG_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set
# CONFIG_HEADER_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_BUILD_SALT=""
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
# CONFIG_KERNEL_GZIP is not set
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
# CONFIG_GENERIC_IRQ_DEBUGFS is not set
# end of IRQ subsystem

CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y

#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
# end of Timers subsystem

# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_PREEMPTION=y

#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_PSI is not set
# end of CPU/Task time and stats accounting

CONFIG_CPU_ISOLATION=y

#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
CONFIG_TREE_SRCU=y
CONFIG_TASKS_RCU=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RCU_NEED_SEGCBLIST=y
# end of RCU Subsystem

CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_IKHEADERS is not set
CONFIG_LOG_BUF_SHIFT=16
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y

#
# Scheduler features
#
# end of Scheduler features

CONFIG_CGROUPS=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_SWAP_ENABLED=y
CONFIG_MEMCG_KMEM=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_WRITEBACK=y
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
# CONFIG_CGROUP_PIDS is not set
# CONFIG_CGROUP_RDMA is not set
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_DEBUG is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
# CONFIG_USER_NS is not set
CONFIG_PID_NS=y
CONFIG_NET_NS=y
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_HAVE_UID16=y
CONFIG_BPF=y
CONFIG_EXPERT=y
CONFIG_UID16=y
CONFIG_MULTIUSER=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_IO_URING=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
# CONFIG_BPF_SYSCALL is not set
# CONFIG_USERFAULTFD is not set
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_RSEQ=y
# CONFIG_DEBUG_RSEQ is not set
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
# CONFIG_PC104 is not set

#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
# end of Kernel Performance Events And Counters

CONFIG_VM_EVENT_COUNTERS=y
CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_SLAB_MERGE_DEFAULT=y
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
CONFIG_PROFILING=y
CONFIG_TRACEPOINTS=y
# end of General setup

CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_ARCH_HAS_BANDGAP=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_GENERIC_BUG=y
CONFIG_PGTABLE_LEVELS=2

#
# System Type
#
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_BITS_MAX=16
CONFIG_ARCH_MULTIPLATFORM=y
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_LPC32XX is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C24XX is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP1 is not set

#
# Multiple platform selection
#

#
# CPU Core family selection
#
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_MULTI_V6_V7=y
# end of Multiple platform selection

# CONFIG_ARCH_VIRT is not set
# CONFIG_ARCH_ACTIONS is not set
# CONFIG_ARCH_ALPINE is not set
# CONFIG_ARCH_ARTPEC is not set
# CONFIG_ARCH_ASPEED is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_BCM is not set
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_CNS3XXX is not set
# CONFIG_ARCH_DIGICOLOR is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_HIGHBANK is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_KEYSTONE is not set
# CONFIG_ARCH_MEDIATEK is not set
# CONFIG_ARCH_MESON is not set
# CONFIG_ARCH_MILBEAUT is not set
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_NPCM is not set
CONFIG_ARCH_OMAP=y

#
# TI OMAP Common Features
#

#
# OMAP Feature Selections
#
CONFIG_POWER_AVS_OMAP=y
CONFIG_POWER_AVS_OMAP_CLASS3=y
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_32K_TIMER=y
# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set
# end of TI OMAP Common Features

CONFIG_MACH_OMAP_GENERIC=y

#
# TI OMAP/AM/DM/DRA Family
#
CONFIG_ARCH_OMAP2=y
CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y
CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP_INTERCONNECT_BARRIER=y

#
# TI OMAP2/3/4 Specific Features
#
CONFIG_ARCH_OMAP2PLUS_TYPICAL=y
CONFIG_SOC_HAS_OMAP2_SDRC=y
CONFIG_SOC_HAS_REALTIME_COUNTER=y

#
# OMAP Core Type
#
CONFIG_SOC_OMAP2420=y
CONFIG_SOC_OMAP2430=y
CONFIG_SOC_OMAP3430=y
CONFIG_SOC_TI81XX=y
CONFIG_OMAP_PACKAGE_CBB=y

#
# OMAP Legacy Platform Data Board Type
#
CONFIG_MACH_OMAP2_TUSB6010=y
CONFIG_MACH_OMAP3517EVM=y
CONFIG_MACH_OMAP3_PANDORA=y
CONFIG_MACH_NOKIA_N810=y
CONFIG_MACH_NOKIA_N810_WIMAX=y
CONFIG_MACH_NOKIA_N8X0=y
# CONFIG_OMAP3_SDRC_AC_TIMING is not set
# end of TI OMAP2/3/4 Specific Features

# CONFIG_OMAP5_ERRATA_801819 is not set
# end of TI OMAP/AM/DM/DRA Family

# CONFIG_ARCH_OXNAS is not set
# CONFIG_ARCH_PICOXCELL is not set
# CONFIG_ARCH_SIRF is not set
# CONFIG_ARCH_QCOM is not set
# CONFIG_ARCH_RDA is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SOCFPGA is not set
# CONFIG_PLAT_SPEAR is not set
# CONFIG_ARCH_STI is not set
# CONFIG_ARCH_STM32 is not set
# CONFIG_ARCH_SUNXI is not set
# CONFIG_ARCH_TANGO is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_U8500 is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_WM8750 is not set
# CONFIG_ARCH_WM8850 is not set
# CONFIG_ARCH_ZX is not set
# CONFIG_ARCH_ZYNQ is not set

#
# Processor Type
#
CONFIG_CPU_V6=y
CONFIG_CPU_V6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_32v6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV6=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_PABRT_V6=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_CACHE_V6=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_TLB_V6=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y

#
# Processor Features
#
CONFIG_ARM_THUMB=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_SWP_EMULATE=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_SPECTRE=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_KUSER_HELPERS=y
CONFIG_VDSO=y
CONFIG_DMA_CACHE_RWFO=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_CACHE_L2X0=y
# CONFIG_CACHE_L2X0_PMU is not set
CONFIG_PL310_ERRATA_588369=y
CONFIG_PL310_ERRATA_727915=y
# CONFIG_PL310_ERRATA_753970 is not set
# CONFIG_PL310_ERRATA_769419 is not set
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_DMA_MEM_BUFFERABLE=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_DEBUG_ALIGN_RODATA=y
# CONFIG_ARM_ERRATA_326103 is not set
CONFIG_ARM_ERRATA_411920=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_643719=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_ARM_ERRATA_754322=y
# CONFIG_ARM_ERRATA_754327 is not set
# CONFIG_ARM_ERRATA_364296 is not set
# CONFIG_ARM_ERRATA_764369 is not set
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_ERRATA_798181=y
# CONFIG_ARM_ERRATA_773022 is not set
# CONFIG_ARM_ERRATA_818325_852422 is not set
# CONFIG_ARM_ERRATA_821420 is not set
# CONFIG_ARM_ERRATA_825619 is not set
# CONFIG_ARM_ERRATA_857271 is not set
# CONFIG_ARM_ERRATA_852421 is not set
# CONFIG_ARM_ERRATA_852423 is not set
# CONFIG_ARM_ERRATA_857272 is not set
# end of System Type

#
# Bus support
#
# CONFIG_ARM_ERRATA_814220 is not set
# end of Bus support

#
# Kernel Features
#
CONFIG_HAVE_SMP=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_ARM_CPU_TOPOLOGY=y
# CONFIG_SCHED_MC is not set
# CONFIG_SCHED_SMT is not set
CONFIG_HAVE_ARM_SCU=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_HAVE_ARM_TWD=y
# CONFIG_MCPM is not set
# CONFIG_BIG_LITTLE is not set
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_3G_OPT is not set
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_NR_CPUS=2
CONFIG_HOTPLUG_CPU=y
# CONFIG_ARM_PSCI is not set
CONFIG_ARCH_NR_GPIO=512
CONFIG_HZ_FIXED=0
CONFIG_HZ_100=y
# CONFIG_HZ_200 is not set
# CONFIG_HZ_250 is not set
# CONFIG_HZ_300 is not set
# CONFIG_HZ_500 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=100
CONFIG_SCHED_HRTICK=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_CPU_SW_DOMAIN_PAN=y
CONFIG_HW_PERF_EVENTS=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARM_MODULE_PLTS=y
CONFIG_FORCE_MAX_ZONEORDER=12
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_SECCOMP=y
# CONFIG_PARAVIRT is not set
# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
# end of Kernel Features

#
# Boot options
#
CONFIG_USE_OF=y
CONFIG_ATAGS=y
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_CMDLINE_EXTEND is not set
# CONFIG_CMDLINE_FORCE is not set
CONFIG_KEXEC=y
CONFIG_ATAGS_PROC=y
# CONFIG_CRASH_DUMP is not set
CONFIG_AUTO_ZRELADDR=y
# CONFIG_EFI is not set
# end of Boot options

#
# CPU Power Management
#

#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_STAT is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set

#
# CPU frequency scaling drivers
#
# CONFIG_CPUFREQ_DT is not set
# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
CONFIG_ARM_TI_CPUFREQ=y
# CONFIG_QORIQ_CPUFREQ is not set
# end of CPU Frequency scaling

#
# CPU Idle
#
CONFIG_CPU_IDLE=y
# CONFIG_CPU_IDLE_GOV_LADDER is not set
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_CPU_IDLE_GOV_TEO is not set

#
# ARM CPU Idle Drivers
#
# CONFIG_ARM_CPUIDLE is not set
# end of ARM CPU Idle Drivers

CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y
# end of CPU Idle
# end of CPU Power Management

#
# Floating point emulation
#

#
# At least one emulation must be selected
#
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_NEON=y
CONFIG_KERNEL_MODE_NEON=y
# end of Floating point emulation

#
# Power management options
#
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_SUSPEND_SKIP_SYNC is not set
# CONFIG_HIBERNATION is not set
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
CONFIG_PM=y
CONFIG_PM_DEBUG=y
# CONFIG_PM_ADVANCED_DEBUG is not set
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_PM_SLEEP_DEBUG=y
# CONFIG_APM_EMULATION is not set
CONFIG_PM_CLK=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_CPU_PM=y
# CONFIG_ENERGY_MODEL is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
# end of Power management options

#
# Firmware Drivers
#
# CONFIG_FIRMWARE_MEMMAP is not set
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
CONFIG_HAVE_ARM_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set

#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers

CONFIG_ARM_CRYPTO=y
# CONFIG_CRYPTO_SHA1_ARM is not set
# CONFIG_CRYPTO_SHA1_ARM_NEON is not set
# CONFIG_CRYPTO_SHA1_ARM_CE is not set
# CONFIG_CRYPTO_SHA2_ARM_CE is not set
# CONFIG_CRYPTO_SHA256_ARM is not set
# CONFIG_CRYPTO_SHA512_ARM is not set
# CONFIG_CRYPTO_AES_ARM is not set
# CONFIG_CRYPTO_AES_ARM_BS is not set
# CONFIG_CRYPTO_AES_ARM_CE is not set
# CONFIG_CRYPTO_GHASH_ARM_CE is not set
# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set
# CONFIG_CRYPTO_CRC32_ARM_CE is not set
# CONFIG_CRYPTO_CHACHA20_NEON is not set
# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
# CONFIG_VIRTUALIZATION is not set

#
# General architecture-dependent options
#
CONFIG_CRASH_CORE=y
CONFIG_KEXEC_CORE=y
CONFIG_OPROFILE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_KPROBES=y
# CONFIG_JUMP_LABEL is not set
CONFIG_OPTPROBES=y
CONFIG_UPROBES=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_KRETPROBES=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_KEEPINITRD=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_SECCOMP_FILTER=y
CONFIG_HAVE_STACKPROTECTOR=y
CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
CONFIG_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR_STRONG=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS=8
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OLD_SIGACTION=y
CONFIG_64BIT_TIME=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_REFCOUNT_FULL=y
# CONFIG_LOCK_EVENT_COUNTS is not set

#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# end of GCOV-based kernel profiling

CONFIG_PLUGIN_HOSTCC=""
CONFIG_HAVE_GCC_PLUGINS=y
# end of General architecture-dependent options

CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_DEV_ZONED is not set
# CONFIG_BLK_DEV_THROTTLING is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
# CONFIG_BLK_WBT is not set
# CONFIG_BLK_CGROUP_IOLATENCY is not set
CONFIG_BLK_DEBUG_FS=y
# CONFIG_BLK_SED_OPAL is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_AIX_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
# end of Partition Types

CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y

#
# IO Schedulers
#
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
# CONFIG_IOSCHED_BFQ is not set
# end of IO Schedulers

CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_FREEZER=y

#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_ELF_FDPIC is not set
CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
CONFIG_ARCH_HAS_BINFMT_FLAT=y
# CONFIG_BINFMT_FLAT is not set
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BINFMT_MISC=y
CONFIG_COREDUMP=y
# end of Executable file formats

#
# Memory Management options
#
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
CONFIG_CONTIG_ALLOC=y
CONFIG_BOUNCE=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_FRAME_VECTOR=y
# CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_BENCHMARK is not set
# end of Memory Management options

CONFIG_NET=y
CONFIG_NET_INGRESS=y
CONFIG_SKB_EXTENSIONS=y

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
CONFIG_UNIX_SCM=y
# CONFIG_UNIX_DIAG is not set
# CONFIG_TLS is not set
CONFIG_XFRM=y
CONFIG_XFRM_ALGO=y
CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y
# CONFIG_XFRM_STATISTICS is not set
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_IPVTI is not set
# CONFIG_NET_FOU is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_UDP_DIAG is not set
# CONFIG_INET_RAW_DIAG is not set
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NET_PTP_CLASSIFY=y
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
CONFIG_NETFILTER=y
CONFIG_NETFILTER_ADVANCED=y

#
# Core Netfilter Configuration
#
CONFIG_NETFILTER_INGRESS=y
# CONFIG_NETFILTER_NETLINK_ACCT is not set
# CONFIG_NETFILTER_NETLINK_QUEUE is not set
# CONFIG_NETFILTER_NETLINK_LOG is not set
# CONFIG_NETFILTER_NETLINK_OSF is not set
# CONFIG_NF_CONNTRACK is not set
# CONFIG_NF_LOG_NETDEV is not set
# CONFIG_NF_TABLES is not set
# CONFIG_NETFILTER_XTABLES is not set
# end of Core Netfilter Configuration

# CONFIG_IP_SET is not set
# CONFIG_IP_VS is not set

#
# IP: Netfilter Configuration
#
# CONFIG_NF_SOCKET_IPV4 is not set
# CONFIG_NF_TPROXY_IPV4 is not set
# CONFIG_NF_DUP_IPV4 is not set
# CONFIG_NF_LOG_ARP is not set
# CONFIG_NF_LOG_IPV4 is not set
# CONFIG_NF_REJECT_IPV4 is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# end of IP: Netfilter Configuration

# CONFIG_BPFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_NET_NSH is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
# CONFIG_NET_NCSI is not set
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_XPS=y
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
# CONFIG_BPF_JIT is not set
CONFIG_NET_FLOW_LIMIT=y

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NET_DROP_MONITOR is not set
# end of Network testing
# end of Networking options

# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_PSAMPLE is not set
# CONFIG_NET_IFE is not set
# CONFIG_LWTUNNEL is not set
CONFIG_GRO_CELLS=y
CONFIG_PAGE_POOL=y
# CONFIG_FAILOVER is not set
CONFIG_HAVE_EBPF_JIT=y

#
# Device Drivers
#
CONFIG_HAVE_PCI=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_QUIRKS=y
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_HOTPLUG_PCI is not set

#
# PCI controller drivers
#

#
# Cadence PCIe controllers support
#
# CONFIG_PCIE_CADENCE_HOST is not set
# CONFIG_PCIE_CADENCE_EP is not set
# end of Cadence PCIe controllers support

# CONFIG_PCI_FTPCI100 is not set
# CONFIG_PCI_HOST_GENERIC is not set
# CONFIG_PCIE_XILINX is not set
# CONFIG_PCI_V3_SEMI is not set
# CONFIG_PCIE_ALTERA is not set

#
# DesignWare PCI Core Support
#
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_DW_EP=y
CONFIG_PCI_DRA7XX=y
CONFIG_PCI_DRA7XX_HOST=y
CONFIG_PCI_DRA7XX_EP=y
# CONFIG_PCIE_DW_PLAT_HOST is not set
# CONFIG_PCIE_DW_PLAT_EP is not set
# CONFIG_PCI_LAYERSCAPE is not set
# CONFIG_PCI_MESON is not set
# end of DesignWare PCI Core Support
# end of PCI controller drivers

#
# PCI Endpoint
#
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
# CONFIG_PCI_EPF_TEST is not set
# end of PCI Endpoint

#
# PCI switch controller drivers
#
# CONFIG_PCI_SW_SWITCHTEC is not set
# end of PCI switch controller drivers

# CONFIG_PCCARD is not set
# CONFIG_RAPIDIO is not set

#
# Generic Driver Options
#
# CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y

#
# Firmware loader
#
CONFIG_FW_LOADER=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
# end of Firmware loader

CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_SOC_BUS=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_DMA_FENCE_TRACE is not set
CONFIG_GENERIC_ARCH_TOPOLOGY=y
# end of Generic Driver Options

#
# Bus devices
#
# CONFIG_BRCMSTB_GISB_ARB is not set
CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=y
# CONFIG_SIMPLE_PM_BUS is not set
CONFIG_TI_SYSC=y
# CONFIG_VEXPRESS_CONFIG is not set
# end of Bus devices

# CONFIG_CONNECTOR is not set
# CONFIG_GNSS is not set
CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set

#
# Partition parsers
#
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# end of Partition parsers

#
# User Modules And Translation Layers
#
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_SM_FTL is not set
CONFIG_MTD_OOPS=y
# CONFIG_MTD_SWAP is not set
# CONFIG_MTD_PARTITIONED_MASTER is not set

#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# end of RAM/ROM/Flash chip drivers

#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_PHYSMAP_VERSATILE is not set
# CONFIG_MTD_PHYSMAP_GEMINI is not set
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
# end of Mapping drivers for chip access

#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_MCHP23K256 is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set

#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOCG3 is not set
# end of Self-contained MTD device drivers

CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_ONENAND=y
CONFIG_MTD_ONENAND_VERIFY_WRITE=y
# CONFIG_MTD_ONENAND_GENERIC is not set
CONFIG_MTD_ONENAND_OMAP2=y
# CONFIG_MTD_ONENAND_OTP is not set
# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_ECC_SW_BCH=y

#
# Raw/parallel NAND flash controllers
#
# CONFIG_MTD_NAND_DENALI_PCI is not set
# CONFIG_MTD_NAND_DENALI_DT is not set
CONFIG_MTD_NAND_OMAP2=y
CONFIG_MTD_NAND_OMAP_BCH=y
CONFIG_MTD_NAND_OMAP_BCH_BUILD=y
# CONFIG_MTD_NAND_CAFE is not set
# CONFIG_MTD_NAND_BRCMNAND is not set
# CONFIG_MTD_NAND_GPIO is not set
# CONFIG_MTD_NAND_PLATFORM is not set

#
# Misc
#
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_RICOH is not set
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_SPI_NAND is not set

#
# LPDDR & LPDDR2 PCM memory drivers
#
# CONFIG_MTD_LPDDR is not set
# CONFIG_MTD_LPDDR2_NVM is not set
# end of LPDDR & LPDDR2 PCM memory drivers

# CONFIG_MTD_SPI_NOR is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MTD_UBI_BEB_LIMIT=20
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
# CONFIG_MTD_UBI_BLOCK is not set
# CONFIG_MTD_HYPERBUS is not set
CONFIG_DTC=y
CONFIG_OF=y
# CONFIG_OF_UNITTEST is not set
CONFIG_OF_FLATTREE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_KOBJ=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_IRQ=y
CONFIG_OF_NET=y
CONFIG_OF_MDIO=y
CONFIG_OF_RESERVED_MEM=y
# CONFIG_OF_OVERLAY is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=16384
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_RSXX is not set

#
# NVME Support
#
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_NVME_FC is not set
# CONFIG_NVME_TARGET is not set
# end of NVME Support

#
# Misc devices
#
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_LATTICE_ECP3_CONFIG is not set
CONFIG_SRAM=y
CONFIG_SRAM_EXEC=y
# CONFIG_PCI_ENDPOINT_TEST is not set
# CONFIG_XILINX_SDFEC is not set
# CONFIG_PVPANIC is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_AT25 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
CONFIG_EEPROM_93CX6=y
# CONFIG_EEPROM_93XX46 is not set
# CONFIG_EEPROM_IDT_89HPESX is not set
# CONFIG_EEPROM_EE1004 is not set
# end of EEPROM support

# CONFIG_CB710_CORE is not set

#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# end of Texas Instruments shared transport line discipline

# CONFIG_SENSORS_LIS3_SPI is not set
# CONFIG_SENSORS_LIS3_I2C is not set
# CONFIG_ALTERA_STAPL is not set

#
# Intel MIC & related support
#

#
# Intel MIC Bus Driver
#

#
# SCIF Bus Driver
#

#
# VOP Bus Driver
#
# CONFIG_VOP_BUS is not set

#
# Intel MIC Host Driver
#

#
# Intel MIC Card Driver
#

#
# SCIF Driver
#

#
# Intel MIC Coprocessor State Management (COSM) Drivers
#

#
# VOP Driver
#
# end of Intel MIC & related support

# CONFIG_ECHO is not set
# CONFIG_MISC_ALCOR_PCI is not set
# CONFIG_MISC_RTSX_PCI is not set
# CONFIG_MISC_RTSX_USB is not set
# CONFIG_HABANA_AI is not set
# end of Misc devices

CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set

#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_SCSI_PROC_FS=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
CONFIG_SCSI_SCAN_ASYNC=y

#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# end of SCSI Transports

CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_SCSI_CXGB4_ISCSI is not set
# CONFIG_SCSI_BNX2_ISCSI is not set
# CONFIG_BE2ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_HPSA is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_3W_SAS is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_MVUMI is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_SCSI_ESAS2R is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_MPT3SAS is not set
# CONFIG_SCSI_MPT2SAS is not set
# CONFIG_SCSI_SMARTPQI is not set
# CONFIG_SCSI_UFSHCD is not set
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_MYRB is not set
# CONFIG_SCSI_MYRS is not set
# CONFIG_SCSI_SNIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FDOMAIN_PCI is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_ISCSI is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_WD719X is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_PMCRAID is not set
# CONFIG_SCSI_PM8001 is not set
# CONFIG_SCSI_DH is not set
# end of SCSI device support

CONFIG_ATA=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_SATA_PMP=y

#
# Controllers with non-SFF native interface
#
# CONFIG_SATA_AHCI is not set
CONFIG_SATA_AHCI_PLATFORM=y
# CONFIG_AHCI_DM816 is not set
# CONFIG_AHCI_CEVA is not set
# CONFIG_AHCI_QORIQ is not set
# CONFIG_SATA_INIC162X is not set
# CONFIG_SATA_ACARD_AHCI is not set
# CONFIG_SATA_SIL24 is not set
CONFIG_ATA_SFF=y

#
# SFF controllers with custom DMA interface
#
# CONFIG_PDC_ADMA is not set
# CONFIG_SATA_QSTOR is not set
# CONFIG_SATA_SX4 is not set
CONFIG_ATA_BMDMA=y

#
# SATA SFF controllers with BMDMA
#
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_DWC is not set
# CONFIG_SATA_MV is not set
# CONFIG_SATA_NV is not set
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SIL is not set
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_SVW is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_SATA_VITESSE is not set

#
# PATA SFF controllers with BMDMA
#
# CONFIG_PATA_ALI is not set
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
# CONFIG_PATA_ATIIXP is not set
# CONFIG_PATA_ATP867X is not set
# CONFIG_PATA_CMD64X is not set
# CONFIG_PATA_CYPRESS is not set
# CONFIG_PATA_EFAR is not set
# CONFIG_PATA_HPT366 is not set
# CONFIG_PATA_HPT37X is not set
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT8213 is not set
# CONFIG_PATA_IT821X is not set
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_MARVELL is not set
# CONFIG_PATA_NETCELL is not set
# CONFIG_PATA_NINJA32 is not set
# CONFIG_PATA_NS87415 is not set
# CONFIG_PATA_OLDPIIX is not set
# CONFIG_PATA_OPTIDMA is not set
# CONFIG_PATA_PDC2027X is not set
# CONFIG_PATA_PDC_OLD is not set
# CONFIG_PATA_RADISYS is not set
# CONFIG_PATA_RDC is not set
# CONFIG_PATA_SCH is not set
# CONFIG_PATA_SERVERWORKS is not set
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_TOSHIBA is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set

#
# PIO-only SFF controllers
#
# CONFIG_PATA_CMD640_PCI is not set
# CONFIG_PATA_MPIIX is not set
# CONFIG_PATA_NS87410 is not set
# CONFIG_PATA_OPTI is not set
# CONFIG_PATA_PLATFORM is not set
# CONFIG_PATA_RZ1000 is not set

#
# Generic fallback / legacy drivers
#
# CONFIG_ATA_GENERIC is not set
# CONFIG_PATA_LEGACY is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set

#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
# end of IEEE 1394 (FireWire) support

CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_FC is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_IPVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_GENEVE is not set
# CONFIG_GTP is not set
# CONFIG_MACSEC is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set
# CONFIG_ARCNET is not set

#
# CAIF transport drivers
#

#
# Distributed Switch Architecture drivers
#
# end of Distributed Switch Architecture drivers

CONFIG_ETHERNET=y
CONFIG_NET_VENDOR_3COM=y
# CONFIG_VORTEX is not set
# CONFIG_TYPHOON is not set
CONFIG_NET_VENDOR_ADAPTEC=y
# CONFIG_ADAPTEC_STARFIRE is not set
CONFIG_NET_VENDOR_AGERE=y
# CONFIG_ET131X is not set
CONFIG_NET_VENDOR_ALACRITECH=y
# CONFIG_SLICOSS is not set
CONFIG_NET_VENDOR_ALTEON=y
# CONFIG_ACENIC is not set
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_AMAZON=y
# CONFIG_ENA_ETHERNET is not set
CONFIG_NET_VENDOR_AMD=y
# CONFIG_AMD8111_ETH is not set
# CONFIG_PCNET32 is not set
CONFIG_NET_VENDOR_AQUANTIA=y
# CONFIG_NET_VENDOR_ARC is not set
CONFIG_NET_VENDOR_ATHEROS=y
# CONFIG_ATL2 is not set
# CONFIG_ATL1 is not set
# CONFIG_ATL1E is not set
# CONFIG_ATL1C is not set
# CONFIG_ALX is not set
CONFIG_NET_VENDOR_AURORA=y
# CONFIG_AURORA_NB8800 is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
CONFIG_NET_VENDOR_BROCADE=y
# CONFIG_BNA is not set
CONFIG_NET_VENDOR_CADENCE=y
# CONFIG_MACB is not set
CONFIG_NET_VENDOR_CAVIUM=y
CONFIG_NET_VENDOR_CHELSIO=y
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_CHELSIO_T4 is not set
# CONFIG_CHELSIO_T4VF is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
CONFIG_NET_VENDOR_CISCO=y
# CONFIG_ENIC is not set
CONFIG_NET_VENDOR_CORTINA=y
# CONFIG_GEMINI_ETHERNET is not set
CONFIG_DM9000=y
# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
# CONFIG_DNET is not set
CONFIG_NET_VENDOR_DEC=y
# CONFIG_NET_TULIP is not set
CONFIG_NET_VENDOR_DLINK=y
# CONFIG_DL2K is not set
# CONFIG_SUNDANCE is not set
CONFIG_NET_VENDOR_EMULEX=y
# CONFIG_BE2NET is not set
CONFIG_NET_VENDOR_EZCHIP=y
# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
# CONFIG_NET_VENDOR_FARADAY is not set
CONFIG_NET_VENDOR_GOOGLE=y
# CONFIG_GVE is not set
# CONFIG_NET_VENDOR_HISILICON is not set
CONFIG_NET_VENDOR_HP=y
# CONFIG_HP100 is not set
CONFIG_NET_VENDOR_HUAWEI=y
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_JME is not set
# CONFIG_NET_VENDOR_MARVELL is not set
CONFIG_NET_VENDOR_MELLANOX=y
# CONFIG_MLX4_EN is not set
# CONFIG_MLX5_CORE is not set
# CONFIG_MLXSW_CORE is not set
# CONFIG_MLXFW is not set
CONFIG_NET_VENDOR_MICREL=y
# CONFIG_KS8842 is not set
CONFIG_KS8851=y
CONFIG_KS8851_MLL=y
# CONFIG_KSZ884X_PCI is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
CONFIG_NET_VENDOR_MICROSEMI=y
CONFIG_NET_VENDOR_MYRI=y
# CONFIG_MYRI10GE is not set
# CONFIG_FEALNX is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
CONFIG_NET_VENDOR_NETERION=y
# CONFIG_S2IO is not set
# CONFIG_VXGE is not set
CONFIG_NET_VENDOR_NETRONOME=y
# CONFIG_NFP is not set
CONFIG_NET_VENDOR_NI=y
# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
CONFIG_NET_VENDOR_NVIDIA=y
# CONFIG_FORCEDETH is not set
CONFIG_NET_VENDOR_OKI=y
# CONFIG_ETHOC is not set
CONFIG_NET_VENDOR_PACKET_ENGINES=y
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
CONFIG_NET_VENDOR_QLOGIC=y
# CONFIG_QLA3XXX is not set
# CONFIG_QLCNIC is not set
# CONFIG_QLGE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_QED is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_RDC=y
# CONFIG_R6040 is not set
CONFIG_NET_VENDOR_REALTEK=y
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_R8169 is not set
CONFIG_NET_VENDOR_RENESAS=y
CONFIG_NET_VENDOR_ROCKER=y
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_NET_VENDOR_SOLARFLARE=y
# CONFIG_SFC is not set
# CONFIG_SFC_FALCON is not set
CONFIG_NET_VENDOR_SILAN=y
# CONFIG_SC92031 is not set
CONFIG_NET_VENDOR_SIS=y
# CONFIG_SIS900 is not set
# CONFIG_SIS190 is not set
CONFIG_NET_VENDOR_SMSC=y
CONFIG_SMC91X=y
# CONFIG_EPIC100 is not set
# CONFIG_SMC911X is not set
CONFIG_SMSC911X=y
# CONFIG_SMSC9420 is not set
CONFIG_NET_VENDOR_SOCIONEXT=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_NET_VENDOR_SUN=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NIU is not set
CONFIG_NET_VENDOR_SYNOPSYS=y
# CONFIG_DWC_XLGMAC is not set
CONFIG_NET_VENDOR_TEHUTI=y
# CONFIG_TEHUTI is not set
CONFIG_NET_VENDOR_TI=y
CONFIG_TI_DAVINCI_EMAC=y
CONFIG_TI_DAVINCI_MDIO=y
# CONFIG_TI_CPSW_PHY_SEL is not set
CONFIG_TI_CPSW=y
CONFIG_TI_CPTS=y
CONFIG_TI_CPTS_MOD=y
# CONFIG_TLAN is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_NET_VENDOR_XILINX=y
# CONFIG_XILINX_AXI_EMAC is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_MDIO_BITBANG is not set
# CONFIG_MDIO_BUS_MUX_GPIO is not set
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
# CONFIG_MDIO_HISI_FEMAC is not set
# CONFIG_MDIO_MSCC_MIIM is not set
CONFIG_PHYLIB=y
CONFIG_SWPHY=y
# CONFIG_LED_TRIGGER_PHY is not set

#
# MII PHY device drivers
#
# CONFIG_AMD_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AX88796B_PHY is not set
CONFIG_AT803X_PHY=y
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_CORTINA_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_DP83822_PHY is not set
# CONFIG_DP83TC811_PHY is not set
CONFIG_DP83848_PHY=y
CONFIG_DP83867_PHY=y
CONFIG_FIXED_PHY=y
# CONFIG_ICPLUS_PHY is not set
# CONFIG_INTEL_XWAY_PHY is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_MARVELL_10G_PHY is not set
CONFIG_MICREL_PHY=y
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_MICROCHIP_T1_PHY is not set
# CONFIG_MICROSEMI_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_RENESAS_PHY is not set
# CONFIG_ROCKCHIP_PHY is not set
CONFIG_SMSC_PHY=y
# CONFIG_STE10XP is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
CONFIG_USB_NET_DRIVERS=y
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_RTL8152 is not set
# CONFIG_USB_LAN78XX is not set
CONFIG_USB_USBNET=y
CONFIG_USB_NET_AX8817X=y
CONFIG_USB_NET_AX88179_178A=y
CONFIG_USB_NET_CDCETHER=y
# CONFIG_USB_NET_CDC_EEM is not set
CONFIG_USB_NET_CDC_NCM=y
# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
# CONFIG_USB_NET_CDC_MBIM is not set
# CONFIG_USB_NET_DM9601 is not set
# CONFIG_USB_NET_SR9700 is not set
# CONFIG_USB_NET_SR9800 is not set
# CONFIG_USB_NET_SMSC75XX is not set
CONFIG_USB_NET_SMSC95XX=y
# CONFIG_USB_NET_GL620A is not set
CONFIG_USB_NET_NET1080=y
# CONFIG_USB_NET_PLUSB is not set
# CONFIG_USB_NET_MCS7830 is not set
# CONFIG_USB_NET_RNDIS_HOST is not set
CONFIG_USB_NET_CDC_SUBSET_ENABLE=y
CONFIG_USB_NET_CDC_SUBSET=y
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_BELKIN=y
CONFIG_USB_ARMLINUX=y
CONFIG_USB_EPSON2888=y
CONFIG_USB_KC2190=y
CONFIG_USB_NET_ZAURUS=y
# CONFIG_USB_NET_CX82310_ETH is not set
# CONFIG_USB_NET_KALMIA is not set
# CONFIG_USB_NET_QMI_WWAN is not set
# CONFIG_USB_NET_INT51X1 is not set
# CONFIG_USB_IPHETH is not set
# CONFIG_USB_SIERRA_NET is not set
# CONFIG_USB_VL600 is not set
# CONFIG_USB_NET_CH9200 is not set
# CONFIG_USB_NET_AQC111 is not set
# CONFIG_WLAN is not set

#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_VMXNET3 is not set
# CONFIG_NETDEVSIM is not set
# CONFIG_NET_FAILOVER is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set

#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_LEDS=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ADP5589 is not set
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_QT1050 is not set
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_DLINK_DIR685 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_GPIO_POLLED is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_OMAP4 is not set
# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
# CONFIG_KEYBOARD_TWL4030 is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_CAP11XX is not set
# CONFIG_KEYBOARD_BCM is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_PROPERTIES=y
# CONFIG_TOUCHSCREEN_ADS7846 is not set
# CONFIG_TOUCHSCREEN_AD7877 is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_BU21029 is not set
# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_EETI is not set
# CONFIG_TOUCHSCREEN_EGALAX is not set
# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
# CONFIG_TOUCHSCREEN_EXC3000 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
CONFIG_TOUCHSCREEN_GOODIX=y
# CONFIG_TOUCHSCREEN_HIDEEP is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_S6SY761 is not set
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_EKTF2127 is not set
# CONFIG_TOUCHSCREEN_ELAN is not set
# CONFIG_TOUCHSCREEN_ELO is not set
# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
# CONFIG_TOUCHSCREEN_MAX11801 is not set
# CONFIG_TOUCHSCREEN_MCS5000 is not set
# CONFIG_TOUCHSCREEN_MMS114 is not set
# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
# CONFIG_TOUCHSCREEN_MTOUCH is not set
# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
# CONFIG_TOUCHSCREEN_INEXIO is not set
# CONFIG_TOUCHSCREEN_MK712 is not set
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
CONFIG_TOUCHSCREEN_EDT_FT5X06=y
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
CONFIG_TOUCHSCREEN_PIXCIR=y
# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
# CONFIG_TOUCHSCREEN_TSC2004 is not set
# CONFIG_TOUCHSCREEN_TSC2005 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
# CONFIG_TOUCHSCREEN_RM_TS is not set
# CONFIG_TOUCHSCREEN_SILEAD is not set
# CONFIG_TOUCHSCREEN_SIS_I2C is not set
# CONFIG_TOUCHSCREEN_ST1232 is not set
# CONFIG_TOUCHSCREEN_STMFTS is not set
# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
# CONFIG_TOUCHSCREEN_SX8654 is not set
# CONFIG_TOUCHSCREEN_TPS6507X is not set
# CONFIG_TOUCHSCREEN_ZET6223 is not set
# CONFIG_TOUCHSCREEN_ZFORCE is not set
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
# CONFIG_TOUCHSCREEN_IQS5XX is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_AD714X is not set
# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
# CONFIG_INPUT_BMA150 is not set
# CONFIG_INPUT_E3X0_BUTTON is not set
# CONFIG_INPUT_MSM_VIBRATOR is not set
# CONFIG_INPUT_MMA8450 is not set
# CONFIG_INPUT_GP2A is not set
# CONFIG_INPUT_GPIO_BEEPER is not set
# CONFIG_INPUT_GPIO_DECODER is not set
# CONFIG_INPUT_GPIO_VIBRA is not set
# CONFIG_INPUT_CPCAP_PWRBUTTON is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
# CONFIG_INPUT_KXTJ9 is not set
# CONFIG_INPUT_POWERMATE is not set
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_CM109 is not set
# CONFIG_INPUT_REGULATOR_HAPTIC is not set
# CONFIG_INPUT_TPS65218_PWRBUTTON is not set
# CONFIG_INPUT_TWL4030_PWRBUTTON is not set
# CONFIG_INPUT_TWL4030_VIBRA is not set
# CONFIG_INPUT_TWL6040_VIBRA is not set
# CONFIG_INPUT_UINPUT is not set
# CONFIG_INPUT_PALMAS_PWRBUTTON is not set
# CONFIG_INPUT_PCF8574 is not set
# CONFIG_INPUT_PWM_BEEPER is not set
# CONFIG_INPUT_PWM_VIBRA is not set
# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
# CONFIG_INPUT_ADXL34X is not set
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
# CONFIG_RMI4_CORE is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
# end of Hardware I/O ports
# end of Input device support

#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
# CONFIG_NULL_TTY is not set
CONFIG_LDISC_AUTOLOAD=y
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set

#
# Serial drivers
#
CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
# CONFIG_SERIAL_8250_FINTEK is not set
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_DMA is not set
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=10
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
# CONFIG_SERIAL_8250_ASPEED_VUART is not set
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_8250_FSL=y
# CONFIG_SERIAL_8250_DW is not set
# CONFIG_SERIAL_8250_EM is not set
# CONFIG_SERIAL_8250_RT288X is not set
CONFIG_SERIAL_8250_OMAP=y
CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP=y
# CONFIG_SERIAL_8250_MOXA is not set
CONFIG_SERIAL_OF_PLATFORM=y

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
# CONFIG_SERIAL_MAX3100 is not set
# CONFIG_SERIAL_MAX310X is not set
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OMAP is not set
# CONFIG_SERIAL_SIFIVE is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_BCM63XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_IFX6X60 is not set
# CONFIG_SERIAL_XILINX_PS_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
# CONFIG_SERIAL_ST_ASC is not set
# end of Serial drivers

CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
# CONFIG_TTY_PRINTK is not set
# CONFIG_HVC_DCC is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=m
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
CONFIG_HW_RANDOM_OMAP=m
CONFIG_HW_RANDOM_OMAP3_ROM=m
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
# end of Character devices

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y

#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX_GPMUX is not set
# CONFIG_I2C_MUX_LTC4306 is not set
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
# CONFIG_I2C_MUX_REG is not set
# CONFIG_I2C_DEMUX_PINCTRL is not set
# CONFIG_I2C_MUX_MLXCPLD is not set
# end of Multiplexer I2C Chip support

CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOBIT=y

#
# I2C Hardware Bus support
#

#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_NVIDIA_GPU is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set

#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_CBUS_GPIO is not set
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_OMAP=y
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set

#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_DIOLAN_U2C is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set

#
# Other I2C/SMBus bus drivers
#
# end of I2C Hardware Bus support

# CONFIG_I2C_STUB is not set
# CONFIG_I2C_SLAVE is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# end of I2C support

# CONFIG_I3C is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
# CONFIG_SPI_MEM is not set

#
# SPI Master Controller Drivers
#
# CONFIG_SPI_ALTERA is not set
# CONFIG_SPI_AXI_SPI_ENGINE is not set
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_CADENCE is not set
# CONFIG_SPI_DESIGNWARE is not set
# CONFIG_SPI_NXP_FLEXSPI is not set
# CONFIG_SPI_GPIO is not set
# CONFIG_SPI_FSL_SPI is not set
# CONFIG_SPI_OC_TINY is not set
CONFIG_SPI_OMAP24XX=y
# CONFIG_SPI_TI_QSPI is not set
# CONFIG_SPI_PXA2XX is not set
# CONFIG_SPI_ROCKCHIP is not set
# CONFIG_SPI_SC18IS602 is not set
# CONFIG_SPI_SIFIVE is not set
# CONFIG_SPI_MXIC is not set
# CONFIG_SPI_XCOMM is not set
# CONFIG_SPI_XILINX is not set
# CONFIG_SPI_ZYNQMP_GQSPI is not set

#
# SPI Protocol Masters
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_LOOPBACK_TEST is not set
# CONFIG_SPI_TLE62X0 is not set
# CONFIG_SPI_SLAVE is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
CONFIG_PPS=y
# CONFIG_PPS_DEBUG is not set

#
# PPS clients support
#
# CONFIG_PPS_CLIENT_KTIMER is not set
# CONFIG_PPS_CLIENT_LDISC is not set
# CONFIG_PPS_CLIENT_GPIO is not set

#
# PPS generators support
#

#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y

#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
# end of PTP clock support

CONFIG_PINCTRL=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_PINMUX=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_PINCTRL_AMD is not set
# CONFIG_PINCTRL_MCP23S08 is not set
CONFIG_PINCTRL_SINGLE=y
# CONFIG_PINCTRL_SX150X is not set
# CONFIG_PINCTRL_STMFX is not set
# CONFIG_PINCTRL_PALMAS is not set
# CONFIG_PINCTRL_OCELOT is not set
CONFIG_PINCTRL_TI_IODELAY=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
CONFIG_GPIO_SYSFS=y

#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_74XX_MMIO is not set
# CONFIG_GPIO_ALTERA is not set
# CONFIG_GPIO_CADENCE is not set
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_EXAR is not set
# CONFIG_GPIO_FTGPIO010 is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_GRGPIO is not set
# CONFIG_GPIO_HLWD is not set
# CONFIG_GPIO_MB86S7X is not set
# CONFIG_GPIO_MPC8XXX is not set
CONFIG_GPIO_OMAP=y
# CONFIG_GPIO_SAMA5D2_PIOBU is not set
# CONFIG_GPIO_SYSCON is not set
# CONFIG_GPIO_XILINX is not set
# CONFIG_GPIO_ZEVIO is not set
# CONFIG_GPIO_AMD_FCH is not set
# end of Memory mapped GPIO drivers

#
# I2C GPIO expanders
#
# CONFIG_GPIO_ADP5588 is not set
# CONFIG_GPIO_ADNP is not set
# CONFIG_GPIO_GW_PLD is not set
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
CONFIG_GPIO_PCA953X=y
# CONFIG_GPIO_PCA953X_IRQ is not set
CONFIG_GPIO_PCF857X=y
# CONFIG_GPIO_TPIC2810 is not set
# end of I2C GPIO expanders

#
# MFD GPIO expanders
#
# CONFIG_HTC_EGPIO is not set
# CONFIG_GPIO_LP873X is not set
CONFIG_GPIO_LP87565=y
CONFIG_GPIO_PALMAS=y
# CONFIG_GPIO_TPS65218 is not set
# CONFIG_GPIO_TPS65910 is not set
CONFIG_GPIO_TWL4030=y
# CONFIG_GPIO_TWL6040 is not set
# end of MFD GPIO expanders

#
# PCI GPIO expanders
#
# CONFIG_GPIO_BT8XX is not set
# CONFIG_GPIO_PCI_IDIO_16 is not set
# CONFIG_GPIO_PCIE_IDIO_24 is not set
# CONFIG_GPIO_RDC321X is not set
# end of PCI GPIO expanders

#
# SPI GPIO expanders
#
# CONFIG_GPIO_74X164 is not set
# CONFIG_GPIO_MAX3191X is not set
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MC33880 is not set
# CONFIG_GPIO_PISOSR is not set
# CONFIG_GPIO_XRA1403 is not set
# end of SPI GPIO expanders

#
# USB GPIO expanders
#
# end of USB GPIO expanders

# CONFIG_GPIO_MOCKUP is not set
# CONFIG_W1 is not set
CONFIG_POWER_AVS=y
CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_BRCMKONA is not set
# CONFIG_POWER_RESET_BRCMSTB is not set
CONFIG_POWER_RESET_GPIO=y
# CONFIG_POWER_RESET_GPIO_RESTART is not set
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_RESTART is not set
# CONFIG_POWER_RESET_VERSATILE is not set
# CONFIG_POWER_RESET_SYSCON is not set
# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
# CONFIG_SYSCON_REBOOT_MODE is not set
# CONFIG_NVMEM_REBOOT_MODE is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_TEST_POWER is not set
# CONFIG_CHARGER_ADP5061 is not set
# CONFIG_BATTERY_DS2780 is not set
# CONFIG_BATTERY_DS2781 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_CHARGER_SBS is not set
# CONFIG_MANAGER_SBS is not set
# CONFIG_BATTERY_BQ27XXX is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_CHARGER_ISP1704 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_CHARGER_MANAGER is not set
# CONFIG_CHARGER_LT3651 is not set
# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24257 is not set
# CONFIG_CHARGER_BQ24735 is not set
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_CHARGER_TPS65217 is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_CHARGER_RT9455 is not set
# CONFIG_CHARGER_UCS1002 is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_CORE is not set
# CONFIG_WATCHDOG_NOWAYOUT is not set
CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=0
# CONFIG_WATCHDOG_SYSFS is not set

#
# Watchdog Pretimeout Governors
#

#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_GPIO_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set
# CONFIG_ZIIRAVE_WATCHDOG is not set
# CONFIG_CADENCE_WATCHDOG is not set
# CONFIG_FTWDT010_WATCHDOG is not set
# CONFIG_DW_WATCHDOG is not set
# CONFIG_OMAP_WATCHDOG is not set
# CONFIG_TWL4030_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_I6300ESB_WDT is not set
# CONFIG_MEN_A21_WDT is not set

#
# PCI-based Watchdog Cards
#
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set

#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BCMA is not set

#
# Multifunction device drivers
#
CONFIG_MFD_CORE=y
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_BD9571MWV is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_MFD_MADERA is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77620 is not set
# CONFIG_MFD_MAX77650 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_EZX_PCAP is not set
CONFIG_MFD_CPCAP=y
# CONFIG_MFD_VIPERBOARD is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_PM8XXX is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_RK808 is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_STMPE is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_TI_LMU is not set
CONFIG_MFD_OMAP_USB_HOST=y
CONFIG_MFD_PALMAS=y
# CONFIG_TPS6105X is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
CONFIG_MFD_TPS65217=y
CONFIG_MFD_TI_LP873X=y
CONFIG_MFD_TI_LP87565=y
CONFIG_MFD_TPS65218=y
# CONFIG_MFD_TPS6586X is not set
CONFIG_MFD_TPS65910=y
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS80031 is not set
CONFIG_TWL4030_CORE=y
CONFIG_TWL4030_POWER=y
# CONFIG_MFD_TWL4030_AUDIO is not set
CONFIG_TWL6040_CORE=y
CONFIG_MENELAUS=y
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_TQMX86 is not set
# CONFIG_MFD_VX855 is not set
# CONFIG_MFD_LOCHNAGAR is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_ARIZONA_SPI is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_ROHM_BD718XX is not set
# CONFIG_MFD_ROHM_BD70528 is not set
# CONFIG_MFD_STPMIC1 is not set
# CONFIG_MFD_STMFX is not set
# CONFIG_RAVE_SP_CORE is not set
# end of Multifunction device drivers

CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_88PG86X is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ANATOP is not set
CONFIG_REGULATOR_CPCAP=y
# CONFIG_REGULATOR_DA9210 is not set
# CONFIG_REGULATOR_DA9211 is not set
# CONFIG_REGULATOR_FAN53555 is not set
CONFIG_REGULATOR_GPIO=y
# CONFIG_REGULATOR_ISL9305 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
CONFIG_REGULATOR_LP872X=y
CONFIG_REGULATOR_LP873X=y
# CONFIG_REGULATOR_LP8755 is not set
CONFIG_REGULATOR_LP87565=y
# CONFIG_REGULATOR_LTC3589 is not set
# CONFIG_REGULATOR_LTC3676 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MCP16502 is not set
# CONFIG_REGULATOR_MT6311 is not set
CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y
# CONFIG_REGULATOR_PFUZE100 is not set
# CONFIG_REGULATOR_PV88060 is not set
# CONFIG_REGULATOR_PV88080 is not set
# CONFIG_REGULATOR_PV88090 is not set
# CONFIG_REGULATOR_PWM is not set
# CONFIG_REGULATOR_SLG51000 is not set
CONFIG_REGULATOR_TI_ABB=y
# CONFIG_REGULATOR_SY8106A is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS62360 is not set
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
# CONFIG_REGULATOR_TPS65132 is not set
CONFIG_REGULATOR_TPS65217=y
CONFIG_REGULATOR_TPS65218=y
# CONFIG_REGULATOR_TPS6524X is not set
CONFIG_REGULATOR_TPS65910=y
CONFIG_REGULATOR_TWL4030=y
# CONFIG_REGULATOR_VCTRL is not set
CONFIG_CEC_CORE=y
# CONFIG_RC_CORE is not set
CONFIG_MEDIA_SUPPORT=y

#
# Multimedia core support
#
CONFIG_MEDIA_CAMERA_SUPPORT=y
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
# CONFIG_MEDIA_RADIO_SUPPORT is not set
# CONFIG_MEDIA_SDR_SUPPORT is not set
CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_V4L2_MEM2MEM_DEV=y
CONFIG_V4L2_FWNODE=y

#
# Media drivers
#
# CONFIG_MEDIA_USB_SUPPORT is not set
# CONFIG_MEDIA_PCI_SUPPORT is not set
CONFIG_V4L_PLATFORM_DRIVERS=y
# CONFIG_VIDEO_CAFE_CCIC is not set
# CONFIG_VIDEO_CADENCE is not set
# CONFIG_VIDEO_ASPEED is not set
# CONFIG_VIDEO_MUX is not set
# CONFIG_VIDEO_OMAP3 is not set
CONFIG_VIDEO_AM437X_VPFE=y
# CONFIG_VIDEO_XILINX is not set
CONFIG_VIDEO_TI_CAL=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
# CONFIG_VIDEO_SH_VEU is not set
CONFIG_VIDEO_TI_VPE=y
# CONFIG_VIDEO_TI_VPE_DEBUG is not set
CONFIG_VIDEO_TI_VPDMA=y
CONFIG_VIDEO_TI_SC=y
CONFIG_VIDEO_TI_CSC=y
# CONFIG_V4L_TEST_DRIVERS is not set
CONFIG_CEC_PLATFORM_DRIVERS=y
# CONFIG_CEC_GPIO is not set

#
# Supported MMC/SDIO adapters
#
# CONFIG_CYPRESS_FIRMWARE is not set
CONFIG_VIDEOBUF2_CORE=y
CONFIG_VIDEOBUF2_V4L2=y
CONFIG_VIDEOBUF2_MEMOPS=y
CONFIG_VIDEOBUF2_DMA_CONTIG=y

#
# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
#
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set

#
# I2C Encoders, decoders, sensors and other helper chips
#

#
# Audio decoders, processors and mixers
#
# CONFIG_VIDEO_TVAUDIO is not set
# CONFIG_VIDEO_TDA7432 is not set
# CONFIG_VIDEO_TDA9840 is not set
# CONFIG_VIDEO_TDA1997X is not set
# CONFIG_VIDEO_TEA6415C is not set
# CONFIG_VIDEO_TEA6420 is not set
# CONFIG_VIDEO_MSP3400 is not set
# CONFIG_VIDEO_CS3308 is not set
# CONFIG_VIDEO_CS5345 is not set
# CONFIG_VIDEO_CS53L32A is not set
# CONFIG_VIDEO_TLV320AIC23B is not set
# CONFIG_VIDEO_UDA1342 is not set
# CONFIG_VIDEO_WM8775 is not set
# CONFIG_VIDEO_WM8739 is not set
# CONFIG_VIDEO_VP27SMPX is not set
# CONFIG_VIDEO_SONY_BTF_MPX is not set

#
# RDS decoders
#
# CONFIG_VIDEO_SAA6588 is not set

#
# Video decoders
#
# CONFIG_VIDEO_ADV7180 is not set
# CONFIG_VIDEO_ADV7183 is not set
# CONFIG_VIDEO_ADV748X is not set
# CONFIG_VIDEO_ADV7604 is not set
# CONFIG_VIDEO_ADV7842 is not set
# CONFIG_VIDEO_BT819 is not set
# CONFIG_VIDEO_BT856 is not set
# CONFIG_VIDEO_BT866 is not set
# CONFIG_VIDEO_KS0127 is not set
# CONFIG_VIDEO_ML86V7667 is not set
# CONFIG_VIDEO_SAA7110 is not set
# CONFIG_VIDEO_SAA711X is not set
# CONFIG_VIDEO_TC358743 is not set
# CONFIG_VIDEO_TVP514X is not set
# CONFIG_VIDEO_TVP5150 is not set
# CONFIG_VIDEO_TVP7002 is not set
# CONFIG_VIDEO_TW2804 is not set
# CONFIG_VIDEO_TW9903 is not set
# CONFIG_VIDEO_TW9906 is not set
# CONFIG_VIDEO_TW9910 is not set
# CONFIG_VIDEO_VPX3220 is not set

#
# Video and audio decoders
#
# CONFIG_VIDEO_SAA717X is not set
# CONFIG_VIDEO_CX25840 is not set

#
# Video encoders
#
# CONFIG_VIDEO_SAA7127 is not set
# CONFIG_VIDEO_SAA7185 is not set
# CONFIG_VIDEO_ADV7170 is not set
# CONFIG_VIDEO_ADV7175 is not set
# CONFIG_VIDEO_ADV7343 is not set
# CONFIG_VIDEO_ADV7393 is not set
# CONFIG_VIDEO_ADV7511 is not set
# CONFIG_VIDEO_AD9389B is not set
# CONFIG_VIDEO_AK881X is not set
# CONFIG_VIDEO_THS8200 is not set

#
# Camera sensor devices
#
# CONFIG_VIDEO_IMX214 is not set
# CONFIG_VIDEO_IMX258 is not set
# CONFIG_VIDEO_IMX274 is not set
# CONFIG_VIDEO_IMX319 is not set
# CONFIG_VIDEO_IMX355 is not set
# CONFIG_VIDEO_OV2640 is not set
CONFIG_VIDEO_OV2659=y
# CONFIG_VIDEO_OV2680 is not set
# CONFIG_VIDEO_OV2685 is not set
CONFIG_VIDEO_OV5640=m
# CONFIG_VIDEO_OV5645 is not set
# CONFIG_VIDEO_OV5647 is not set
# CONFIG_VIDEO_OV6650 is not set
# CONFIG_VIDEO_OV5670 is not set
# CONFIG_VIDEO_OV5695 is not set
# CONFIG_VIDEO_OV7251 is not set
# CONFIG_VIDEO_OV772X is not set
# CONFIG_VIDEO_OV7640 is not set
# CONFIG_VIDEO_OV7670 is not set
# CONFIG_VIDEO_OV7740 is not set
# CONFIG_VIDEO_OV8856 is not set
# CONFIG_VIDEO_OV9640 is not set
# CONFIG_VIDEO_OV9650 is not set
# CONFIG_VIDEO_OV13858 is not set
# CONFIG_VIDEO_VS6624 is not set
# CONFIG_VIDEO_MT9M001 is not set
# CONFIG_VIDEO_MT9M032 is not set
# CONFIG_VIDEO_MT9M111 is not set
# CONFIG_VIDEO_MT9P031 is not set
# CONFIG_VIDEO_MT9T001 is not set
# CONFIG_VIDEO_MT9T112 is not set
# CONFIG_VIDEO_MT9V011 is not set
# CONFIG_VIDEO_MT9V032 is not set
# CONFIG_VIDEO_MT9V111 is not set
# CONFIG_VIDEO_SR030PC30 is not set
# CONFIG_VIDEO_NOON010PC30 is not set
# CONFIG_VIDEO_M5MOLS is not set
# CONFIG_VIDEO_RJ54N1 is not set
# CONFIG_VIDEO_S5K6AA is not set
# CONFIG_VIDEO_S5K6A3 is not set
# CONFIG_VIDEO_S5K4ECGX is not set
# CONFIG_VIDEO_S5K5BAF is not set
# CONFIG_VIDEO_SMIAPP is not set
# CONFIG_VIDEO_ET8EK8 is not set
# CONFIG_VIDEO_S5C73M3 is not set

#
# Lens drivers
#
# CONFIG_VIDEO_AD5820 is not set
# CONFIG_VIDEO_AK7375 is not set
# CONFIG_VIDEO_DW9714 is not set
# CONFIG_VIDEO_DW9807_VCM is not set

#
# Flash devices
#
# CONFIG_VIDEO_ADP1653 is not set
# CONFIG_VIDEO_LM3560 is not set
# CONFIG_VIDEO_LM3646 is not set

#
# Video improvement chips
#
# CONFIG_VIDEO_UPD64031A is not set
# CONFIG_VIDEO_UPD64083 is not set

#
# Audio/Video compression chips
#
# CONFIG_VIDEO_SAA6752HS is not set

#
# SDR tuner chips
#

#
# Miscellaneous helper chips
#
# CONFIG_VIDEO_THS7303 is not set
# CONFIG_VIDEO_M52790 is not set
# CONFIG_VIDEO_I2C is not set
# CONFIG_VIDEO_ST_MIPID02 is not set
# end of I2C Encoders, decoders, sensors and other helper chips

#
# SPI helper chips
#
# CONFIG_VIDEO_GS1662 is not set
# end of SPI helper chips

#
# Media SPI Adapters
#
# end of Media SPI Adapters

#
# Customise DVB Frontends
#

#
# Tools to develop new frontends
#
# end of Customise DVB Frontends

#
# Graphics support
#
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
# CONFIG_IMX_IPUV3_CORE is not set
CONFIG_DRM=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_MM is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
# CONFIG_DRM_DP_CEC is not set

#
# I2C encoder or helper chips
#
# CONFIG_DRM_I2C_CH7006 is not set
# CONFIG_DRM_I2C_SIL164 is not set
CONFIG_DRM_I2C_NXP_TDA998X=m
# CONFIG_DRM_I2C_NXP_TDA9950 is not set
# end of I2C encoder or helper chips

#
# ARM devices
#
# CONFIG_DRM_HDLCD is not set
# CONFIG_DRM_MALI_DISPLAY is not set
# CONFIG_DRM_KOMEDA is not set
# end of ARM devices

# CONFIG_DRM_RADEON is not set
# CONFIG_DRM_AMDGPU is not set

#
# ACP (Audio CoProcessor) Configuration
#
# end of ACP (Audio CoProcessor) Configuration

# CONFIG_DRM_NOUVEAU is not set
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_VKMS is not set
# CONFIG_DRM_EXYNOS is not set
# CONFIG_DRM_UDL is not set
# CONFIG_DRM_AST is not set
# CONFIG_DRM_MGAG200 is not set
# CONFIG_DRM_CIRRUS_QEMU is not set
# CONFIG_DRM_ARMADA is not set
# CONFIG_DRM_RCAR_DW_HDMI is not set
# CONFIG_DRM_RCAR_LVDS is not set
CONFIG_DRM_OMAP=y
CONFIG_OMAP2_DSS_INIT=y
CONFIG_OMAP_DSS_BASE=y
CONFIG_OMAP2_DSS=y
# CONFIG_OMAP2_DSS_DEBUG is not set
CONFIG_OMAP2_DSS_DEBUGFS=y
# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set
CONFIG_OMAP2_DSS_DPI=y
CONFIG_OMAP2_DSS_VENC=y
CONFIG_OMAP2_DSS_HDMI_COMMON=y
CONFIG_OMAP4_DSS_HDMI=y
CONFIG_OMAP4_DSS_HDMI_CEC=y
CONFIG_OMAP5_DSS_HDMI=y
CONFIG_OMAP2_DSS_SDI=y
CONFIG_OMAP2_DSS_DSI=y
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y

#
# OMAPDRM External Display Device Drivers
#
# CONFIG_DRM_OMAP_ENCODER_OPA362 is not set
# CONFIG_DRM_OMAP_ENCODER_TPD12S015 is not set
# CONFIG_DRM_OMAP_CONNECTOR_HDMI is not set
CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=y
# CONFIG_DRM_OMAP_PANEL_DSI_CM is not set
# CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM is not set
# CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02 is not set
# CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01 is not set
# CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1 is not set
# CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1 is not set
# CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11 is not set
# end of OMAPDRM External Display Device Drivers

# CONFIG_DRM_TILCDC is not set
# CONFIG_DRM_QXL is not set
# CONFIG_DRM_BOCHS is not set
# CONFIG_DRM_FSL_DCU is not set
# CONFIG_DRM_STM is not set
CONFIG_DRM_PANEL=y

#
# Display Panels
#
# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
CONFIG_DRM_PANEL_LVDS=m
CONFIG_DRM_PANEL_SIMPLE=m
# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
# CONFIG_DRM_PANEL_TPO_TPG110 is not set
# end of Display Panels

CONFIG_DRM_BRIDGE=y
CONFIG_DRM_PANEL_BRIDGE=y

#
# Display Interface Bridges
#
# CONFIG_DRM_ANALOGIX_ANX78XX is not set
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_LVDS_ENCODER is not set
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_SIL_SII8620 is not set
# CONFIG_DRM_SII902X is not set
# CONFIG_DRM_SII9234 is not set
# CONFIG_DRM_THINE_THC63LVD1024 is not set
# CONFIG_DRM_TOSHIBA_TC358764 is not set
# CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_TI_TFP410=y
# CONFIG_DRM_TI_SN65DSI86 is not set
# CONFIG_DRM_I2C_ADV7511 is not set
# end of Display Interface Bridges

# CONFIG_DRM_STI is not set
# CONFIG_DRM_ETNAVIV is not set
# CONFIG_DRM_ARCPGU is not set
# CONFIG_DRM_HISI_HIBMC is not set
# CONFIG_DRM_MXSFB is not set
# CONFIG_DRM_TINYDRM is not set
# CONFIG_DRM_PL111 is not set
# CONFIG_DRM_TVE200 is not set
# CONFIG_DRM_LIMA is not set
# CONFIG_DRM_PANFROST is not set
# CONFIG_DRM_MCDE is not set
# CONFIG_DRM_LEGACY is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y

#
# Frame buffer Devices
#
CONFIG_FB_CMDLINE=y
CONFIG_FB_NOTIFY=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_IMAGEBLIT=y
# CONFIG_FB_FOREIGN_ENDIAN is not set
CONFIG_FB_SYS_FOPS=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y

#
# Frame buffer hardware drivers
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_OPENCORES is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
# CONFIG_FB_I740 is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VT8623 is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
# CONFIG_FB_PM3 is not set
# CONFIG_FB_CARMINE is not set
# CONFIG_FB_SMSCUFX is not set
CONFIG_FB_UDL=y
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_FB_DA8XX is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set
# CONFIG_FB_SIMPLE is not set
# CONFIG_FB_SSD1307 is not set
# CONFIG_FB_SM712 is not set
# end of Frame buffer Devices

#
# Backlight & LCD device support
#
CONFIG_LCD_CLASS_DEVICE=y
# CONFIG_LCD_L4F00242T03 is not set
# CONFIG_LCD_LMS283GF05 is not set
# CONFIG_LCD_LTV350QV is not set
# CONFIG_LCD_ILI922X is not set
# CONFIG_LCD_ILI9320 is not set
# CONFIG_LCD_TDO24M is not set
# CONFIG_LCD_VGG2432A4 is not set
CONFIG_LCD_PLATFORM=y
# CONFIG_LCD_AMS369FG06 is not set
# CONFIG_LCD_LMS501KF03 is not set
# CONFIG_LCD_HX8357 is not set
# CONFIG_LCD_OTM3225A is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_PWM=y
# CONFIG_BACKLIGHT_PM8941_WLED is not set
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
# CONFIG_BACKLIGHT_LM3630A is not set
# CONFIG_BACKLIGHT_LM3639 is not set
# CONFIG_BACKLIGHT_LP855X is not set
# CONFIG_BACKLIGHT_PANDORA is not set
# CONFIG_BACKLIGHT_TPS65217 is not set
CONFIG_BACKLIGHT_GPIO=y
# CONFIG_BACKLIGHT_LV5207LP is not set
# CONFIG_BACKLIGHT_BD6107 is not set
# CONFIG_BACKLIGHT_ARCXCNN is not set
# end of Backlight & LCD device support

CONFIG_VIDEOMODE_HELPERS=y
CONFIG_HDMI=y

#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
# end of Console display driver support

# CONFIG_LOGO is not set
# end of Graphics support

CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_PCM_ELD=y
CONFIG_SND_PCM_IEC958=y
CONFIG_SND_DMAENGINE_PCM=y
CONFIG_SND_JACK=y
CONFIG_SND_JACK_INPUT_DEV=y
CONFIG_SND_OSSEMUL=y
# CONFIG_SND_MIXER_OSS is not set
# CONFIG_SND_PCM_OSS is not set
CONFIG_SND_PCM_TIMER=y
# CONFIG_SND_HRTIMER is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_PROC_FS=y
CONFIG_SND_VERBOSE_PROCFS=y
CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_DEBUG=y
# CONFIG_SND_DEBUG_VERBOSE is not set
# CONFIG_SND_PCM_XRUN_DEBUG is not set
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_ALOOP is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
CONFIG_SND_PCI=y
# CONFIG_SND_AD1889 is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_ATIIXP_MODEM is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
# CONFIG_SND_AW2 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_CTXFI is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_GINA20 is not set
# CONFIG_SND_LAYLA20 is not set
# CONFIG_SND_DARLA24 is not set
# CONFIG_SND_GINA24 is not set
# CONFIG_SND_LAYLA24 is not set
# CONFIG_SND_MONA is not set
# CONFIG_SND_MIA is not set
# CONFIG_SND_ECHO3G is not set
# CONFIG_SND_INDIGO is not set
# CONFIG_SND_INDIGOIO is not set
# CONFIG_SND_INDIGODJ is not set
# CONFIG_SND_INDIGOIOX is not set
# CONFIG_SND_INDIGODJX is not set
# CONFIG_SND_ENS1370 is not set
# CONFIG_SND_ENS1371 is not set
# CONFIG_SND_FM801 is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_INTEL8X0M is not set
# CONFIG_SND_KORG1212 is not set
# CONFIG_SND_LOLA is not set
# CONFIG_SND_LX6464ES is not set
# CONFIG_SND_MIXART is not set
# CONFIG_SND_NM256 is not set
# CONFIG_SND_PCXHR is not set
# CONFIG_SND_RIPTIDE is not set
# CONFIG_SND_RME32 is not set
# CONFIG_SND_RME96 is not set
# CONFIG_SND_RME9652 is not set
# CONFIG_SND_SE6X is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set

#
# HD-Audio
#
# CONFIG_SND_HDA_INTEL is not set
# end of HD-Audio

CONFIG_SND_HDA_PREALLOC_SIZE=64
CONFIG_SND_ARM=y
CONFIG_SND_SPI=y
CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_UA101 is not set
# CONFIG_SND_USB_CAIAQ is not set
# CONFIG_SND_USB_6FIRE is not set
# CONFIG_SND_USB_HIFACE is not set
# CONFIG_SND_BCD2000 is not set
# CONFIG_SND_USB_POD is not set
# CONFIG_SND_USB_PODHD is not set
# CONFIG_SND_USB_TONEPORT is not set
# CONFIG_SND_USB_VARIAX is not set
CONFIG_SND_SOC=y
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_AMD_ACP is not set
# CONFIG_SND_ATMEL_SOC is not set
# CONFIG_SND_DESIGNWARE_I2S is not set

#
# SoC Audio for Freescale CPUs
#

#
# Common SoC Audio options for Freescale CPUs:
#
# CONFIG_SND_SOC_FSL_ASRC is not set
# CONFIG_SND_SOC_FSL_SAI is not set
# CONFIG_SND_SOC_FSL_AUDMIX is not set
# CONFIG_SND_SOC_FSL_SSI is not set
# CONFIG_SND_SOC_FSL_SPDIF is not set
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_FSL_MICFIL is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
# end of SoC Audio for Freescale CPUs

# CONFIG_SND_I2S_HI6210_I2S is not set
# CONFIG_SND_SOC_IMG is not set
# CONFIG_SND_SOC_MTK_BTCVSD is not set
# CONFIG_SND_SOC_SOF_TOPLEVEL is not set

#
# STMicroelectronics STM32 SOC audio support
#
# end of STMicroelectronics STM32 SOC audio support

#
# Audio support for Texas Instruments SoCs
#
CONFIG_SND_SOC_TI_EDMA_PCM=y
CONFIG_SND_SOC_TI_SDMA_PCM=y

#
# Texas Instruments DAI support for:
#
CONFIG_SND_SOC_DAVINCI_MCASP=y
# CONFIG_SND_SOC_OMAP_DMIC is not set
# CONFIG_SND_SOC_OMAP_MCBSP is not set
# CONFIG_SND_SOC_OMAP_MCPDM is not set

#
# Audio support for boards with Texas Instruments SoCs
#
# CONFIG_SND_SOC_NOKIA_N810 is not set
# CONFIG_SND_SOC_NOKIA_RX51 is not set
# CONFIG_SND_SOC_OMAP3_PANDORA is not set
# CONFIG_SND_SOC_OMAP3_TWL4030 is not set
# CONFIG_SND_SOC_OMAP_ABE_TWL6040 is not set
# CONFIG_SND_SOC_OMAP_HDMI is not set
# end of Audio support for Texas Instruments SoCs

# CONFIG_SND_SOC_XILINX_I2S is not set
# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
# CONFIG_SND_SOC_XILINX_SPDIF is not set
# CONFIG_SND_SOC_XTFPGA_I2S is not set
# CONFIG_ZX_TDM is not set
CONFIG_SND_SOC_I2C_AND_SPI=y

#
# CODEC drivers
#
# CONFIG_SND_SOC_AC97_CODEC is not set
# CONFIG_SND_SOC_ADAU1701 is not set
# CONFIG_SND_SOC_ADAU1761_I2C is not set
# CONFIG_SND_SOC_ADAU1761_SPI is not set
# CONFIG_SND_SOC_ADAU7002 is not set
# CONFIG_SND_SOC_AK4104 is not set
# CONFIG_SND_SOC_AK4118 is not set
# CONFIG_SND_SOC_AK4458 is not set
# CONFIG_SND_SOC_AK4554 is not set
# CONFIG_SND_SOC_AK4613 is not set
# CONFIG_SND_SOC_AK4642 is not set
# CONFIG_SND_SOC_AK5386 is not set
# CONFIG_SND_SOC_AK5558 is not set
# CONFIG_SND_SOC_ALC5623 is not set
# CONFIG_SND_SOC_BD28623 is not set
# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_CPCAP is not set
# CONFIG_SND_SOC_CS35L32 is not set
# CONFIG_SND_SOC_CS35L33 is not set
# CONFIG_SND_SOC_CS35L34 is not set
# CONFIG_SND_SOC_CS35L35 is not set
# CONFIG_SND_SOC_CS35L36 is not set
# CONFIG_SND_SOC_CS42L42 is not set
# CONFIG_SND_SOC_CS42L51_I2C is not set
# CONFIG_SND_SOC_CS42L52 is not set
# CONFIG_SND_SOC_CS42L56 is not set
# CONFIG_SND_SOC_CS42L73 is not set
# CONFIG_SND_SOC_CS4265 is not set
# CONFIG_SND_SOC_CS4270 is not set
# CONFIG_SND_SOC_CS4271_I2C is not set
# CONFIG_SND_SOC_CS4271_SPI is not set
# CONFIG_SND_SOC_CS42XX8_I2C is not set
# CONFIG_SND_SOC_CS43130 is not set
# CONFIG_SND_SOC_CS4341 is not set
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CS53L30 is not set
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_DMIC is not set
CONFIG_SND_SOC_HDMI_CODEC=m
# CONFIG_SND_SOC_ES7134 is not set
# CONFIG_SND_SOC_ES7241 is not set
# CONFIG_SND_SOC_ES8316 is not set
# CONFIG_SND_SOC_ES8328_I2C is not set
# CONFIG_SND_SOC_ES8328_SPI is not set
# CONFIG_SND_SOC_GTM601 is not set
# CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_MAX98088 is not set
# CONFIG_SND_SOC_MAX98357A is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9867 is not set
# CONFIG_SND_SOC_MAX98927 is not set
# CONFIG_SND_SOC_MAX98373 is not set
# CONFIG_SND_SOC_MAX9860 is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM1789_I2C is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
# CONFIG_SND_SOC_PCM179X_SPI is not set
# CONFIG_SND_SOC_PCM186X_I2C is not set
# CONFIG_SND_SOC_PCM186X_SPI is not set
# CONFIG_SND_SOC_PCM3060_I2C is not set
# CONFIG_SND_SOC_PCM3060_SPI is not set
# CONFIG_SND_SOC_PCM3168A_I2C is not set
# CONFIG_SND_SOC_PCM3168A_SPI is not set
# CONFIG_SND_SOC_PCM512x_I2C is not set
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK3328 is not set
# CONFIG_SND_SOC_RT5616 is not set
# CONFIG_SND_SOC_RT5631 is not set
# CONFIG_SND_SOC_SGTL5000 is not set
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
# CONFIG_SND_SOC_SPDIF is not set
# CONFIG_SND_SOC_SSM2305 is not set
# CONFIG_SND_SOC_SSM2602_SPI is not set
# CONFIG_SND_SOC_SSM2602_I2C is not set
# CONFIG_SND_SOC_SSM4567 is not set
# CONFIG_SND_SOC_STA32X is not set
# CONFIG_SND_SOC_STA350 is not set
# CONFIG_SND_SOC_STI_SAS is not set
# CONFIG_SND_SOC_TAS2552 is not set
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SOC_TAS5720 is not set
# CONFIG_SND_SOC_TAS6424 is not set
# CONFIG_SND_SOC_TDA7419 is not set
# CONFIG_SND_SOC_TFA9879 is not set
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
# CONFIG_SND_SOC_TLV320AIC31XX is not set
# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
# CONFIG_SND_SOC_TLV320AIC3X is not set
# CONFIG_SND_SOC_TS3A227E is not set
# CONFIG_SND_SOC_TSCS42XX is not set
# CONFIG_SND_SOC_TSCS454 is not set
# CONFIG_SND_SOC_WM8510 is not set
# CONFIG_SND_SOC_WM8523 is not set
# CONFIG_SND_SOC_WM8524 is not set
# CONFIG_SND_SOC_WM8580 is not set
# CONFIG_SND_SOC_WM8711 is not set
# CONFIG_SND_SOC_WM8728 is not set
# CONFIG_SND_SOC_WM8731 is not set
# CONFIG_SND_SOC_WM8737 is not set
# CONFIG_SND_SOC_WM8741 is not set
# CONFIG_SND_SOC_WM8750 is not set
# CONFIG_SND_SOC_WM8753 is not set
# CONFIG_SND_SOC_WM8770 is not set
# CONFIG_SND_SOC_WM8776 is not set
# CONFIG_SND_SOC_WM8782 is not set
# CONFIG_SND_SOC_WM8804_I2C is not set
# CONFIG_SND_SOC_WM8804_SPI is not set
# CONFIG_SND_SOC_WM8903 is not set
# CONFIG_SND_SOC_WM8904 is not set
# CONFIG_SND_SOC_WM8960 is not set
# CONFIG_SND_SOC_WM8962 is not set
# CONFIG_SND_SOC_WM8974 is not set
# CONFIG_SND_SOC_WM8978 is not set
# CONFIG_SND_SOC_WM8985 is not set
# CONFIG_SND_SOC_ZX_AUD96P22 is not set
# CONFIG_SND_SOC_MAX9759 is not set
# CONFIG_SND_SOC_MT6351 is not set
# CONFIG_SND_SOC_MT6358 is not set
# CONFIG_SND_SOC_NAU8540 is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_NAU8822 is not set
# CONFIG_SND_SOC_NAU8824 is not set
# CONFIG_SND_SOC_TPA6130A2 is not set
# end of CODEC drivers

CONFIG_SND_SIMPLE_CARD_UTILS=y
CONFIG_SND_SIMPLE_CARD=y
# CONFIG_SND_AUDIO_GRAPH_CARD is not set

#
# HID support
#
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y

#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_ACCUTOUCH is not set
# CONFIG_HID_ACRUX is not set
# CONFIG_HID_APPLE is not set
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_ASUS is not set
# CONFIG_HID_AUREAL is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_BETOP_FF is not set
# CONFIG_HID_BIGBEN_FF is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CORSAIR is not set
# CONFIG_HID_COUGAR is not set
# CONFIG_HID_MACALLY is not set
# CONFIG_HID_PRODIKEYS is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELAN is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_GT683R is not set
# CONFIG_HID_KEYTOUCH is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_UCLOGIC is not set
# CONFIG_HID_WALTOP is not set
# CONFIG_HID_VIEWSONIC is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_ICADE is not set
# CONFIG_HID_ITE is not set
# CONFIG_HID_JABRA is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
# CONFIG_HID_LED is not set
# CONFIG_HID_LENOVO is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MALTRON is not set
# CONFIG_HID_MAYFLASH is not set
# CONFIG_HID_REDRAGON is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_MULTITOUCH is not set
# CONFIG_HID_NTI is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_ORTEK is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PENMOUNT is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
# CONFIG_HID_PLANTRONICS is not set
# CONFIG_HID_PRIMAX is not set
# CONFIG_HID_RETRODE is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_SAITEK is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SONY is not set
# CONFIG_HID_SPEEDLINK is not set
# CONFIG_HID_STEAM is not set
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_RMI is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TIVO is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THINGM is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_UDRAW_PS3 is not set
# CONFIG_HID_U2FZERO is not set
# CONFIG_HID_WACOM is not set
# CONFIG_HID_WIIMOTE is not set
# CONFIG_HID_XINMO is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
# CONFIG_HID_SENSOR_HUB is not set
# CONFIG_HID_ALPS is not set
# end of Special HID drivers

#
# USB HID support
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
CONFIG_USB_HIDDEV=y
# end of USB HID support

#
# I2C HID support
#
# CONFIG_I2C_HID is not set
# end of I2C HID support
# end of HID support

CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
CONFIG_USB_PCI=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y

#
# Miscellaneous USB options
#
CONFIG_USB_DEFAULT_PERSIST=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
CONFIG_USB_AUTOSUSPEND_DELAY=2
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB_CBAF is not set

#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_XHCI_HCD=y
# CONFIG_USB_XHCI_DBGCAP is not set
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PCI=y
# CONFIG_USB_EHCI_FSL is not set
CONFIG_USB_EHCI_HCD_OMAP=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
# CONFIG_USB_MAX3421_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_OMAP3=y
CONFIG_USB_OHCI_HCD_PCI=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HCD_TEST_MODE is not set

#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set

#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#

#
# also be needed; see USB_STORAGE Help for more info
#
# CONFIG_USB_STORAGE is not set

#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_HOST=y

#
# Platform Glue Layer
#
# CONFIG_USB_MUSB_TUSB6010 is not set
CONFIG_USB_MUSB_OMAP2PLUS=y
# CONFIG_USB_MUSB_AM35X is not set
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_MUSB_AM335X_CHILD=y

#
# MUSB DMA mode
#
# CONFIG_MUSB_PIO_ONLY is not set
CONFIG_USB_INVENTRA_DMA=y
CONFIG_USB_TI_CPPI41_DMA=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_HOST=y

#
# Platform Glue Driver Support
#
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_HAPS=y
CONFIG_USB_DWC3_OF_SIMPLE=y
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_CHIPIDEA is not set
# CONFIG_USB_ISP1760 is not set

#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
# CONFIG_USB_HUB_USB251XB is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_HSIC_USB4604 is not set
# CONFIG_USB_LINK_LAYER_TEST is not set
# CONFIG_USB_CHAOSKEY is not set

#
# USB Physical Layer drivers
#
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
# CONFIG_AM335X_PHY_USB is not set
CONFIG_TWL6030_USB=y
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ISP1301 is not set
CONFIG_USB_ULPI=y
CONFIG_USB_ULPI_VIEWPORT=y
# end of USB Physical Layer drivers

# CONFIG_USB_GADGET is not set
# CONFIG_TYPEC is not set
# CONFIG_USB_ROLE_SWITCH is not set
# CONFIG_USB_LED_TRIG is not set
# CONFIG_USB_ULPI_BUS is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_CLASS_FLASH is not set
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set

#
# LED drivers
#
# CONFIG_LEDS_AN30259A is not set
# CONFIG_LEDS_BCM6328 is not set
# CONFIG_LEDS_BCM6358 is not set
# CONFIG_LEDS_CPCAP is not set
# CONFIG_LEDS_CR0014114 is not set
# CONFIG_LEDS_LM3530 is not set
# CONFIG_LEDS_LM3532 is not set
# CONFIG_LEDS_LM3642 is not set
# CONFIG_LEDS_LM3692X is not set
# CONFIG_LEDS_PCA9532 is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_LP3952 is not set
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
# CONFIG_LEDS_LP8501 is not set
# CONFIG_LEDS_LP8860 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_PCA963X is not set
# CONFIG_LEDS_DAC124S085 is not set
# CONFIG_LEDS_PWM is not set
# CONFIG_LEDS_REGULATOR is not set
# CONFIG_LEDS_BD2802 is not set
# CONFIG_LEDS_LT3593 is not set
# CONFIG_LEDS_TCA6507 is not set
CONFIG_LEDS_TLC591XX=y
# CONFIG_LEDS_LM355x is not set
# CONFIG_LEDS_IS31FL319X is not set
# CONFIG_LEDS_IS31FL32XX is not set

#
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
#
# CONFIG_LEDS_BLINKM is not set
# CONFIG_LEDS_SYSCON is not set
# CONFIG_LEDS_MLXREG is not set
# CONFIG_LEDS_USER is not set
# CONFIG_LEDS_SPI_BYTE is not set
# CONFIG_LEDS_TI_LMU_COMMON is not set

#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
# CONFIG_LEDS_TRIGGER_TIMER is not set
# CONFIG_LEDS_TRIGGER_ONESHOT is not set
# CONFIG_LEDS_TRIGGER_DISK is not set
# CONFIG_LEDS_TRIGGER_MTD is not set
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
CONFIG_LEDS_TRIGGER_CPU=y
# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
# CONFIG_LEDS_TRIGGER_GPIO is not set
# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set

#
# iptables trigger is under Netfilter config (LED target)
#
# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
# CONFIG_LEDS_TRIGGER_CAMERA is not set
# CONFIG_LEDS_TRIGGER_PANIC is not set
# CONFIG_LEDS_TRIGGER_NETDEV is not set
# CONFIG_LEDS_TRIGGER_PATTERN is not set
# CONFIG_LEDS_TRIGGER_AUDIO is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
CONFIG_RTC_NVMEM=y

#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABEOZ9 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_HYM8563 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12026 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF85363 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BD70528 is not set
# CONFIG_RTC_DRV_BQ32K is not set
CONFIG_RTC_DRV_TWL92330=y
# CONFIG_RTC_DRV_TWL4030 is not set
# CONFIG_RTC_DRV_PALMAS is not set
# CONFIG_RTC_DRV_TPS65910 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV3028 is not set
# CONFIG_RTC_DRV_RV8803 is not set
# CONFIG_RTC_DRV_SD3078 is not set

#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T93 is not set
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1302 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6916 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RX4581 is not set
# CONFIG_RTC_DRV_RX6110 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
# CONFIG_RTC_DRV_MCP795 is not set
CONFIG_RTC_I2C_AND_SPI=y

#
# SPI and I2C RTC drivers
#
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_ZYNQMP is not set

#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_OMAP is not set
# CONFIG_RTC_DRV_CADENCE is not set
# CONFIG_RTC_DRV_FTRTC010 is not set
# CONFIG_RTC_DRV_SNVS is not set
# CONFIG_RTC_DRV_R7301 is not set
# CONFIG_RTC_DRV_CPCAP is not set

#
# HID Sensor RTC drivers
#
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set

#
# DMA Devices
#
CONFIG_DMA_ENGINE=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DMA_OF=y
# CONFIG_ALTERA_MSGDMA is not set
# CONFIG_DW_AXI_DMAC is not set
# CONFIG_FSL_EDMA is not set
# CONFIG_FSL_QDMA is not set
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_NBPFAXI_DMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
# CONFIG_DW_DMAC_PCI is not set
# CONFIG_DW_EDMA is not set
# CONFIG_DW_EDMA_PCIE is not set
CONFIG_TI_CPPI41=y
CONFIG_TI_EDMA=y
CONFIG_DMA_OMAP=y
CONFIG_TI_DMA_CROSSBAR=y

#
# DMA Clients
#
# CONFIG_ASYNC_TX_DMA is not set
# CONFIG_DMATEST is not set

#
# DMABUF options
#
CONFIG_SYNC_FILE=y
# CONFIG_SW_SYNC is not set
# CONFIG_UDMABUF is not set
# end of DMABUF options

# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VFIO is not set
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO_MENU=y
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_MMIO is not set

#
# Microsoft Hyper-V guest support
#
# end of Microsoft Hyper-V guest support

# CONFIG_STAGING is not set
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y

#
# Common Clock Framework
#
# CONFIG_CLK_HSDK is not set
# CONFIG_COMMON_CLK_MAX9485 is not set
# CONFIG_COMMON_CLK_SI5341 is not set
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_COMMON_CLK_SI544 is not set
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_CLK_TWL6040 is not set
# CONFIG_CLK_QORIQ is not set
# CONFIG_COMMON_CLK_PALMAS is not set
# CONFIG_COMMON_CLK_PWM is not set
# CONFIG_COMMON_CLK_VC5 is not set
# CONFIG_COMMON_CLK_FIXED_MMIO is not set
CONFIG_COMMON_CLK_TI_ADPLL=y
# end of Common Clock Framework

# CONFIG_HWSPINLOCK is not set

#
# Clock Source drivers
#
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_OMAP_DM_TIMER=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLKSRC_TI_32K=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# end of Clock Source drivers

# CONFIG_MAILBOX is not set
CONFIG_IOMMU_API=y
CONFIG_IOMMU_SUPPORT=y

#
# Generic IOMMU Pagetable Support
#
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# end of Generic IOMMU Pagetable Support

# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y
CONFIG_OMAP_IOMMU=y
# CONFIG_OMAP_IOMMU_DEBUG is not set
# CONFIG_ARM_SMMU is not set

#
# Remoteproc drivers
#
# CONFIG_REMOTEPROC is not set
# end of Remoteproc drivers

#
# Rpmsg drivers
#
# CONFIG_RPMSG_VIRTIO is not set
# end of Rpmsg drivers

# CONFIG_SOUNDWIRE is not set

#
# SOC (System On Chip) specific Drivers
#

#
# Amlogic SoC drivers
#
# end of Amlogic SoC drivers

#
# Aspeed SoC drivers
#
# end of Aspeed SoC drivers

#
# Broadcom SoC drivers
#
# CONFIG_SOC_BRCMSTB is not set
# end of Broadcom SoC drivers

#
# NXP/Freescale QorIQ SoC drivers
#
# end of NXP/Freescale QorIQ SoC drivers

#
# i.MX SoC drivers
#
# end of i.MX SoC drivers

#
# Qualcomm SoC drivers
#
# end of Qualcomm SoC drivers

CONFIG_SOC_TI=y

#
# Xilinx SoC drivers
#
# CONFIG_XILINX_VCU is not set
# end of Xilinx SoC drivers
# end of SOC (System On Chip) specific Drivers

# CONFIG_PM_DEVFREQ is not set
CONFIG_EXTCON=y

#
# Extcon Device Drivers
#
# CONFIG_EXTCON_FSA9480 is not set
CONFIG_EXTCON_GPIO=y
# CONFIG_EXTCON_MAX3355 is not set
CONFIG_EXTCON_PALMAS=y
# CONFIG_EXTCON_PTN5150 is not set
# CONFIG_EXTCON_RT8973A is not set
# CONFIG_EXTCON_SM5502 is not set
CONFIG_EXTCON_USB_GPIO=y
CONFIG_MEMORY=y
# CONFIG_TI_EMIF is not set
CONFIG_OMAP_GPMC=y
# CONFIG_OMAP_GPMC_DEBUG is not set
# CONFIG_TI_EMIF_SRAM is not set
# CONFIG_IIO is not set
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_FSL_FTM is not set
# CONFIG_PWM_OMAP_DMTIMER is not set
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_TIECAP=y
CONFIG_PWM_TIEHRPWM=y
CONFIG_PWM_TIPWMSS=y
CONFIG_PWM_TWL=y
CONFIG_PWM_TWL_LED=y

#
# IRQ chip support
#
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_MAX_NR=1
# CONFIG_AL_FIC is not set
CONFIG_OMAP_IRQCHIP=y
CONFIG_IRQ_CROSSBAR=y
# end of IRQ chip support

# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set

#
# PHY Subsystem
#
CONFIG_GENERIC_PHY=y
# CONFIG_BCM_KONA_USB2_PHY is not set
CONFIG_PHY_CADENCE_DP=m
# CONFIG_PHY_CADENCE_DPHY is not set
# CONFIG_PHY_FSL_IMX8MQ_USB is not set
# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_PHY_MAPPHONE_MDM6600 is not set
# CONFIG_PHY_OCELOT_SERDES is not set
# CONFIG_PHY_DM816X_USB is not set
CONFIG_OMAP_CONTROL_PHY=y
CONFIG_OMAP_USB2=y
CONFIG_TI_PIPE3=y
CONFIG_TWL4030_USB=y
CONFIG_PHY_TI_GMII_SEL=y
# end of PHY Subsystem

# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set

#
# Performance monitor support
#
# CONFIG_ARM_CCI_PMU is not set
# CONFIG_ARM_CCN is not set
CONFIG_ARM_PMU=y
# end of Performance monitor support

# CONFIG_RAS is not set

#
# Android
#
# CONFIG_ANDROID is not set
# end of Android

# CONFIG_DAX is not set
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y

#
# HW tracing support
#
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
# end of HW tracing support

# CONFIG_FPGA is not set
# CONFIG_FSI is not set
# CONFIG_TEE is not set
CONFIG_PM_OPP=y
# CONFIG_SIOX is not set
# CONFIG_SLIMBUS is not set
# CONFIG_INTERCONNECT is not set
# CONFIG_COUNTER is not set
# end of Device Drivers

#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
# CONFIG_VALIDATE_FS_PARSER is not set
CONFIG_FS_IOMAP=y
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_EXT4_FS=y
# CONFIG_EXT4_FS_POSIX_ACL is not set
# CONFIG_EXT4_FS_SECURITY is not set
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_FANOTIFY=y
# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_QUOTA_DEBUG is not set
CONFIG_QUOTA_TREE=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set

#
# Caches
#
# CONFIG_FSCACHE is not set
# end of Caches

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
# end of CD-ROM/DVD Filesystems

#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
# CONFIG_NTFS_FS is not set
# end of DOS/FAT/NT Filesystems

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_XATTR=y
CONFIG_MEMFD_CREATE=y
CONFIG_CONFIGFS_FS=y
# end of Pseudo filesystems

CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ORANGEFS_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_FS_XATTR=y
CONFIG_JFFS2_FS_POSIX_ACL=y
CONFIG_JFFS2_FS_SECURITY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_RTIME=y
CONFIG_JFFS2_RUBIN=y
# CONFIG_JFFS2_CMODE_NONE is not set
CONFIG_JFFS2_CMODE_PRIORITY=y
# CONFIG_JFFS2_CMODE_SIZE is not set
# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
CONFIG_UBIFS_FS=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_UBIFS_FS_ZSTD=y
# CONFIG_UBIFS_ATIME_SUPPORT is not set
CONFIG_UBIFS_FS_XATTR=y
CONFIG_UBIFS_FS_SECURITY=y
# CONFIG_UBIFS_FS_AUTHENTICATION is not set
CONFIG_CRAMFS=y
CONFIG_CRAMFS_BLOCKDEV=y
# CONFIG_CRAMFS_MTD is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_SWAP is not set
# CONFIG_NFS_V4_1 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
# CONFIG_UNICODE is not set
# end of File systems

#
# Security options
#
CONFIG_KEYS=y
# CONFIG_KEYS_REQUEST_CACHE is not set
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_BIG_KEYS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEY_DH_OPERATIONS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_PATH is not set
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_HARDENED_USERCOPY is not set
# CONFIG_FORTIFY_SOURCE is not set
# CONFIG_STATIC_USERMODEHELPER is not set
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
# CONFIG_SECURITY_LOADPIN is not set
# CONFIG_SECURITY_YAMA is not set
# CONFIG_SECURITY_SAFESETID is not set
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_LSM="yama,loadpin,safesetid,integrity"

#
# Kernel hardening options
#

#
# Memory initialization
#
CONFIG_INIT_STACK_NONE=y
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
# end of Memory initialization
# end of Kernel hardening options
# end of Security options

CONFIG_CRYPTO=y

#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_ACOMP2=y
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_USER is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_PCRYPT is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set

#
# Public-key cryptography
#
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_ECDH is not set
# CONFIG_CRYPTO_ECRDSA is not set

#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_AEGIS128 is not set
# CONFIG_CRYPTO_AEGIS128L is not set
# CONFIG_CRYPTO_AEGIS256 is not set
# CONFIG_CRYPTO_MORUS640 is not set
# CONFIG_CRYPTO_MORUS1280 is not set
# CONFIG_CRYPTO_SEQIV is not set
# CONFIG_CRYPTO_ECHAINIV is not set

#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CFB is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_OFB is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set
# CONFIG_CRYPTO_ADIANTUM is not set

#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set

#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_XXHASH is not set
CONFIG_CRYPTO_CRCT10DIF=y
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
CONFIG_CRYPTO_MICHAEL_MIC=y
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_SM3 is not set
# CONFIG_CRYPTO_STREEBOG is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set

#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_AES_TI is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SM4 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set

#
# Compression
#
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
CONFIG_CRYPTO_ZSTD=y

#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_DRBG_MENU is not set
# CONFIG_CRYPTO_JITTERENTROPY is not set
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# CONFIG_CRYPTO_DEV_OMAP is not set
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
# CONFIG_CRYPTO_DEV_CCREE is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set

#
# Certificates for signature checking
#
# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
# end of Certificates for signature checking

CONFIG_BINARY_PRINTF=y

#
# Library routines
#
# CONFIG_PACKING is not set
CONFIG_BITREVERSE=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
# CONFIG_CORDIC is not set
CONFIG_RATIONAL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC64 is not set
# CONFIG_CRC4 is not set
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
# CONFIG_CRC8 is not set
CONFIG_XXHASH=y
CONFIG_AUDIT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_BCH=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_DMA_DECLARE_COHERENT=y
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_CMA=y

#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8
CONFIG_DMA_API_DEBUG=y
CONFIG_DMA_API_DEBUG_SG=y
CONFIG_SGL_ALLOC=y
CONFIG_CPU_RMAP=y
CONFIG_DQL=y
CONFIG_GLOB=y
# CONFIG_GLOB_SELFTEST is not set
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
# CONFIG_IRQ_POLL is not set
CONFIG_DIMLIB=y
CONFIG_LIBFDT=y
CONFIG_OID_REGISTRY=y
CONFIG_SG_SPLIT=y
CONFIG_SG_POOL=y
CONFIG_SBITMAP=y
# CONFIG_STRING_SELFTEST is not set
# end of Library routines

#
# Kernel hacking
#

#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
# CONFIG_PRINTK_CALLER is not set
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_BOOT_PRINTK_DELAY is not set
CONFIG_DYNAMIC_DEBUG=y
# end of printk and dmesg options

#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_INFO_SPLIT=y
CONFIG_DEBUG_INFO_DWARF4=y
# CONFIG_DEBUG_INFO_BTF is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_INSTALL is not set
# CONFIG_OPTIMIZE_INLINING is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# end of Compile-time checks and compiler options

CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_MISC=y

#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
CONFIG_DEBUG_PAGEALLOC=y
# CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_PAGE_POISONING=y
# CONFIG_PAGE_POISONING_NO_SANITY is not set
# CONFIG_PAGE_POISONING_ZERO is not set
# CONFIG_DEBUG_PAGE_REF is not set
# CONFIG_DEBUG_RODATA_TEST is not set
# CONFIG_DEBUG_OBJECTS is not set
CONFIG_DEBUG_SLAB=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
# CONFIG_DEBUG_VIRTUAL is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_PER_CPU_MAPS is not set
# CONFIG_DEBUG_HIGHMEM is not set
CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_KASAN_STACK=1
# end of Memory Debugging

CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
CONFIG_DEBUG_SHIRQ=y

#
# Debug Lockups and Hangs
#
# CONFIG_SOFTLOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# end of Debug Lockups and Hangs

# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_SCHED_DEBUG=y
CONFIG_SCHED_INFO=y
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_STACK_END_CHECK=y
# CONFIG_DEBUG_TIMEKEEPING is not set
CONFIG_DEBUG_PREEMPT=y

#
# Lock Debugging (spinlocks, mutexes, etc...)
#
CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
# CONFIG_WW_MUTEX_SELFTEST is not set
# end of Lock Debugging (spinlocks, mutexes, etc...)

CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LIST=y
# CONFIG_DEBUG_PLIST is not set
CONFIG_DEBUG_SG=y
CONFIG_DEBUG_NOTIFIERS=y
# CONFIG_DEBUG_CREDENTIALS is not set

#
# RCU Debugging
#
# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# end of RCU Debugging

# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACE_CLOCK=y
CONFIG_RING_BUFFER=y
CONFIG_EVENT_TRACING=y
CONFIG_CONTEXT_SWITCH_TRACER=y
CONFIG_RING_BUFFER_ALLOW_SWAP=y
CONFIG_TRACING=y
CONFIG_TRACING_SUPPORT=y
CONFIG_FTRACE=y
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_PREEMPTIRQ_EVENTS is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_PREEMPT_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_HWLAT_TRACER is not set
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
# CONFIG_FTRACE_SYSCALLS is not set
# CONFIG_TRACER_SNAPSHOT is not set
CONFIG_BRANCH_PROFILE_NONE=y
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
# CONFIG_PROFILE_ALL_BRANCHES is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
CONFIG_KPROBE_EVENTS=y
CONFIG_UPROBE_EVENTS=y
CONFIG_DYNAMIC_EVENTS=y
CONFIG_PROBE_EVENTS=y
# CONFIG_TRACEPOINT_BENCHMARK is not set
# CONFIG_RING_BUFFER_BENCHMARK is not set
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
# CONFIG_TRACE_EVAL_MAP_FILE is not set
CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_TEST_SORT is not set
# CONFIG_KPROBES_SANITY_TEST is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_REED_SOLOMON_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_STRSCPY is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_BITFIELD is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_XARRAY is not set
# CONFIG_TEST_OVERFLOW is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_HASH is not set
# CONFIG_TEST_IDA is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_VMALLOC is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_BLACKHOLE_DEV is not set
# CONFIG_FIND_BIT_BENCHMARK is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_SYSCTL is not set
# CONFIG_TEST_UDELAY is not set
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_TEST_KMOD is not set
# CONFIG_TEST_MEMCAT_P is not set
# CONFIG_TEST_STACKINIT is not set
# CONFIG_TEST_MEMINIT is not set
# CONFIG_MEMTEST is not set
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_UBSAN_ALIGNMENT=y
CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
# CONFIG_STRICT_DEVMEM is not set
# CONFIG_ARM_PTDUMP_DEBUGFS is not set
# CONFIG_DEBUG_WX is not set
# CONFIG_UNWINDER_FRAME_POINTER is not set
CONFIG_UNWINDER_ARM=y
CONFIG_ARM_UNWIND=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_LL is not set
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
# CONFIG_ARM_KPROBES_TEST is not set
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_CORESIGHT is not set
# end of Kernel hacking

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30  6:45                       ` Tomi Valkeinen
@ 2019-09-30  8:53                         ` Tero Kristo
  2019-09-30 12:41                           ` Adam Ford
  2019-09-30 13:38                           ` H. Nikolaus Schaller
  0 siblings, 2 replies; 40+ messages in thread
From: Tero Kristo @ 2019-09-30  8:53 UTC (permalink / raw)
  To: Tomi Valkeinen, Adam Ford
  Cc: Tony Lindgren, Linux-OMAP, Adam Ford, Benoît Cousson,
	dri-devel, devicetree, Linux Kernel Mailing List

[-- Attachment #1: Type: text/plain, Size: 2582 bytes --]

On 30/09/2019 09:45, Tomi Valkeinen wrote:
> Hi,
> 
> On 27/09/2019 18:47, Tomi Valkeinen wrote:
>> On 27/09/2019 18:37, Tero Kristo wrote:
>>
>>> If you can provide details about what clock framework / driver does 
>>> wrong (sample clk_set_xyz call sequence, expected results via 
>>> clk_get_xyz, and what fails), I can take a look at it. Just reporting 
>>> arbitrary display driver issues I won't be able to debug at all (I 
>>> don't have access to any of the displays, nor do I want to waste time 
>>> debugging them without absolutely no knowledge whatsoever.)
>>
>> I used your hack patches to allow changing rates via debugfs. And set 
>> dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was 
>> that DSS gets some very high clock from dss1_alwon_fck_3430es2, as the 
>> frame rate jumps to many hundreds fps.
>>
>> So, these numbers are not real, but to give the idea what I saw. 
>> Running first with 50 MHz, I can see, say, 40 fps. Then I set the 
>> clock to 30 MHz, and fps dropped to, say, 30fps, as expected with 
>> lower clock. Then I set the clock to 27MHz (or the other one), 
>> expecting a bit lower fps, but instead I saw hundreds of fps.
>>
>> I don't know if there's any other way to observe the wrong clock rate 
>> but have the dss enabled and running kmstest or similar. I can help 
>> you set that up next week, should be trivial. You don't need a display 
>> for that.
> 
> Here's how to reproduce. I have the attached patches. Three of them are 
> the clk-debug ones, and one of mine to make it easy to test without a 
> display, and without underflow flood halting the device. There are on 
> top of v5.3. Kernel config also attached.
> 
> kmstest is from kms++ project (https://github.com/tomba/kmsxx). It 
> should be straightforward to compile, but kmstest binary is also 
> included in TI's rootfs.

Ok, I ignored all your test code and just fiddled with my trusty clk 
debugfs patches. I don't like debugging with test code I have no 
experience with. :)

Anyways, it seems the dpll4_m4_ck max divider value is wrong, it only 
accepts values upto 16 at least on my board. The setting for this in DT 
is 32, and it is most likely SoC specific what happens if you write an 
invalid value to the divider.

The best action here is probably to drop the max-div value for this 
clock to 16. Can someone check this with their display setup and see 
what happens? Attached patch should do the trick.

-Tero

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[-- Attachment #2: 0001-ARM-dts-omap3-fix-DPLL4-M4-divider-max-value.patch --]
[-- Type: text/x-patch, Size: 1057 bytes --]

From 28bfaaa3747e9033b6d4cd7bb06eb72dc04580a5 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Mon, 30 Sep 2019 11:49:39 +0300
Subject: [PATCH 1/1] ARM: dts: omap3: fix DPLL4 M4 divider max value

The maximum divider value for DPLL4 M4 divider appears wrong. For most
OMAP3 family SoCs this is 16, but it is defined as 32, which is maybe
only valid for omap36xx. To avoid any overflows in trying to write this
register, set the max to 16 for all omap3 family.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap3xxx-clocks.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 685c82a9d03e..0656c32439d2 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -416,7 +416,7 @@
 		#clock-cells = <0>;
 		compatible = "ti,divider-clock";
 		clocks = <&dpll4_ck>;
-		ti,max-div = <32>;
+		ti,max-div = <16>;
 		reg = <0x0e40>;
 		ti,index-starts-at-one;
 	};
-- 
2.17.1


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30  8:53                         ` Tero Kristo
@ 2019-09-30 12:41                           ` Adam Ford
  2019-09-30 12:47                             ` Tero Kristo
  2019-09-30 13:38                           ` H. Nikolaus Schaller
  1 sibling, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 12:41 UTC (permalink / raw)
  To: Tero Kristo
  Cc: Tomi Valkeinen, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

[-- Attachment #1: Type: text/plain, Size: 3565 bytes --]

On Mon, Sep 30, 2019 at 3:53 AM Tero Kristo <t-kristo@ti.com> wrote:
>
> On 30/09/2019 09:45, Tomi Valkeinen wrote:
> > Hi,
> >
> > On 27/09/2019 18:47, Tomi Valkeinen wrote:
> >> On 27/09/2019 18:37, Tero Kristo wrote:
> >>
> >>> If you can provide details about what clock framework / driver does
> >>> wrong (sample clk_set_xyz call sequence, expected results via
> >>> clk_get_xyz, and what fails), I can take a look at it. Just reporting
> >>> arbitrary display driver issues I won't be able to debug at all (I
> >>> don't have access to any of the displays, nor do I want to waste time
> >>> debugging them without absolutely no knowledge whatsoever.)
> >>
> >> I used your hack patches to allow changing rates via debugfs. And set
> >> dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was
> >> that DSS gets some very high clock from dss1_alwon_fck_3430es2, as the
> >> frame rate jumps to many hundreds fps.
> >>
> >> So, these numbers are not real, but to give the idea what I saw.
> >> Running first with 50 MHz, I can see, say, 40 fps. Then I set the
> >> clock to 30 MHz, and fps dropped to, say, 30fps, as expected with
> >> lower clock. Then I set the clock to 27MHz (or the other one),
> >> expecting a bit lower fps, but instead I saw hundreds of fps.
> >>
> >> I don't know if there's any other way to observe the wrong clock rate
> >> but have the dss enabled and running kmstest or similar. I can help
> >> you set that up next week, should be trivial. You don't need a display
> >> for that.
> >
> > Here's how to reproduce. I have the attached patches. Three of them are
> > the clk-debug ones, and one of mine to make it easy to test without a
> > display, and without underflow flood halting the device. There are on
> > top of v5.3. Kernel config also attached.
> >
> > kmstest is from kms++ project (https://github.com/tomba/kmsxx). It
> > should be straightforward to compile, but kmstest binary is also
> > included in TI's rootfs.
>
> Ok, I ignored all your test code and just fiddled with my trusty clk
> debugfs patches. I don't like debugging with test code I have no
> experience with. :)
>
> Anyways, it seems the dpll4_m4_ck max divider value is wrong, it only
> accepts values upto 16 at least on my board. The setting for this in DT
> is 32, and it is most likely SoC specific what happens if you write an
> invalid value to the divider.
>
> The best action here is probably to drop the max-div value for this
> clock to 16. Can someone check this with their display setup and see
> what happens? Attached patch should do the trick.

I tried your attached patch on my dm3730 and that seems to make it
somewhat better in that it doesn't hang anymore, so that leads me to
believe that your comment about the divider being only valid on the
omap36 may not be true. I do think it solves the hanging issue that i
was seeing, but I now see a new one now which is dumping a backtrace.

It looks like it's unhappy that its trying to get one frequency and
getting something different instead.

[   10.014099] WARNING: CPU: 0 PID: 111 at
drivers/gpu/drm/omapdrm/dss/dss.c:655 dss_set_fck_rate+0x70/0x90
[omapdss]
[   10.014129] clk rate mismatch: 27870968 != 27000000

See attached log for the full dump.

Either way, I think you've identified the main issue.  I just think we
may have uncovered another one in the process.

For what it's worth, the video looks good.  :-)

adam
>
> -Tero
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[-- Attachment #2: dm3730-480-272_at_9MHz.log --]
[-- Type: text/x-log, Size: 23582 bytes --]

Populating /dev using udev: [    4.750030] udevd[104]: starting version 3.2.7
[    4.810485] random: udevd: uninitialized urandom read (16 bytes read)
[    4.820434] random: udevd: uninitialized urandom read (16 bytes read)
[    4.827819] random: udevd: uninitialized urandom read (16 bytes read)
[    4.854064] udevd[104]: specified group 'kvm' unknown
[    4.907012] udevd[105]: starting eudev-3.2.7
[    5.676544] DSS: set fck to 172800000
[    5.680389] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    5.756744] at24 2-0050: GPIO lookup for consumer wp
[    5.761932] at24 2-0050: using device tree for GPIO lookup
[    5.767486] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    5.778228] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp@68000000/i2c@48060000/at24@50[0]'
[    5.788848] at24 2-0050: using lookup tables for GPIO lookup
[    5.794586] at24 2-0050: No GPIO consumer wp found
[    5.818359] omap_ssi 48058000.ssi-controller: ssi controller 0 initialized (2 ports)!
[    5.827270] omap_ssi_port 4805a000.ssi-port: GPIO lookup for consumer ti,ssi-cawake
[    5.835083] omap_ssi_port 4805a000.ssi-port: using device tree for GPIO lookup
[    5.842407] of_get_named_gpiod_flags: can't parse 'ti,ssi-cawake-gpios' property of node '/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    5.855895] of_get_named_gpiod_flags: can't parse 'ti,ssi-cawake-gpio' property of node '/ocp@68000000/ssi-controller@48058000/ssi-port@4805a000[0]'
[    5.869323] omap_ssi_port 4805a000.ssi-port: using lookup tables for GPIO lookup
[    5.876800] omap_ssi_port 4805a000.ssi-port: No GPIO consumer ti,ssi-cawake found
[    5.884338] omap_ssi_port 4805a000.ssi-port: couldn't get cawake gpio (err=-2)!
[    5.891754] omap_ssi_port: probe of 4805a000.ssi-port failed with error -2
[    5.898742] omap_ssi_port 4805b000.ssi-port: GPIO lookup for consumer ti,ssi-cawake
[    5.906494] omap_ssi_port 4805b000.ssi-port: using device tree for GPIO lookup
[    5.913787] of_get_named_gpiod_flags: can't parse 'ti,ssi-cawake-gpios' property of node '/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    5.927307] of_get_named_gpiod_flags: can't parse 'ti,ssi-cawake-gpio' property of node '/ocp@68000000/ssi-controller@48058000/ssi-port@4805b000[0]'
[    5.940734] omap_ssi_port 4805b000.ssi-port: using lookup tables for GPIO lookup
[    5.948181] omap_ssi_port 4805b000.ssi-port: No GPIO consumer ti,ssi-cawake found
[    5.955749] omap_ssi_port 4805b000.ssi-port: couldn't get cawake gpio (err=-2)!
[    5.963134] omap_ssi_port: probe of 4805b000.ssi-port failed with error -2
[    6.067626] usbcore: registered new interface driver usbfs
[    6.073364] usbcore: registered new interface driver hub
[    6.078857] usbcore: registered new device driver usb
[    6.088104] tsc2004 2-0048: GPIO lookup for consumer reset
[    6.093811] tsc2004 2-0048: using device tree for GPIO lookup
[    6.099609] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.110900] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/ocp@68000000/i2c@48060000/tsc2004@48[0]'
[    6.122070] tsc2004 2-0048: using lookup tables for GPIO lookup
[    6.128021] tsc2004 2-0048: No GPIO consumer reset found
[    6.182525] DSS: set fck to 172800000
[    6.186431] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    6.253326] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    6.261718] twl4030_keypad 48070000.i2c:twl@48:keypad: missing or malformed property linux,keymap: -22
[    6.271179] twl4030_keypad 48070000.i2c:twl@48:keypad: Failed to build keymap
[    6.278411] twl4030_keypad: probe of 48070000.i2c:twl@48:keypad failed with error -22
[    6.310852] ohci-platform: OHCI generic platform driver
[    6.317047] ohci-platform 48064400.ohci: Generic Platform OHCI controller
[    6.324096] ohci-platform 48064400.ohci: new USB bus registered, assigned bus number 1
[    6.385437] DSS: set fck to 172800000
[    6.389221] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    6.438140] at24 2-0050: 8192 byte 24c64 EEPROM, writable, 1 bytes/write
[    6.500213] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    6.506988] Warning! ehci_hcd should always be loaded before uhci_hcd and ohci_hcd, not after
[    6.522796] input: twl4030_pwrbutton as /devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:pwrbutton/input/input2
[    6.537628] DSS: set fck to 172800000
[    6.541595] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    6.704406] DSS: set fck to 172800000
[    6.708221] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    6.718444] input: TSC200X touchscreen as /devices/platform/68000000.ocp/48060000.i2c/i2c-2/2-0048/input/input0
[    6.735809] ehci-omap: OMAP-EHCI Host Controller driver
[    6.741882] ehci-omap 48064800.ehci: EHCI Host Controller
[    6.747344] ehci-omap 48064800.ehci: new USB bus registered, assigned bus number 2
[    6.817443] ohci-platform 48064400.ohci: irq 92, io mem 0x48064400
[    6.853332] DSS: set fck to 172800000
[    6.857147] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    7.002014] omap-mailbox 48094000.mailbox: omap mailbox rev 0x40
[    7.044067] twl_rtc 48070000.i2c:twl@48:rtc: Enabling TWL-RTC
[    7.053802] DSS: set fck to 172800000
[    7.057586] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    7.111419] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001, bcdDevice= 5.03
[    7.119750] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    7.127105] usb usb1: Product: Generic Platform OHCI controller
[    7.133117] usb usb1: Manufacturer: Linux 5.3.1-00005-ge3a0617a2226-dirty ohci_hcd
[    7.140716] usb usb1: SerialNumber: 48064400.ohci
[    7.204925] DSS: set fck to 172800000
[    7.208831] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    7.222839] twl_rtc 48070000.i2c:twl@48:rtc: registered as rtc0
[    7.236419] Driver for 1-wire Dallas network protocol.
[    7.305267] omap_hdq 480b2000.1w: OMAP HDQ Hardware Rev 0.5. Driver in Interrupt mode
[    7.333770] twl4030_usb 48070000.i2c:twl@48:twl4030-usb: Initialized TWL4030 USB module
[    7.343627] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
[    7.427154] hub 1-0:1.0: USB hub found
[    7.477081] hub 1-0:1.0: 3 ports detected
[    7.483337] ehci-omap 48064800.ehci: irq 93, io mem 0x48064800
[    7.493316] mc: Linux media interface: v0.10
[    7.537567] w1_master_driver w1_bus_master1: Attaching one wire slave 01.000000000000 crc 3d
[    7.547058] ehci-omap 48064800.ehci: USB 2.0 started, EHCI 1.00
[    7.554687] musb-hdrc musb-hdrc.0.auto: new USB bus registered, assigned bus number 3
[    7.611541] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.03
[    7.619964] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    7.627319] usb usb3: Product: MUSB HDRC host driver
[    7.632385] usb usb3: Manufacturer: Linux 5.3.1-00005-ge3a0617a2226-dirty musb-hcd
[    7.639984] usb usb3: SerialNumber: musb-hdrc.0.auto
[    7.678253] videodev: Linux video capture interface: v2.00
[    7.719543] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    7.801696] power_supply bq27000-battery: power_supply_get_battery_info currently only supports devicetree
[    8.057434] hub 3-0:1.0: USB hub found
[    8.112335] hub 3-0:1.0: 1 port detected
[    8.152954] pwm-backlight backlight: GPIO lookup for consumer enable
[    8.159362] pwm-backlight backlight: using device tree for GPIO lookup
[    8.166168] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node '/backlight[0]' - status (0)
[    8.175842] gpio gpiochip4: Persistence not supported for GPIO 26
[    8.182006] no flags found for enable
[    8.185760] pwm-backlight backlight: backlight supply power not found, using dummy regulator
[    8.226623] of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio_keys/sysboot2[0]' - status (0)
[    8.236724] gpio gpiochip0: Persistence not supported for GPIO 2
[    8.243164] of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio_keys/sysboot5[0]' - status (0)
[    8.253021] gpio gpiochip0: Persistence not supported for GPIO 7
[    8.259246] of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio_keys/gpio1[0]' - status (0)
[    8.268890] gpio gpiochip5: Persistence not supported for GPIO 21
[    8.275268] of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio_keys/gpio2[0]' - status (0)
[    8.284851] gpio gpiochip5: Persistence not supported for GPIO 18
[    8.291442] input: gpio_keys as /devices/platform/gpio_keys/input/input3
[    8.312042] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.03
[    8.320465] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    8.327819] usb usb2: Product: EHCI Host Controller
[    8.332763] usb usb2: Manufacturer: Linux 5.3.1-00005-ge3a0617a2226-dirty ehci_hcd
[    8.340362] usb usb2: SerialNumber: 48064800.ehci
[    8.363464] omap3isp 480bc000.isp: ignoring dependency for device, assuming no driver
[    8.401702] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/user0[0]' - status (0)
[    8.481384] no flags found for gpios
[    8.496459] of_get_named_gpiod_flags: can't parse 'ti,jack-det-gpio' property of node '/sound[0]'
[    8.506103] of_get_named_gpiod_flags: can't parse 'ti,hs_extmute_gpio' property of node '/ocp@68000000/i2c@48070000/twl@48/audio/codec[0]'
[    8.519866] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/led1[0]' - status (0)
[    8.529052] gpio gpiochip5: Persistence not supported for GPIO 20
[    8.535217] no flags found for gpios
[    8.539062] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/led2[0]' - status (0)
[    8.548156] gpio gpiochip5: Persistence not supported for GPIO 19
[    8.554321] no flags found for gpios
[    8.559722] DSS: set fck to 172800000
[    8.613586] hub 2-0:1.0: USB hub found
[    8.644805] hub 2-0:1.0: 3 ports detected
[    8.659240] panel-simple display: display supply power not found, using dummy regulator
[    8.667602] panel-simple display: GPIO lookup for consumer enable
[    8.673797] panel-simple display: using device tree for GPIO lookup
[    8.680145] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node '/display[0]' - status (0)
[    8.689666] gpio gpiochip4: Persistence not supported for GPIO 27
[    8.787048] omap-twl4030 sound: twl4030-hifi <-> 49022000.mcbsp mapping ok
[    8.835754] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy1 not found, using dummy regulator
[    8.845153] omap3isp 480bc000.isp: 480bc000.isp supply vdd-csiphy2 not found, using dummy regulator
[    8.854644] omap3isp 480bc000.isp: Revision 15.0 found
[    8.860443] omap-iommu 480bd400.mmu: 480bd400.mmu: version 1.1
[    8.866638] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP CCP2 was not initialized!
[    8.875518] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    8.916503] pwm-backlight backlight: GPIO lookup for consumer enable
[    8.923065] pwm-backlight backlight: using device tree for GPIO lookup
[    8.929687] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node '/backlight[0]' - status (0)
[    8.939361] gpio gpiochip4: Persistence not supported for GPIO 26
[    8.945526] no flags found for enable
[    8.949249] pwm-backlight backlight: backlight supply power not found, using dummy regulator
[    8.961090] panel-simple display: display supply power not found, using dummy regulator
[    8.969268] panel-simple display: GPIO lookup for consumer enable
[    8.975433] panel-simple display: using device tree for GPIO lookup
[    8.981781] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node '/display[0]' - status (0)
[    8.991271] gpio gpiochip4: Persistence not supported for GPIO 27
[    8.997985] DSS: set fck to 172800000
[    9.001800] omapdss_dss 48050000.dss: 48050000.dss supply vdda_video not found, using dummy regulator
[    9.096557] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP CSI2a was not initialized!
[    9.147949] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP CCDC was not initialized!
[    9.160583] mousedev: PS/2 mouse device common for all mice
[    9.202178] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP preview was not initialized!
[    9.243255] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP resizer was not initialized!
[    9.282623] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP AEWB was not initialized!
[    9.291381] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP AF was not initialized!
[    9.299774] omap3isp 480bc000.isp: Entity type for entity OMAP3 ISP histogram was not initialized!
[    9.433013] DSS: dss_runtime_get
[    9.436401] DSS: dss_restore_context
[    9.440002] DSS: OMAP DSS rev 2.0
[    9.443450] DSS: dss_runtime_put
[    9.446716] DSS: dss_save_context
[    9.450042] DSS: context saved
[    9.453826] DSS: dss_restore_context
[    9.457427] DSS: context restored
[    9.461578] DISPC: dispc_runtime_get
[    9.465209] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.472015] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.478759] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.485504] DISPC: dispc_restore_context
[    9.489440] DISPC: dispc_restore_gamma_tables()
[    9.494049] DISPC: fifo(0) threshold (bytes), old 960/1023, new 960/1023
[    9.500762] DISPC: fifo(1) threshold (bytes), old 960/1023, new 960/1023
[    9.507537] DISPC: fifo(2) threshold (bytes), old 960/1023, new 960/1023
[    9.514282] omapdss_dispc 48050400.dispc: OMAP DISPC rev 3.0
[    9.519989] DISPC: dispc_runtime_put
[    9.523590] DISPC: dispc_save_context
[    9.527313] DISPC: context saved
[    9.530731] omapdss_dss 48050000.dss: bound 48050400.dispc (ops hdmi5_configure [omapdss])
[    9.646362] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    9.721343] DSS: dss_save_context
[    9.724761] DSS: context saved
[    9.890411] omapdrm omapdrm.0: DMM not available, disable DMM support
[    9.897125] omapdss_dss 48050000.dss: connect(NULL, 48050000.dss)
[    9.903320] omapdss_dss 48050000.dss: connect(48050000.dss, NULL)
[    9.909576] DISPC: dispc_runtime_get
[    9.913330] DSS: dss_restore_context
[    9.916931] DSS: context restored
[    9.920288] DISPC: dispc_runtime_put
[    9.923919] DISPC: dispc_save_context
[    9.927642] DISPC: context saved
[    9.930999] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    9.937652] [drm] No driver support for vblank timestamp query.
[    9.956817] DSS: dss_save_context
[    9.960174] DSS: context saved
[    9.986236] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[   10.013671] DISPC: dispc_runtime_get
[   10.013763] DSS: dss_restore_context
[   10.013763] DSS: context restored
[   10.013824] DPI: dpi_set_timings
[   10.013854] DISPC: dispc_ovl_setup 0, pa 0x8e900000, pa_uv 0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1, chan 0 repl 1
[   10.013854] DISPC: scrw 480, width 480
[   10.013885] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[   10.013885] DISPC: 0,0 480x272 -> 480x272
[   10.013885] DISPC: dispc_enable_plane 0, 1
[   10.013916] DISPC: dispc_runtime_get
[   10.013946] DISPC: dispc_runtime_get
[   10.013946] DSS: set fck to 27000000
[   10.013977] ------------[ cut here ]------------
[   10.014099] WARNING: CPU: 0 PID: 111 at drivers/gpu/drm/omapdrm/dss/dss.c:655 dss_set_fck_rate+0x70/0x90 [omapdss]
[   10.014129] clk rate mismatch: 27870968 != 27000000
[   10.014129] Modules linked in: libarc4 omapdrm(+) sha256_generic drm_kms_helper sha256_arm cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt cfg80211 fb_sys_fops cfbcopyarea joydev mousedev evdev snd_soc_omap_twl4030 leds_gpio led_class panel_simple omap3_isp gpio_keys pwm_omap_dmtimer pwm_bl videobuf2_dma_contig cpufreq_dt videobuf2_memops videobuf2_v4l2 videobuf2_common v4l2_fwnode bq27xxx_battery_hdq snd_soc_omap_mcbsp bq27xxx_battery snd_soc_ti_sdma omap_wdt videodev mc omap_hdq wire cn wlcore_sdio hwmon phy_twl4030_usb omap2430 omap_mailbox musb_hdrc twl4030_wdt watchdog udc_core rtc_twl snd_soc_twl4030 ehci_omap snd_soc_core snd_pcm_dmaengine ehci_hcd snd_pcm snd_timer twl4030_pwrbutton snd pwm_twl_led soundcore ohci_platform twl4030_charger pwm_twl twl4030_keypad ohci_hcd industrialio matrix_keymap tsc2004 usbcore usb_common tsc200x_core omap_ssi at24 hsi omapdss omapdss_base drm drm_panel_orientation_quirks cec
[   10.014312] CPU: 0 PID: 111 Comm: udevd Not tainted 5.3.1-00005-ge3a0617a2226-dirty #11
[   10.014312] Hardware name: Generic OMAP36xx (Flattened Device Tree)
[   10.014343] [<c01122d8>] (unwind_backtrace) from [<c010c8b8>] (show_stack+0x10/0x14)
[   10.014373] [<c010c8b8>] (show_stack) from [<c089f1f8>] (dump_stack+0xb4/0xd4)
[   10.014373] [<c089f1f8>] (dump_stack) from [<c0139e58>] (__warn.part.3+0xa8/0xd4)
[   10.014404] [<c0139e58>] (__warn.part.3) from [<c0139ee0>] (warn_slowpath_fmt+0x5c/0x88)
[   10.014465] [<c0139ee0>] (warn_slowpath_fmt) from [<bf078d50>] (dss_set_fck_rate+0x70/0x90 [omapdss])
[   10.014587] [<bf078d50>] (dss_set_fck_rate [omapdss]) from [<bf06ef3c>] (dpi_display_enable+0x1a8/0x1d4 [omapdss])
[   10.014739] [<bf06ef3c>] (dpi_display_enable [omapdss]) from [<bf40ec24>] (omap_encoder_enable+0x2c/0x90 [omapdrm])
[   10.014923] [<bf40ec24>] (omap_encoder_enable [omapdrm]) from [<bf3f1828>] (drm_atomic_helper_commit_modeset_enables+0x218/0x254 [drm_kms_helper])
[   10.015045] [<bf3f1828>] (drm_atomic_helper_commit_modeset_enables [drm_kms_helper]) from [<bf40c3e4>] (omap_atomic_commit_tail+0xb4/0xc4 [omapdrm])
[   10.015136] [<bf40c3e4>] (omap_atomic_commit_tail [omapdrm]) from [<bf3f1914>] (commit_tail+0x44/0x70 [drm_kms_helper])
[   10.015228] [<bf3f1914>] (commit_tail [drm_kms_helper]) from [<bf3f1a00>] (drm_atomic_helper_commit+0xb8/0x128 [drm_kms_helper])
[   10.015472] [<bf3f1a00>] (drm_atomic_helper_commit [drm_kms_helper]) from [<bf03534c>] (drm_client_modeset_commit_atomic+0x164/0x1d4 [drm])
[   10.015686] [<bf03534c>] (drm_client_modeset_commit_atomic [drm]) from [<bf035414>] (drm_client_modeset_commit_force+0x58/0x184 [drm])
[   10.015838] [<bf035414>] (drm_client_modeset_commit_force [drm]) from [<bf3f68b8>] (drm_fb_helper_restore_fbdev_mode_unlocked+0x50/0xa4 [drm_kms_helper])
[   10.015930] [<bf3f68b8>] (drm_fb_helper_restore_fbdev_mode_unlocked [drm_kms_helper]) from [<bf3f6938>] (drm_fb_helper_set_par+0x2c/0x54 [drm_kms_helper])
[   10.015960] [<bf3f6938>] (drm_fb_helper_set_par [drm_kms_helper]) from [<c0567da0>] (fbcon_init+0x3f8/0x5cc)
[   10.015991] [<c0567da0>] (fbcon_init) from [<c05b1278>] (visual_init+0xb8/0x100)
[   10.016021] [<c05b1278>] (visual_init) from [<c05b3190>] (do_bind_con_driver+0x1f4/0x3d0)
[   10.016021] [<c05b3190>] (do_bind_con_driver) from [<c05b36c4>] (do_take_over_console+0x130/0x1e4)
[   10.016021] [<c05b36c4>] (do_take_over_console) from [<c0566acc>] (do_fbcon_takeover+0x60/0xc0)
[   10.016052] [<c0566acc>] (do_fbcon_takeover) from [<c055ed74>] (register_framebuffer+0x1bc/0x2d4)
[   10.016113] [<c055ed74>] (register_framebuffer) from [<bf3f60b0>] (__drm_fb_helper_initial_config_and_unlock+0x338/0x518 [drm_kms_helper])
[   10.016204] [<bf3f60b0>] (__drm_fb_helper_initial_config_and_unlock [drm_kms_helper]) from [<bf414a50>] (omap_fbdev_init+0x84/0xc4 [omapdrm])
[   10.016296] [<bf414a50>] (omap_fbdev_init [omapdrm]) from [<bf40c890>] (pdev_probe+0x49c/0x768 [omapdrm])
[   10.016357] [<bf40c890>] (pdev_probe [omapdrm]) from [<c05e128c>] (platform_drv_probe+0x48/0x98)
[   10.016357] [<c05e128c>] (platform_drv_probe) from [<c05df2d0>] (really_probe+0xec/0x2cc)
[   10.016387] [<c05df2d0>] (really_probe) from [<c05df634>] (driver_probe_device+0x5c/0x160)
[   10.016387] [<c05df634>] (driver_probe_device) from [<c05df8d8>] (device_driver_attach+0x58/0x60)
[   10.016418] [<c05df8d8>] (device_driver_attach) from [<c05df938>] (__driver_attach+0x58/0xcc)
[   10.016418] [<c05df938>] (__driver_attach) from [<c05dd764>] (bus_for_each_dev+0x70/0xb4)
[   10.016418] [<c05dd764>] (bus_for_each_dev) from [<c05de7ac>] (bus_add_driver+0x198/0x1d0)
[   10.016448] [<c05de7ac>] (bus_add_driver) from [<c05e03a0>] (driver_register+0x74/0x108)
[   10.016448] [<c05e03a0>] (driver_register) from [<c05e1474>] (__platform_register_drivers+0x54/0xd0)
[   10.016479] [<c05e1474>] (__platform_register_drivers) from [<c0102e80>] (do_one_initcall+0x48/0x224)
[   10.016479] [<c0102e80>] (do_one_initcall) from [<c01d6afc>] (do_init_module+0x5c/0x234)
[   10.016510] [<c01d6afc>] (do_init_module) from [<c01d8f5c>] (load_module+0x2200/0x24d0)
[   10.016510] [<c01d8f5c>] (load_module) from [<c01d9480>] (sys_finit_module+0xbc/0xdc)
[   10.016540] [<c01d9480>] (sys_finit_module) from [<c0101000>] (ret_fast_syscall+0x0/0x54)
[   10.016540] Exception stack(0xccb45fa8 to 0xccb45ff0)
[   10.016540] 5fa0:                   00000001 0006a6d8 00000011 b6eaa468 00000000 00000001
[   10.016571] 5fc0: 00000001 0006a6d8 0006ee40 0000017b 000659d8 befc59ec 00000000 00065c00
[   10.016571] 5fe0: befc5930 befc5920 b6ea1b84 b6e013f0
[   10.016693] ---[ end trace 1a95c980c8c997df ]---
[   10.016723] DISPC: lck = 27000000 (1)
[   10.016723] DISPC: pck = 9000000 (3)
[   10.018707] DISPC: channel 0 xres 480 yres 272
[   10.018737] DISPC: pck 9000000
[   10.018737] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
[   10.018737] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1 de_level 1 sync_pclk_edge -1
[   10.018737] DISPC: hsync 17077Hz, vsync 59Hz
[   10.474060] DISPC: dispc_runtime_put
[   10.474182] Console: switching to colour frame buffer device 60x34
[   10.474517] DISPC: dispc_runtime_get
[   10.474609] DISPC: dispc_ovl_setup 0, pa 0x8e900000, pa_uv 0x00000000, sw 480, 0,0, 480x272 -> 480x272, cmode 34325258, rot 1, chan 0 repl 1
[   10.474639] DISPC: scrw 480, width 480
[   10.474670] DISPC: offset0 0, offset1 0, row_inc 1, pix_inc 1
[   10.474670] DISPC: 0,0 480x272 -> 480x272
[   10.474700] DISPC: dispc_enable_plane 0, 1
[   10.474731] DISPC: GO LCD
[   10.476440] DISPC: dispc_runtime_put
[   11.160156] omapdrm omapdrm.0: fb0: omapdrmdrmfb frame buffer device
[   11.168426] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0
done
Initializing random number generator... [   11.261779] urandom_read: 1 callbacks suppressed
[   11.261779] random: dd: uninitialized urandom read (512 bytes read)
done.
Starting system message bus: [   11.331146] random: dbus-uuidgen: uninitialized urandom read (12 bytes read)
[   11.338470] random: dbus-uuidgen: uninitialized urandom read (8 bytes read)
done
Starting network: OK
[   11.543212] wlcore: WARNING Detected unconfigured mac address in nvs, derive from fuse instead.
[   11.552062] wlcore: WARNING Your device performance is not optimized.
[   11.558563] wlcore: WARNING Please use the calibrator tool to configure your device.
[   11.568878] wlcore: loaded

Welcome to Buildroot
buildroot login: 

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 12:41                           ` Adam Ford
@ 2019-09-30 12:47                             ` Tero Kristo
  2019-09-30 13:17                               ` Adam Ford
  0 siblings, 1 reply; 40+ messages in thread
From: Tero Kristo @ 2019-09-30 12:47 UTC (permalink / raw)
  To: Adam Ford
  Cc: Tomi Valkeinen, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 30/09/2019 15:41, Adam Ford wrote:
> On Mon, Sep 30, 2019 at 3:53 AM Tero Kristo <t-kristo@ti.com> wrote:
>>
>> On 30/09/2019 09:45, Tomi Valkeinen wrote:
>>> Hi,
>>>
>>> On 27/09/2019 18:47, Tomi Valkeinen wrote:
>>>> On 27/09/2019 18:37, Tero Kristo wrote:
>>>>
>>>>> If you can provide details about what clock framework / driver does
>>>>> wrong (sample clk_set_xyz call sequence, expected results via
>>>>> clk_get_xyz, and what fails), I can take a look at it. Just reporting
>>>>> arbitrary display driver issues I won't be able to debug at all (I
>>>>> don't have access to any of the displays, nor do I want to waste time
>>>>> debugging them without absolutely no knowledge whatsoever.)
>>>>
>>>> I used your hack patches to allow changing rates via debugfs. And set
>>>> dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was
>>>> that DSS gets some very high clock from dss1_alwon_fck_3430es2, as the
>>>> frame rate jumps to many hundreds fps.
>>>>
>>>> So, these numbers are not real, but to give the idea what I saw.
>>>> Running first with 50 MHz, I can see, say, 40 fps. Then I set the
>>>> clock to 30 MHz, and fps dropped to, say, 30fps, as expected with
>>>> lower clock. Then I set the clock to 27MHz (or the other one),
>>>> expecting a bit lower fps, but instead I saw hundreds of fps.
>>>>
>>>> I don't know if there's any other way to observe the wrong clock rate
>>>> but have the dss enabled and running kmstest or similar. I can help
>>>> you set that up next week, should be trivial. You don't need a display
>>>> for that.
>>>
>>> Here's how to reproduce. I have the attached patches. Three of them are
>>> the clk-debug ones, and one of mine to make it easy to test without a
>>> display, and without underflow flood halting the device. There are on
>>> top of v5.3. Kernel config also attached.
>>>
>>> kmstest is from kms++ project (https://github.com/tomba/kmsxx). It
>>> should be straightforward to compile, but kmstest binary is also
>>> included in TI's rootfs.
>>
>> Ok, I ignored all your test code and just fiddled with my trusty clk
>> debugfs patches. I don't like debugging with test code I have no
>> experience with. :)
>>
>> Anyways, it seems the dpll4_m4_ck max divider value is wrong, it only
>> accepts values upto 16 at least on my board. The setting for this in DT
>> is 32, and it is most likely SoC specific what happens if you write an
>> invalid value to the divider.
>>
>> The best action here is probably to drop the max-div value for this
>> clock to 16. Can someone check this with their display setup and see
>> what happens? Attached patch should do the trick.
> 
> I tried your attached patch on my dm3730 and that seems to make it
> somewhat better in that it doesn't hang anymore, so that leads me to
> believe that your comment about the divider being only valid on the
> omap36 may not be true. I do think it solves the hanging issue that i
> was seeing, but I now see a new one now which is dumping a backtrace.
> 
> It looks like it's unhappy that its trying to get one frequency and
> getting something different instead.
> 
> [   10.014099] WARNING: CPU: 0 PID: 111 at
> drivers/gpu/drm/omapdrm/dss/dss.c:655 dss_set_fck_rate+0x70/0x90
> [omapdss]
> [   10.014129] clk rate mismatch: 27870968 != 27000000

I believe this one is for Tomi to comment, his driver does some magic 
compares for the requested vs. actual received clock rates. If I am not 
mistaken, we are only modifying an integer divider here, and thus it is 
physically impossible to get accurate 27MHz rate to display.

-Tero

> 
> See attached log for the full dump.
> 
> Either way, I think you've identified the main issue.  I just think we
> may have uncovered another one in the process.
> 
> For what it's worth, the video looks good.  :-)
> 
> adam
>>
>> -Tero
>>
>> --

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 12:47                             ` Tero Kristo
@ 2019-09-30 13:17                               ` Adam Ford
  2019-09-30 13:35                                 ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 13:17 UTC (permalink / raw)
  To: Tero Kristo
  Cc: Tomi Valkeinen, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Mon, Sep 30, 2019 at 7:48 AM Tero Kristo <t-kristo@ti.com> wrote:
>
> On 30/09/2019 15:41, Adam Ford wrote:
> > On Mon, Sep 30, 2019 at 3:53 AM Tero Kristo <t-kristo@ti.com> wrote:
> >>
> >> On 30/09/2019 09:45, Tomi Valkeinen wrote:
> >>> Hi,
> >>>
> >>> On 27/09/2019 18:47, Tomi Valkeinen wrote:
> >>>> On 27/09/2019 18:37, Tero Kristo wrote:
> >>>>
> >>>>> If you can provide details about what clock framework / driver does
> >>>>> wrong (sample clk_set_xyz call sequence, expected results via
> >>>>> clk_get_xyz, and what fails), I can take a look at it. Just reporting
> >>>>> arbitrary display driver issues I won't be able to debug at all (I
> >>>>> don't have access to any of the displays, nor do I want to waste time
> >>>>> debugging them without absolutely no knowledge whatsoever.)
> >>>>
> >>>> I used your hack patches to allow changing rates via debugfs. And set
> >>>> dss1_alwon_fck_3430es2 to 27000000 or 27870967. The end result was
> >>>> that DSS gets some very high clock from dss1_alwon_fck_3430es2, as the
> >>>> frame rate jumps to many hundreds fps.
> >>>>
> >>>> So, these numbers are not real, but to give the idea what I saw.
> >>>> Running first with 50 MHz, I can see, say, 40 fps. Then I set the
> >>>> clock to 30 MHz, and fps dropped to, say, 30fps, as expected with
> >>>> lower clock. Then I set the clock to 27MHz (or the other one),
> >>>> expecting a bit lower fps, but instead I saw hundreds of fps.
> >>>>
> >>>> I don't know if there's any other way to observe the wrong clock rate
> >>>> but have the dss enabled and running kmstest or similar. I can help
> >>>> you set that up next week, should be trivial. You don't need a display
> >>>> for that.
> >>>
> >>> Here's how to reproduce. I have the attached patches. Three of them are
> >>> the clk-debug ones, and one of mine to make it easy to test without a
> >>> display, and without underflow flood halting the device. There are on
> >>> top of v5.3. Kernel config also attached.
> >>>
> >>> kmstest is from kms++ project (https://github.com/tomba/kmsxx). It
> >>> should be straightforward to compile, but kmstest binary is also
> >>> included in TI's rootfs.
> >>
> >> Ok, I ignored all your test code and just fiddled with my trusty clk
> >> debugfs patches. I don't like debugging with test code I have no
> >> experience with. :)
> >>
> >> Anyways, it seems the dpll4_m4_ck max divider value is wrong, it only
> >> accepts values upto 16 at least on my board. The setting for this in DT
> >> is 32, and it is most likely SoC specific what happens if you write an
> >> invalid value to the divider.
> >>
> >> The best action here is probably to drop the max-div value for this
> >> clock to 16. Can someone check this with their display setup and see
> >> what happens? Attached patch should do the trick.
> >
> > I tried your attached patch on my dm3730 and that seems to make it
> > somewhat better in that it doesn't hang anymore, so that leads me to
> > believe that your comment about the divider being only valid on the
> > omap36 may not be true. I do think it solves the hanging issue that i
> > was seeing, but I now see a new one now which is dumping a backtrace.
> >
> > It looks like it's unhappy that its trying to get one frequency and
> > getting something different instead.
> >
> > [   10.014099] WARNING: CPU: 0 PID: 111 at
> > drivers/gpu/drm/omapdrm/dss/dss.c:655 dss_set_fck_rate+0x70/0x90
> > [omapdss]
> > [   10.014129] clk rate mismatch: 27870968 != 27000000
>
> I believe this one is for Tomi to comment, his driver does some magic
> compares for the requested vs. actual received clock rates. If I am not
> mistaken, we are only modifying an integer divider here, and thus it is
> physically impossible to get accurate 27MHz rate to display.

I didn't expect exactly 27MHz,but the back trace is what concerns me more.

However, looking at
# cat clk/dpll4_ck/clk_rate
864000000

It seems like 864000000 / 32 would be 27 MHz, but instead we're
dividing it by 31 yielding 27870968.  I don't know the clocking
architecture, so I don't know what your patch actually did or how the
divide by 16 limit worked into this.  If lck cannot divide by 32, it
would be nice to see if it could divide by 27 to get to 32MHz.  From
there, the pck could then divide by 4 yielding 9MHz.

adam

>
> -Tero
>
> >
> > See attached log for the full dump.
> >
> > Either way, I think you've identified the main issue.  I just think we
> > may have uncovered another one in the process.
> >
> > For what it's worth, the video looks good.  :-)
> >
> > adam
> >>
> >> -Tero
> >>
> >> --
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 13:17                               ` Adam Ford
@ 2019-09-30 13:35                                 ` Tomi Valkeinen
  0 siblings, 0 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-30 13:35 UTC (permalink / raw)
  To: Adam Ford, Tero Kristo
  Cc: Tony Lindgren, Linux-OMAP, Adam Ford, Benoît Cousson,
	dri-devel, devicetree, Linux Kernel Mailing List

On 30/09/2019 16:17, Adam Ford wrote:

>>> It looks like it's unhappy that its trying to get one frequency and
>>> getting something different instead.
>>>
>>> [   10.014099] WARNING: CPU: 0 PID: 111 at
>>> drivers/gpu/drm/omapdrm/dss/dss.c:655 dss_set_fck_rate+0x70/0x90
>>> [omapdss]
>>> [   10.014129] clk rate mismatch: 27870968 != 27000000
>>
>> I believe this one is for Tomi to comment, his driver does some magic
>> compares for the requested vs. actual received clock rates. If I am not
>> mistaken, we are only modifying an integer divider here, and thus it is
>> physically impossible to get accurate 27MHz rate to display.
> 
> I didn't expect exactly 27MHz,but the back trace is what concerns me more.

Ah sorry... DSS driver knows the max divider value, so that it can 
iterate over all the rates to find a good one.

I'll send a patch later, but look for omap3630_dss_feats in dss.c, and 
change fck_div_max from 32 to 16.

> However, looking at
> # cat clk/dpll4_ck/clk_rate
> 864000000
> 
> It seems like 864000000 / 32 would be 27 MHz, but instead we're
> dividing it by 31 yielding 27870968.  I don't know the clocking
> architecture, so I don't know what your patch actually did or how the
> divide by 16 limit worked into this.  If lck cannot divide by 32, it
> would be nice to see if it could divide by 27 to get to 32MHz.  From
> there, the pck could then divide by 4 yielding 9MHz.

That's pretty odd. With Tero's patch (I didn't test it though) the max 
divider should be 16. So the minimum fclk rate should be 54MHz. But 
somehow the clock framework managed to produce 27870968...

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30  8:53                         ` Tero Kristo
  2019-09-30 12:41                           ` Adam Ford
@ 2019-09-30 13:38                           ` H. Nikolaus Schaller
  2019-09-30 13:54                             ` Adam Ford
  1 sibling, 1 reply; 40+ messages in thread
From: H. Nikolaus Schaller @ 2019-09-30 13:38 UTC (permalink / raw)
  To: Tero Kristo
  Cc: Tomi Valkeinen, Adam Ford, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List


> Am 30.09.2019 um 10:53 schrieb Tero Kristo <t-kristo@ti.com>:
> 
> The best action here is probably to drop the max-div value for this clock to 16. Can someone check this with their display setup and see what happens? Attached patch should do the trick.

I have checked on GTA04 and OpenPandora (DM3730 resp. OMAP3430) and did not notice a negative effect.

(Well, we never see the problem that is discussed here and have built with CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0).

BR,
Nikolaus


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 13:38                           ` H. Nikolaus Schaller
@ 2019-09-30 13:54                             ` Adam Ford
  2019-09-30 14:04                               ` Adam Ford
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 13:54 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: Tero Kristo, Tomi Valkeinen, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Mon, Sep 30, 2019 at 8:39 AM H. Nikolaus Schaller <hns@goldelico.com> wrote:
>
>
> > Am 30.09.2019 um 10:53 schrieb Tero Kristo <t-kristo@ti.com>:
> >
> > The best action here is probably to drop the max-div value for this clock to 16. Can someone check this with their display setup and see what happens? Attached patch should do the trick.
>
> I have checked on GTA04 and OpenPandora (DM3730 resp. OMAP3430) and did not notice a negative effect.
>
> (Well, we never see the problem that is discussed here and have built with CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0).

I have never been able to use CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0, but
I assume it's either a function of pck or a combination of pck with
the resolution.

Based on Tomi's comment, I assume he's working on the following.  Can
you also try:

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 5711b7a720e6..5e584f32ea6a 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -1090,7 +1090,7 @@ static const struct dss_features omap34xx_dss_feats = {

 static const struct dss_features omap3630_dss_feats = {
        .model                  =       DSS_MODEL_OMAP3,
-       .fck_div_max            =       32,
+       .fck_div_max            =       16,
        .fck_freq_max           =       173000000,
        .dss_fck_multiplier     =       1,
        .parent_clk_name        =       "dpll4_ck",


Hopefully it doesn't break the 3630 for you, but it fixed my issue
with no back trace:

[    9.915588] DSS: set fck to 54000000
[    9.915618] DISPC: lck = 54000000 (1)
[    9.915649] DISPC: pck = 9000000 (6)
[    9.917633] DISPC: channel 0 xres 480 yres 272
[    9.917663] DISPC: pck 9000000

I do wonder, however if there is a divider that is higher than 16, but
lower than 32.
I was able to run fck at 36MHz before with divide by 4 to 9MHz, so I
am hoping that by running at 54MHz / 6 doesn't draw more power.  I was
reading through the datasheet, but I could not find any reference to
the max divider.

adam
>
> BR,
> Nikolaus
>

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 13:54                             ` Adam Ford
@ 2019-09-30 14:04                               ` Adam Ford
  2019-09-30 14:12                                 ` Adam Ford
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 14:04 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: Tero Kristo, Tomi Valkeinen, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Mon, Sep 30, 2019 at 8:54 AM Adam Ford <aford173@gmail.com> wrote:
>
> On Mon, Sep 30, 2019 at 8:39 AM H. Nikolaus Schaller <hns@goldelico.com> wrote:
> >
> >
> > > Am 30.09.2019 um 10:53 schrieb Tero Kristo <t-kristo@ti.com>:
> > >
> > > The best action here is probably to drop the max-div value for this clock to 16. Can someone check this with their display setup and see what happens? Attached patch should do the trick.
> >
> > I have checked on GTA04 and OpenPandora (DM3730 resp. OMAP3430) and did not notice a negative effect.
> >
> > (Well, we never see the problem that is discussed here and have built with CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0).
>
> I have never been able to use CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0, but
> I assume it's either a function of pck or a combination of pck with
> the resolution.
>
> Based on Tomi's comment, I assume he's working on the following.  Can
> you also try:
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c
> b/drivers/gpu/drm/omapdrm/dss/dss.c
> index 5711b7a720e6..5e584f32ea6a 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dss.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dss.c
> @@ -1090,7 +1090,7 @@ static const struct dss_features omap34xx_dss_feats = {
>
>  static const struct dss_features omap3630_dss_feats = {
>         .model                  =       DSS_MODEL_OMAP3,
> -       .fck_div_max            =       32,
> +       .fck_div_max            =       16,
>         .fck_freq_max           =       173000000,
>         .dss_fck_multiplier     =       1,
>         .parent_clk_name        =       "dpll4_ck",
>
>
> Hopefully it doesn't break the 3630 for you, but it fixed my issue
> with no back trace:
>
> [    9.915588] DSS: set fck to 54000000
> [    9.915618] DISPC: lck = 54000000 (1)
> [    9.915649] DISPC: pck = 9000000 (6)
> [    9.917633] DISPC: channel 0 xres 480 yres 272
> [    9.917663] DISPC: pck 9000000
>
> I do wonder, however if there is a divider that is higher than 16, but
> lower than 32.
> I was able to run fck at 36MHz before with divide by 4 to 9MHz, so I
> am hoping that by running at 54MHz / 6 doesn't draw more power.  I was
> reading through the datasheet, but I could not find any reference to
> the max divider.
>

For run, I tested a max divider of 27, and I was able to get it
functional with a slower fck

[    9.939056] DSS: set fck to 36000000
[    9.939086] DISPC: lck = 36000000 (1)
[    9.939086] DISPC: pck = 9000000 (4)
[    9.941314] DISPC: channel 0 xres 480 yres 272
[    9.941314] DISPC: pck 9000000
[    9.941314] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
[    9.941314] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
de_level 1 sync_pclk_edge -1
[    9.941345] DISPC: hsync 17077Hz, vsync 59Hz


I don't know the implications, so if the people from TI say stick with
16, I'm fine with that, but at least there is some evidence that it
can be higher than 16, but lower than 32.

adam

> adam
> >
> > BR,
> > Nikolaus
> >

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 14:04                               ` Adam Ford
@ 2019-09-30 14:12                                 ` Adam Ford
  2019-09-30 14:20                                   ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 14:12 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: Tero Kristo, Tomi Valkeinen, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Mon, Sep 30, 2019 at 9:04 AM Adam Ford <aford173@gmail.com> wrote:
>
> On Mon, Sep 30, 2019 at 8:54 AM Adam Ford <aford173@gmail.com> wrote:
> >
> > On Mon, Sep 30, 2019 at 8:39 AM H. Nikolaus Schaller <hns@goldelico.com> wrote:
> > >
> > >
> > > > Am 30.09.2019 um 10:53 schrieb Tero Kristo <t-kristo@ti.com>:
> > > >
> > > > The best action here is probably to drop the max-div value for this clock to 16. Can someone check this with their display setup and see what happens? Attached patch should do the trick.
> > >
> > > I have checked on GTA04 and OpenPandora (DM3730 resp. OMAP3430) and did not notice a negative effect.
> > >
> > > (Well, we never see the problem that is discussed here and have built with CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0).
> >
> > I have never been able to use CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0, but
> > I assume it's either a function of pck or a combination of pck with
> > the resolution.
> >
> > Based on Tomi's comment, I assume he's working on the following.  Can
> > you also try:
> >
> > diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c
> > b/drivers/gpu/drm/omapdrm/dss/dss.c
> > index 5711b7a720e6..5e584f32ea6a 100644
> > --- a/drivers/gpu/drm/omapdrm/dss/dss.c
> > +++ b/drivers/gpu/drm/omapdrm/dss/dss.c
> > @@ -1090,7 +1090,7 @@ static const struct dss_features omap34xx_dss_feats = {
> >
> >  static const struct dss_features omap3630_dss_feats = {
> >         .model                  =       DSS_MODEL_OMAP3,
> > -       .fck_div_max            =       32,
> > +       .fck_div_max            =       16,
> >         .fck_freq_max           =       173000000,
> >         .dss_fck_multiplier     =       1,
> >         .parent_clk_name        =       "dpll4_ck",
> >
> >
> > Hopefully it doesn't break the 3630 for you, but it fixed my issue
> > with no back trace:
> >
> > [    9.915588] DSS: set fck to 54000000
> > [    9.915618] DISPC: lck = 54000000 (1)
> > [    9.915649] DISPC: pck = 9000000 (6)
> > [    9.917633] DISPC: channel 0 xres 480 yres 272
> > [    9.917663] DISPC: pck 9000000
> >
> > I do wonder, however if there is a divider that is higher than 16, but
> > lower than 32.
> > I was able to run fck at 36MHz before with divide by 4 to 9MHz, so I
> > am hoping that by running at 54MHz / 6 doesn't draw more power.  I was
> > reading through the datasheet, but I could not find any reference to
> > the max divider.
> >
>
> For run, I tested a max divider of 27, and I was able to get it
> functional with a slower fck
>
> [    9.939056] DSS: set fck to 36000000
> [    9.939086] DISPC: lck = 36000000 (1)
> [    9.939086] DISPC: pck = 9000000 (4)
> [    9.941314] DISPC: channel 0 xres 480 yres 272
> [    9.941314] DISPC: pck 9000000
> [    9.941314] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
> [    9.941314] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
> de_level 1 sync_pclk_edge -1
> [    9.941345] DISPC: hsync 17077Hz, vsync 59Hz
>
>
> I don't know the implications, so if the people from TI say stick with
> 16, I'm fine with that, but at least there is some evidence that it
> can be higher than 16, but lower than 32.
>

Sorry for all the spam, but I moved both of them to 31 from 32, and it
also seems to work successfully at 31.

[   26.923004] DSS: set fck to 36000000
[   26.923034] DISPC: lck = 36000000 (1)
[   26.923034] DISPC: pck = 9000000 (4)
[   26.925048] DISPC: channel 0 xres 480 yres 272
[   26.925048] DISPC: pck 9000000
[   26.925048] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
[   26.925079] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
de_level 1 sync_pclk_edge -1
[   26.925079] DISPC: hsync 17077Hz, vsync 59Hz
[   27.384613] DISPC: dispc_runtime_put

Is it possible to use 31?

adam

> adam
>
> > adam
> > >
> > > BR,
> > > Nikolaus
> > >

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 14:12                                 ` Adam Ford
@ 2019-09-30 14:20                                   ` Tomi Valkeinen
  2019-09-30 14:27                                     ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-30 14:20 UTC (permalink / raw)
  To: Adam Ford, H. Nikolaus Schaller
  Cc: Tero Kristo, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 30/09/2019 17:12, Adam Ford wrote:

>> I don't know the implications, so if the people from TI say stick with
>> 16, I'm fine with that, but at least there is some evidence that it
>> can be higher than 16, but lower than 32.
>>
> 
> Sorry for all the spam, but I moved both of them to 31 from 32, and it
> also seems to work successfully at 31.
> 
> [   26.923004] DSS: set fck to 36000000
> [   26.923034] DISPC: lck = 36000000 (1)
> [   26.923034] DISPC: pck = 9000000 (4)
> [   26.925048] DISPC: channel 0 xres 480 yres 272
> [   26.925048] DISPC: pck 9000000
> [   26.925048] DISPC: hsync_len 42 hfp 3 hbp 2 vsw 11 vfp 2 vbp 3
> [   26.925079] DISPC: vsync_level 1 hsync_level 1 data_pclk_edge 1
> de_level 1 sync_pclk_edge -1
> [   26.925079] DISPC: hsync 17077Hz, vsync 59Hz
> [   27.384613] DISPC: dispc_runtime_put
> 
> Is it possible to use 31?

Let's see what Tero says, but yeah, something is odd here. I expected 
the max divider to be 16 with Tero's patch, but I don't see it having 
that effect. I can get the div to 31.

You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The 
lowest bits are the divider, 5 to 0. The TRM says max div is 32.

Tero said for him the dividers > 16 didn't "stick" to the register. I'm 
now wondering if he has an old beagleboard with OMAP34xx, which has max 
div 16.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 14:20                                   ` Tomi Valkeinen
@ 2019-09-30 14:27                                     ` Tomi Valkeinen
  2019-09-30 14:56                                       ` H. Nikolaus Schaller
  2019-09-30 15:10                                       ` Adam Ford
  0 siblings, 2 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-09-30 14:27 UTC (permalink / raw)
  To: Adam Ford, H. Nikolaus Schaller
  Cc: Tero Kristo, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 30/09/2019 17:20, Tomi Valkeinen wrote:

> Let's see what Tero says, but yeah, something is odd here. I expected 
> the max divider to be 16 with Tero's patch, but I don't see it having 
> that effect. I can get the div to 31.
> 
> You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The 
> lowest bits are the divider, 5 to 0. The TRM says max div is 32.
> 
> Tero said for him the dividers > 16 didn't "stick" to the register. I'm 
> now wondering if he has an old beagleboard with OMAP34xx, which has max 
> div 16.

So testing a bit more here, I can see the DSS working fine and fps as 
expected when I write values directly to CM_CLKSEL_DSS:5:0, with 
dividers up to 31. With 32, DSS breaks. The TRM (AM/DM37x) says value 32 
is valid.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 14:27                                     ` Tomi Valkeinen
@ 2019-09-30 14:56                                       ` H. Nikolaus Schaller
  2019-09-30 15:10                                       ` Adam Ford
  1 sibling, 0 replies; 40+ messages in thread
From: H. Nikolaus Schaller @ 2019-09-30 14:56 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Adam Ford, Tero Kristo, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List


> Am 30.09.2019 um 16:27 schrieb Tomi Valkeinen <tomi.valkeinen@ti.com>:
> 
> On 30/09/2019 17:20, Tomi Valkeinen wrote:
> 
>> Let's see what Tero says, but yeah, something is odd here. I expected the max divider to be 16 with Tero's patch, but I don't see it having that effect. I can get the div to 31.
>> You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The lowest bits are the divider, 5 to 0. The TRM says max div is 32.
>> Tero said for him the dividers > 16 didn't "stick" to the register. I'm now wondering if he has an old beagleboard with OMAP34xx, which has max div 16.
> 
> So testing a bit more here, I can see the DSS working fine and fps as expected when I write values directly to CM_CLKSEL_DSS:5:0, with dividers up to 31. With 32, DSS breaks. The TRM (AM/DM37x) says value 32 is valid.

Just a blind guess: is there something in the errata to take care of?


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 14:27                                     ` Tomi Valkeinen
  2019-09-30 14:56                                       ` H. Nikolaus Schaller
@ 2019-09-30 15:10                                       ` Adam Ford
  2019-09-30 17:48                                         ` Tero Kristo
  1 sibling, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-09-30 15:10 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: H. Nikolaus Schaller, Tero Kristo, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Mon, Sep 30, 2019 at 9:27 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> On 30/09/2019 17:20, Tomi Valkeinen wrote:
>
> > Let's see what Tero says, but yeah, something is odd here. I expected
> > the max divider to be 16 with Tero's patch, but I don't see it having
> > that effect. I can get the div to 31.
> >
> > You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The
> > lowest bits are the divider, 5 to 0. The TRM says max div is 32.
> >
> > Tero said for him the dividers > 16 didn't "stick" to the register. I'm
> > now wondering if he has an old beagleboard with OMAP34xx, which has max
> > div 16.
>
> So testing a bit more here, I can see the DSS working fine and fps as
> expected when I write values directly to CM_CLKSEL_DSS:5:0, with
> dividers up to 31. With 32, DSS breaks. The TRM (AM/DM37x) says value 32
> is valid.

I wonder if it's somehow being masked with bits 4:0 instead of 5:0
which could potentially make the divider 0 and that value doesn't
appear to be valid.

adam

>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 15:10                                       ` Adam Ford
@ 2019-09-30 17:48                                         ` Tero Kristo
  2019-10-01  5:07                                           ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Tero Kristo @ 2019-09-30 17:48 UTC (permalink / raw)
  To: Adam Ford, Tomi Valkeinen
  Cc: H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 30/09/2019 18:10, Adam Ford wrote:
> On Mon, Sep 30, 2019 at 9:27 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>>
>> On 30/09/2019 17:20, Tomi Valkeinen wrote:
>>
>>> Let's see what Tero says, but yeah, something is odd here. I expected
>>> the max divider to be 16 with Tero's patch, but I don't see it having
>>> that effect. I can get the div to 31.
>>>
>>> You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The
>>> lowest bits are the divider, 5 to 0. The TRM says max div is 32.
>>>
>>> Tero said for him the dividers > 16 didn't "stick" to the register. I'm
>>> now wondering if he has an old beagleboard with OMAP34xx, which has max
>>> div 16.
>>
>> So testing a bit more here, I can see the DSS working fine and fps as
>> expected when I write values directly to CM_CLKSEL_DSS:5:0, with
>> dividers up to 31. With 32, DSS breaks. The TRM (AM/DM37x) says value 32
>> is valid.
> 
> I wonder if it's somehow being masked with bits 4:0 instead of 5:0
> which could potentially make the divider 0 and that value doesn't
> appear to be valid.

Hmmh, after some testing, it seems there is bad stuff happening with the 
divider clock implementation, I am re-working it as of now. Basically 
what is wrong is that with a divider max value of say 16, the driver 
attempts to craft the max value into a mask, but this ends up being 
0x1f. If the max value is 15, it ends up into 0xf which is correct.

-Tero
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-09-30 17:48                                         ` Tero Kristo
@ 2019-10-01  5:07                                           ` Tomi Valkeinen
  2019-10-01  5:12                                             ` Tero Kristo
  2019-10-01  8:12                                             ` Tero Kristo
  0 siblings, 2 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-10-01  5:07 UTC (permalink / raw)
  To: Tero Kristo, Adam Ford
  Cc: H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 30/09/2019 20:48, Tero Kristo wrote:

> Hmmh, after some testing, it seems there is bad stuff happening with the 
> divider clock implementation, I am re-working it as of now. Basically 
> what is wrong is that with a divider max value of say 16, the driver 
> attempts to craft the max value into a mask, but this ends up being 
> 0x1f. If the max value is 15, it ends up into 0xf which is correct.

Ok, that explains the max not working.

It doesn't explain the other issue, where the TRM says the max div is 
32, but it does not work. But taking the max div from the old SoCs, 16, 
is not correct either, as it seems that dividers up to 31 work ok.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-10-01  5:07                                           ` Tomi Valkeinen
@ 2019-10-01  5:12                                             ` Tero Kristo
  2019-10-01  8:12                                             ` Tero Kristo
  1 sibling, 0 replies; 40+ messages in thread
From: Tero Kristo @ 2019-10-01  5:12 UTC (permalink / raw)
  To: Tomi Valkeinen, Adam Ford
  Cc: H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 01/10/2019 08:07, Tomi Valkeinen wrote:
> On 30/09/2019 20:48, Tero Kristo wrote:
> 
>> Hmmh, after some testing, it seems there is bad stuff happening with 
>> the divider clock implementation, I am re-working it as of now. 
>> Basically what is wrong is that with a divider max value of say 16, 
>> the driver attempts to craft the max value into a mask, but this ends 
>> up being 0x1f. If the max value is 15, it ends up into 0xf which is 
>> correct.
> 
> Ok, that explains the max not working.
> 
> It doesn't explain the other issue, where the TRM says the max div is 
> 32, but it does not work. But taking the max div from the old SoCs, 16, 
> is not correct either, as it seems that dividers up to 31 work ok.

If someone knows for sure that dividers higher than 16 are fine on 
omap36xx, we can add this under omap36xx-clocks.dtsi. Anyway, let me fix 
the broken divider max logic first, that seems to be more pressing issue.

-Tero

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-10-01  5:07                                           ` Tomi Valkeinen
  2019-10-01  5:12                                             ` Tero Kristo
@ 2019-10-01  8:12                                             ` Tero Kristo
  2019-10-01  9:31                                               ` Tomi Valkeinen
  1 sibling, 1 reply; 40+ messages in thread
From: Tero Kristo @ 2019-10-01  8:12 UTC (permalink / raw)
  To: Tomi Valkeinen, Adam Ford
  Cc: H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

[-- Attachment #1: Type: text/plain, Size: 1081 bytes --]

On 01/10/2019 08:07, Tomi Valkeinen wrote:
> On 30/09/2019 20:48, Tero Kristo wrote:
> 
>> Hmmh, after some testing, it seems there is bad stuff happening with 
>> the divider clock implementation, I am re-working it as of now. 
>> Basically what is wrong is that with a divider max value of say 16, 
>> the driver attempts to craft the max value into a mask, but this ends 
>> up being 0x1f. If the max value is 15, it ends up into 0xf which is 
>> correct.
> 
> Ok, that explains the max not working.
> 
> It doesn't explain the other issue, where the TRM says the max div is 
> 32, but it does not work. But taking the max div from the old SoCs, 16, 
> is not correct either, as it seems that dividers up to 31 work ok.
> 
>   Tomi
> 

Ok, attached a series that hopefully fixes it, any testing feedback 
welcome before I post this properly.

This also supports omap36xx dpll4_m4_ck divider up-to 31, other omap3 
family is limited to 16.

-Tero


--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[-- Attachment #2: 0002-clk-ti-divider-cleanup-ti_clk_parse_divider_data-API.patch --]
[-- Type: text/x-patch, Size: 3103 bytes --]

From ac5652cc42860344c8daf00259a85debf5320763 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Mon, 30 Sep 2019 20:59:29 +0300
Subject: [PATCH 2/4] clk: ti: divider: cleanup ti_clk_parse_divider_data API

Cleanup the ti_clk_parse_divider_data to pass the divider data struct
directly instead of individual values of it. This makes it easier
to modify the implementation later on.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clkctrl.c |  2 +-
 drivers/clk/ti/clock.h   |  3 +--
 drivers/clk/ti/divider.c | 18 +++++++-----------
 3 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index 975995eea15c..665dfc5e309a 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -380,7 +380,7 @@ _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider,
 
 	if (ti_clk_parse_divider_data((int *)div_data->dividers, 0,
 				      div_data->max_div, div_flags,
-				      &div->width, &div->table)) {
+				      div)) {
 		pr_err("%s: Data parsing for %pOF:%04x:%d failed\n", __func__,
 		       node, offset, data->bit);
 		kfree(div);
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index e4b8392ff63c..f6b6876dfdee 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -220,8 +220,7 @@ void ti_clk_latch(struct clk_omap_reg *reg, s8 shift);
 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
 
 int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
-			      u8 flags, u8 *width,
-			      const struct clk_div_table **table);
+			      u8 flags, struct clk_omap_divider *div);
 
 int ti_clk_get_reg_addr(struct device_node *node, int index,
 			struct clk_omap_reg *reg);
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index d9f7dc94e2a6..39e890204156 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -338,8 +338,7 @@ static struct clk *_register_divider(struct device_node *node,
 }
 
 int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
-			      u8 flags, u8 *width,
-			      const struct clk_div_table **table)
+			      u8 flags, struct clk_omap_divider *divider)
 {
 	int valid_div = 0;
 	u32 val;
@@ -363,8 +362,7 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
 			val++;
 		}
 
-		*width = fls(val);
-		*table = NULL;
+		divider->width = fls(val);
 
 		return 0;
 	}
@@ -382,24 +380,22 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
 	num_dividers = i;
 
 	tmp = kcalloc(valid_div + 1, sizeof(*tmp), GFP_KERNEL);
-	if (!tmp) {
-		*table = ERR_PTR(-ENOMEM);
+	if (!tmp)
 		return -ENOMEM;
-	}
 
 	valid_div = 0;
-	*width = 0;
+	divider->width = 0;
 
 	for (i = 0; i < num_dividers; i++)
 		if (div_table[i] > 0) {
 			tmp[valid_div].div = div_table[i];
 			tmp[valid_div].val = i;
 			valid_div++;
-			*width = i;
+			divider->width = i;
 		}
 
-	*width = fls(*width);
-	*table = tmp;
+	divider->width = fls(divider->width);
+	divider->table = tmp;
 
 	return 0;
 }
-- 
2.17.1


[-- Attachment #3: 0003-clk-ti-divider-convert-to-use-min-max-mask-instead-o.patch --]
[-- Type: text/x-patch, Size: 8400 bytes --]

From 7f62f45d12cec77fd006ac37ab5e8a840274fc0f Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Tue, 1 Oct 2019 10:56:31 +0300
Subject: [PATCH 3/4] clk: ti: divider: convert to use min,max,mask instead of
 width

The existing width field used to check divider validity does not provide
enough protection against bad values. For example, if max divider value
is 4, the smallest all-1 bitmask that can hold this value is 7, which
allows values higher than 4 to be used. This typically causes
unpredictable results with hardware. So far this issue hasn't been
noticed as most of the dividers actually have maximum values which fit
the whole bitfield, but there are certain clocks for which this is a
problem, like dpll4_m4 divider on omap3 devices.

Thus, convert the whole validity logic to use min,max and mask values
for determining if a specific divider is valid or not. This prevents
the odd cases where bad value would otherwise be written to a divider
config register.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clock.h   |   4 +-
 drivers/clk/ti/divider.c | 151 ++++++++++++++++-----------------------
 2 files changed, 64 insertions(+), 91 deletions(-)

diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index f6b6876dfdee..e6995c04001e 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -20,9 +20,11 @@ struct clk_omap_divider {
 	struct clk_hw		hw;
 	struct clk_omap_reg	reg;
 	u8			shift;
-	u8			width;
 	u8			flags;
 	s8			latch;
+	u16			min;
+	u16			max;
+	u16			mask;
 	const struct clk_div_table	*table;
 	u32		context;
 };
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index 39e890204156..c75cc54772f6 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -26,30 +26,6 @@
 #undef pr_fmt
 #define pr_fmt(fmt) "%s: " fmt, __func__
 
-#define div_mask(d)	((1 << ((d)->width)) - 1)
-
-static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
-{
-	unsigned int maxdiv = 0;
-	const struct clk_div_table *clkt;
-
-	for (clkt = table; clkt->div; clkt++)
-		if (clkt->div > maxdiv)
-			maxdiv = clkt->div;
-	return maxdiv;
-}
-
-static unsigned int _get_maxdiv(struct clk_omap_divider *divider)
-{
-	if (divider->flags & CLK_DIVIDER_ONE_BASED)
-		return div_mask(divider);
-	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
-		return 1 << div_mask(divider);
-	if (divider->table)
-		return _get_table_maxdiv(divider->table);
-	return div_mask(divider) + 1;
-}
-
 static unsigned int _get_table_div(const struct clk_div_table *table,
 				   unsigned int val)
 {
@@ -61,6 +37,24 @@ static unsigned int _get_table_div(const struct clk_div_table *table,
 	return 0;
 }
 
+static void _setup_mask(struct clk_omap_divider *divider)
+{
+	u16 mask;
+	u32 max_val;
+
+	max_val = divider->max;
+
+	if (!(divider->flags & CLK_DIVIDER_ONE_BASED))
+		max_val--;
+
+	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
+		mask = fls(max_val) - 1;
+	else
+		mask = max_val;
+
+	divider->mask = (1 << fls(mask)) - 1;
+}
+
 static unsigned int _get_div(struct clk_omap_divider *divider, unsigned int val)
 {
 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
@@ -101,7 +95,7 @@ static unsigned long ti_clk_divider_recalc_rate(struct clk_hw *hw,
 	unsigned int div, val;
 
 	val = ti_clk_ll_ops->clk_readl(&divider->reg) >> divider->shift;
-	val &= div_mask(divider);
+	val &= divider->mask;
 
 	div = _get_div(divider, val);
 	if (!div) {
@@ -180,7 +174,7 @@ static int ti_clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
 	if (!rate)
 		rate = 1;
 
-	maxdiv = _get_maxdiv(divider);
+	maxdiv = divider->max;
 
 	if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
 		parent_rate = *best_parent_rate;
@@ -219,7 +213,7 @@ static int ti_clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
 	}
 
 	if (!bestdiv) {
-		bestdiv = _get_maxdiv(divider);
+		bestdiv = divider->max;
 		*best_parent_rate =
 			clk_hw_round_rate(clk_hw_get_parent(hw), 1);
 	}
@@ -249,17 +243,16 @@ static int ti_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
 	divider = to_clk_omap_divider(hw);
 
 	div = DIV_ROUND_UP(parent_rate, rate);
-	value = _get_val(divider, div);
 
-	if (value > div_mask(divider))
-		value = div_mask(divider);
+	if (div > divider->max)
+		div = divider->max;
+	if (div < divider->min)
+		div = divider->min;
 
-	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
-		val = div_mask(divider) << (divider->shift + 16);
-	} else {
-		val = ti_clk_ll_ops->clk_readl(&divider->reg);
-		val &= ~(div_mask(divider) << divider->shift);
-	}
+	value = _get_val(divider, div);
+
+	val = ti_clk_ll_ops->clk_readl(&divider->reg);
+	val &= ~(divider->mask << divider->shift);
 	val |= value << divider->shift;
 	ti_clk_ll_ops->clk_writel(val, &divider->reg);
 
@@ -280,7 +273,7 @@ static int clk_divider_save_context(struct clk_hw *hw)
 	u32 val;
 
 	val = ti_clk_ll_ops->clk_readl(&divider->reg) >> divider->shift;
-	divider->context = val & div_mask(divider);
+	divider->context = val & divider->mask;
 
 	return 0;
 }
@@ -297,7 +290,7 @@ static void clk_divider_restore_context(struct clk_hw *hw)
 	u32 val;
 
 	val = ti_clk_ll_ops->clk_readl(&divider->reg);
-	val &= ~(div_mask(divider) << divider->shift);
+	val &= ~(divider->mask << divider->shift);
 	val |= divider->context << divider->shift;
 	ti_clk_ll_ops->clk_writel(val, &divider->reg);
 }
@@ -341,29 +334,14 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
 			      u8 flags, struct clk_omap_divider *divider)
 {
 	int valid_div = 0;
-	u32 val;
-	int div;
 	int i;
 	struct clk_div_table *tmp;
+	u16 min_div = 0;
 
 	if (!div_table) {
-		if (flags & CLKF_INDEX_STARTS_AT_ONE)
-			val = 1;
-		else
-			val = 0;
-
-		div = 1;
-
-		while (div < max_div) {
-			if (flags & CLKF_INDEX_POWER_OF_TWO)
-				div <<= 1;
-			else
-				div++;
-			val++;
-		}
-
-		divider->width = fls(val);
-
+		divider->min = 1;
+		divider->max = max_div;
+		_setup_mask(divider);
 		return 0;
 	}
 
@@ -384,17 +362,21 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
 		return -ENOMEM;
 
 	valid_div = 0;
-	divider->width = 0;
 
 	for (i = 0; i < num_dividers; i++)
 		if (div_table[i] > 0) {
 			tmp[valid_div].div = div_table[i];
 			tmp[valid_div].val = i;
 			valid_div++;
-			divider->width = i;
+			if (tmp[valid_div].div > max_div)
+				max_div = tmp[valid_div].div;
+			if (!min_div || tmp[valid_div].div < min_div)
+				min_div = tmp[valid_div].div;
 		}
 
-	divider->width = fls(divider->width);
+	divider->min = min_div;
+	divider->max = max_div;
+	_setup_mask(divider);
 	divider->table = tmp;
 
 	return 0;
@@ -451,16 +433,15 @@ static int __init ti_clk_get_div_table(struct device_node *node,
 	return 0;
 }
 
-static int _get_divider_width(struct device_node *node,
-			      const struct clk_div_table *table,
-			      u8 flags)
+static int _populate_divider_min_max(struct device_node *node,
+				     struct clk_omap_divider *divider)
 {
-	u32 min_div;
-	u32 max_div;
-	u32 val = 0;
-	u32 div;
+	u32 min_div = 0;
+	u32 max_div = 0;
+	u32 val;
+	const struct clk_div_table *clkt;
 
-	if (!table) {
+	if (!divider->table) {
 		/* Clk divider table not provided, determine min/max divs */
 		if (of_property_read_u32(node, "ti,min-div", &min_div))
 			min_div = 1;
@@ -469,30 +450,22 @@ static int _get_divider_width(struct device_node *node,
 			pr_err("no max-div for %pOFn!\n", node);
 			return -EINVAL;
 		}
-
-		/* Determine bit width for the field */
-		if (flags & CLK_DIVIDER_ONE_BASED)
-			val = 1;
-
-		div = min_div;
-
-		while (div < max_div) {
-			if (flags & CLK_DIVIDER_POWER_OF_TWO)
-				div <<= 1;
-			else
-				div++;
-			val++;
-		}
 	} else {
-		div = 0;
 
-		while (table[div].div) {
-			val = table[div].val;
-			div++;
+		for (clkt = divider->table; clkt->div; clkt++) {
+			val = clkt->div;
+			if (val > max_div)
+				max_div = val;
+			if (!min_div || val < min_div)
+				min_div = val;
 		}
 	}
 
-	return fls(val);
+	divider->min = min_div;
+	divider->max = max_div;
+	_setup_mask(divider);
+
+	return 0;
 }
 
 static int __init ti_clk_divider_populate(struct device_node *node,
@@ -532,9 +505,7 @@ static int __init ti_clk_divider_populate(struct device_node *node,
 	if (ret)
 		return ret;
 
-	div->width = _get_divider_width(node, div->table, div->flags);
-
-	return 0;
+	return _populate_divider_min_max(node, div);
 }
 
 /**
-- 
2.17.1


[-- Attachment #4: 0004-ARM-dts-omap3-fix-DPLL4-M4-divider-max-value.patch --]
[-- Type: text/x-patch, Size: 1541 bytes --]

From 39a54036c7e653ab86384466803f78320332b1b5 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Mon, 30 Sep 2019 11:49:39 +0300
Subject: [PATCH 4/4] ARM: dts: omap3: fix DPLL4 M4 divider max value

The maximum divider value for DPLL4 M4 divider appears wrong. For most
OMAP3 family SoCs this is 16, but it is defined as 32, which is maybe
only valid for omap36xx. To avoid any overflows in trying to write this
register, set the max to 16 for all omap3 family, except omap36xx. For
omap36xx the maximum is set to 31, as it appears value 32 is not working
properly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap36xx-clocks.dtsi | 4 ++++
 arch/arm/boot/dts/omap3xxx-clocks.dtsi | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap36xx-clocks.dtsi
index e66fc57ec35d..4e9cc9003594 100644
--- a/arch/arm/boot/dts/omap36xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-clocks.dtsi
@@ -105,3 +105,7 @@
 			 <&mcbsp4_ick>, <&uart4_fck>;
 	};
 };
+
+&dpll4_m4_ck {
+	ti,max-div = <31>;
+};
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 685c82a9d03e..0656c32439d2 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -416,7 +416,7 @@
 		#clock-cells = <0>;
 		compatible = "ti,divider-clock";
 		clocks = <&dpll4_ck>;
-		ti,max-div = <32>;
+		ti,max-div = <16>;
 		reg = <0x0e40>;
 		ti,index-starts-at-one;
 	};
-- 
2.17.1


[-- Attachment #5: 0001-clk-ti-divider-cleanup-_register_divider-and-ti_clk_.patch --]
[-- Type: text/x-patch, Size: 6837 bytes --]

From 9171eba432a7d8677eb89ebed1f37c00ad9d8852 Mon Sep 17 00:00:00 2001
From: Tero Kristo <t-kristo@ti.com>
Date: Mon, 30 Sep 2019 20:50:24 +0300
Subject: [PATCH 1/4] clk: ti: divider: cleanup _register_divider and
 ti_clk_get_div_table

Cleanup couple of TI divider clock internal APIs. These currently pass
huge amount of parameters, which makes it difficult to track what is
going on. Abstract most of these under struct clk_omap_div which gets
passed over the APIs.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/divider.c | 113 ++++++++++++++-------------------------
 1 file changed, 41 insertions(+), 72 deletions(-)

diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index 6cb863c13648..d9f7dc94e2a6 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -310,47 +310,26 @@ const struct clk_ops ti_clk_divider_ops = {
 	.restore_context = clk_divider_restore_context,
 };
 
-static struct clk *_register_divider(struct device *dev, const char *name,
-				     const char *parent_name,
-				     unsigned long flags,
-				     struct clk_omap_reg *reg,
-				     u8 shift, u8 width, s8 latch,
-				     u8 clk_divider_flags,
-				     const struct clk_div_table *table)
+static struct clk *_register_divider(struct device_node *node,
+				     u32 flags,
+				     struct clk_omap_divider *div)
 {
-	struct clk_omap_divider *div;
 	struct clk *clk;
 	struct clk_init_data init;
+	const char *parent_name;
 
-	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
-		if (width + shift > 16) {
-			pr_warn("divider value exceeds LOWORD field\n");
-			return ERR_PTR(-EINVAL);
-		}
-	}
-
-	/* allocate the divider */
-	div = kzalloc(sizeof(*div), GFP_KERNEL);
-	if (!div)
-		return ERR_PTR(-ENOMEM);
+	parent_name = of_clk_get_parent_name(node, 0);
 
-	init.name = name;
+	init.name = node->name;
 	init.ops = &ti_clk_divider_ops;
 	init.flags = flags;
 	init.parent_names = (parent_name ? &parent_name : NULL);
 	init.num_parents = (parent_name ? 1 : 0);
 
-	/* struct clk_divider assignments */
-	memcpy(&div->reg, reg, sizeof(*reg));
-	div->shift = shift;
-	div->width = width;
-	div->latch = latch;
-	div->flags = clk_divider_flags;
 	div->hw.init = &init;
-	div->table = table;
 
 	/* register the clock */
-	clk = ti_clk_register(dev, &div->hw, name);
+	clk = ti_clk_register(NULL, &div->hw, node->name);
 
 	if (IS_ERR(clk))
 		kfree(div);
@@ -425,8 +404,8 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
 	return 0;
 }
 
-static struct clk_div_table *
-__init ti_clk_get_div_table(struct device_node *node)
+static int __init ti_clk_get_div_table(struct device_node *node,
+				       struct clk_omap_divider *div)
 {
 	struct clk_div_table *table;
 	const __be32 *divspec;
@@ -438,7 +417,7 @@ __init ti_clk_get_div_table(struct device_node *node)
 	divspec = of_get_property(node, "ti,dividers", &num_div);
 
 	if (!divspec)
-		return NULL;
+		return 0;
 
 	num_div /= 4;
 
@@ -453,13 +432,12 @@ __init ti_clk_get_div_table(struct device_node *node)
 
 	if (!valid_div) {
 		pr_err("no valid dividers for %pOFn table\n", node);
-		return ERR_PTR(-EINVAL);
+		return -EINVAL;
 	}
 
 	table = kcalloc(valid_div + 1, sizeof(*table), GFP_KERNEL);
-
 	if (!table)
-		return ERR_PTR(-ENOMEM);
+		return -ENOMEM;
 
 	valid_div = 0;
 
@@ -472,7 +450,9 @@ __init ti_clk_get_div_table(struct device_node *node)
 		}
 	}
 
-	return table;
+	div->table = table;
+
+	return 0;
 }
 
 static int _get_divider_width(struct device_node *node,
@@ -520,46 +500,43 @@ static int _get_divider_width(struct device_node *node,
 }
 
 static int __init ti_clk_divider_populate(struct device_node *node,
-	struct clk_omap_reg *reg, const struct clk_div_table **table,
-	u32 *flags, u8 *div_flags, u8 *width, u8 *shift, s8 *latch)
+					  struct clk_omap_divider *div,
+					  u32 *flags)
 {
 	u32 val;
 	int ret;
 
-	ret = ti_clk_get_reg_addr(node, 0, reg);
+	ret = ti_clk_get_reg_addr(node, 0, &div->reg);
 	if (ret)
 		return ret;
 
 	if (!of_property_read_u32(node, "ti,bit-shift", &val))
-		*shift = val;
+		div->shift = val;
 	else
-		*shift = 0;
+		div->shift = 0;
 
-	if (latch) {
-		if (!of_property_read_u32(node, "ti,latch-bit", &val))
-			*latch = val;
-		else
-			*latch = -EINVAL;
-	}
+	if (!of_property_read_u32(node, "ti,latch-bit", &val))
+		div->latch = val;
+	else
+		div->latch = -EINVAL;
 
 	*flags = 0;
-	*div_flags = 0;
+	div->flags = 0;
 
 	if (of_property_read_bool(node, "ti,index-starts-at-one"))
-		*div_flags |= CLK_DIVIDER_ONE_BASED;
+		div->flags |= CLK_DIVIDER_ONE_BASED;
 
 	if (of_property_read_bool(node, "ti,index-power-of-two"))
-		*div_flags |= CLK_DIVIDER_POWER_OF_TWO;
+		div->flags |= CLK_DIVIDER_POWER_OF_TWO;
 
 	if (of_property_read_bool(node, "ti,set-rate-parent"))
 		*flags |= CLK_SET_RATE_PARENT;
 
-	*table = ti_clk_get_div_table(node);
-
-	if (IS_ERR(*table))
-		return PTR_ERR(*table);
+	ret = ti_clk_get_div_table(node, div);
+	if (ret)
+		return ret;
 
-	*width = _get_divider_width(node, *table, *div_flags);
+	div->width = _get_divider_width(node, div->table, div->flags);
 
 	return 0;
 }
@@ -573,24 +550,17 @@ static int __init ti_clk_divider_populate(struct device_node *node,
 static void __init of_ti_divider_clk_setup(struct device_node *node)
 {
 	struct clk *clk;
-	const char *parent_name;
-	struct clk_omap_reg reg;
-	u8 clk_divider_flags = 0;
-	u8 width = 0;
-	u8 shift = 0;
-	s8 latch = -EINVAL;
-	const struct clk_div_table *table = NULL;
 	u32 flags = 0;
+	struct clk_omap_divider *div;
 
-	parent_name = of_clk_get_parent_name(node, 0);
+	div = kzalloc(sizeof(*div), GFP_KERNEL);
+	if (!div)
+		return;
 
-	if (ti_clk_divider_populate(node, &reg, &table, &flags,
-				    &clk_divider_flags, &width, &shift, &latch))
+	if (ti_clk_divider_populate(node, div, &flags))
 		goto cleanup;
 
-	clk = _register_divider(NULL, node->name, parent_name, flags, &reg,
-				shift, width, latch, clk_divider_flags, table);
-
+	clk = _register_divider(node, flags, div);
 	if (!IS_ERR(clk)) {
 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
 		of_ti_clk_autoidle_setup(node);
@@ -598,22 +568,21 @@ static void __init of_ti_divider_clk_setup(struct device_node *node)
 	}
 
 cleanup:
-	kfree(table);
+	kfree(div->table);
+	kfree(div);
 }
 CLK_OF_DECLARE(divider_clk, "ti,divider-clock", of_ti_divider_clk_setup);
 
 static void __init of_ti_composite_divider_clk_setup(struct device_node *node)
 {
 	struct clk_omap_divider *div;
-	u32 val;
+	u32 tmp;
 
 	div = kzalloc(sizeof(*div), GFP_KERNEL);
 	if (!div)
 		return;
 
-	if (ti_clk_divider_populate(node, &div->reg, &div->table, &val,
-				    &div->flags, &div->width, &div->shift,
-				    NULL) < 0)
+	if (ti_clk_divider_populate(node, div, &tmp))
 		goto cleanup;
 
 	if (!ti_clk_add_component(node, &div->hw, CLK_COMPONENT_TYPE_DIVIDER))
-- 
2.17.1


^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-10-01  8:12                                             ` Tero Kristo
@ 2019-10-01  9:31                                               ` Tomi Valkeinen
  2019-10-01 13:06                                                 ` Adam Ford
  0 siblings, 1 reply; 40+ messages in thread
From: Tomi Valkeinen @ 2019-10-01  9:31 UTC (permalink / raw)
  To: Tero Kristo, Adam Ford
  Cc: H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP, Adam Ford,
	Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 01/10/2019 11:12, Tero Kristo wrote:
> On 01/10/2019 08:07, Tomi Valkeinen wrote:
>> On 30/09/2019 20:48, Tero Kristo wrote:
>>
>>> Hmmh, after some testing, it seems there is bad stuff happening with 
>>> the divider clock implementation, I am re-working it as of now. 
>>> Basically what is wrong is that with a divider max value of say 16, 
>>> the driver attempts to craft the max value into a mask, but this ends 
>>> up being 0x1f. If the max value is 15, it ends up into 0xf which is 
>>> correct.
>>
>> Ok, that explains the max not working.
>>
>> It doesn't explain the other issue, where the TRM says the max div is 
>> 32, but it does not work. But taking the max div from the old SoCs, 
>> 16, is not correct either, as it seems that dividers up to 31 work ok.
>>
>>   Tomi
>>
> 
> Ok, attached a series that hopefully fixes it, any testing feedback 
> welcome before I post this properly.
> 
> This also supports omap36xx dpll4_m4_ck divider up-to 31, other omap3 
> family is limited to 16.

Works for me. This also needs the change to dss.c to change the max from 
32 to 31. I'll send a patch for that separately.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-10-01  9:31                                               ` Tomi Valkeinen
@ 2019-10-01 13:06                                                 ` Adam Ford
  2019-10-01 13:14                                                   ` Tomi Valkeinen
  0 siblings, 1 reply; 40+ messages in thread
From: Adam Ford @ 2019-10-01 13:06 UTC (permalink / raw)
  To: Tomi Valkeinen
  Cc: Tero Kristo, H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On Tue, Oct 1, 2019 at 4:31 AM Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
>
> On 01/10/2019 11:12, Tero Kristo wrote:
> > On 01/10/2019 08:07, Tomi Valkeinen wrote:
> >> On 30/09/2019 20:48, Tero Kristo wrote:
> >>
> >>> Hmmh, after some testing, it seems there is bad stuff happening with
> >>> the divider clock implementation, I am re-working it as of now.
> >>> Basically what is wrong is that with a divider max value of say 16,
> >>> the driver attempts to craft the max value into a mask, but this ends
> >>> up being 0x1f. If the max value is 15, it ends up into 0xf which is
> >>> correct.
> >>
> >> Ok, that explains the max not working.
> >>
> >> It doesn't explain the other issue, where the TRM says the max div is
> >> 32, but it does not work. But taking the max div from the old SoCs,
> >> 16, is not correct either, as it seems that dividers up to 31 work ok.
> >>
> >>   Tomi
> >>
> >
> > Ok, attached a series that hopefully fixes it, any testing feedback
> > welcome before I post this properly.
> >
> > This also supports omap36xx dpll4_m4_ck divider up-to 31, other omap3
> > family is limited to 16.

Thank you!  This works for me.

>
> Works for me. This also needs the change to dss.c to change the max from
> 32 to 31. I'll send a patch for that separately.

Tomi,

Do you want me to push a patch to remove the
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK hack once these patches have been
posted?  It seems like the divider fix eliminates the need for this
hack.

adam
>
>   Tomi
>
> --
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

* Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts
  2019-10-01 13:06                                                 ` Adam Ford
@ 2019-10-01 13:14                                                   ` Tomi Valkeinen
  0 siblings, 0 replies; 40+ messages in thread
From: Tomi Valkeinen @ 2019-10-01 13:14 UTC (permalink / raw)
  To: Adam Ford
  Cc: Tero Kristo, H. Nikolaus Schaller, Tony Lindgren, Linux-OMAP,
	Adam Ford, Benoît Cousson, dri-devel, devicetree,
	Linux Kernel Mailing List

On 01/10/2019 16:06, Adam Ford wrote:

> Do you want me to push a patch to remove the
> CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK hack once these patches have been
> posted?  It seems like the divider fix eliminates the need for this
> hack.

No, the point of OMAP2_DSS_MIN_FCK_PER_PCK was never to work around 
divider bugs. It's for scaling.

  Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 40+ messages in thread

end of thread, other threads:[~2019-10-01 13:15 UTC | newest]

Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-10 19:42 [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to dts Adam Ford
2019-05-28 11:11 ` Tomi Valkeinen
2019-05-28 15:09   ` Adam Ford
2019-05-28 15:20     ` H. Nikolaus Schaller
2019-05-28 15:53     ` Tomi Valkeinen
2019-05-31 12:13       ` Adam Ford
2019-09-25 20:51       ` Adam Ford
2019-09-26  6:55         ` Tomi Valkeinen
2019-09-26 14:12           ` Adam Ford
2019-09-27  6:21             ` Tomi Valkeinen
2019-09-27 12:13               ` Adam Ford
2019-09-27 13:45                 ` Tomi Valkeinen
2019-09-27  7:55             ` Tomi Valkeinen
2019-09-27 12:33               ` Adam Ford
2019-09-27 13:47                 ` Tomi Valkeinen
2019-09-27 15:37                   ` Tero Kristo
2019-09-27 15:47                     ` Tomi Valkeinen
2019-09-30  6:45                       ` Tomi Valkeinen
2019-09-30  8:53                         ` Tero Kristo
2019-09-30 12:41                           ` Adam Ford
2019-09-30 12:47                             ` Tero Kristo
2019-09-30 13:17                               ` Adam Ford
2019-09-30 13:35                                 ` Tomi Valkeinen
2019-09-30 13:38                           ` H. Nikolaus Schaller
2019-09-30 13:54                             ` Adam Ford
2019-09-30 14:04                               ` Adam Ford
2019-09-30 14:12                                 ` Adam Ford
2019-09-30 14:20                                   ` Tomi Valkeinen
2019-09-30 14:27                                     ` Tomi Valkeinen
2019-09-30 14:56                                       ` H. Nikolaus Schaller
2019-09-30 15:10                                       ` Adam Ford
2019-09-30 17:48                                         ` Tero Kristo
2019-10-01  5:07                                           ` Tomi Valkeinen
2019-10-01  5:12                                             ` Tero Kristo
2019-10-01  8:12                                             ` Tero Kristo
2019-10-01  9:31                                               ` Tomi Valkeinen
2019-10-01 13:06                                                 ` Adam Ford
2019-10-01 13:14                                                   ` Tomi Valkeinen
2019-09-25 21:26   ` Andrew F. Davis
2019-06-13 20:22 ` Rob Herring

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