From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A24ACC43214 for ; Mon, 2 Aug 2021 03:28:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 85A5A60BD3 for ; Mon, 2 Aug 2021 03:28:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232043AbhHBD2a (ORCPT ); Sun, 1 Aug 2021 23:28:30 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:34066 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231707AbhHBD22 (ORCPT ); Sun, 1 Aug 2021 23:28:28 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1627874899; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=JCB8vVm40Ygev3lb2qOV67F7cVZ3peAJ9oCE0yR1aSk=; b=TcTkiLfAW7p/lk3jQVgXe07DZxTkB7yNLdnAvv1YUmFF65LW9zcxBMGymJSpaZCdBSma9IQl zHWBsFvVPF+7P3G4YhxSmkvSKKF5MGHm/BrgyKV02xWcJa8UsfxtxocCfZ8AUVJMtYhKsy62 N6i+hTvjy3xQId5/O/4We4mWJzM= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-west-2.postgun.com with SMTP id 610766529771b05b24beec4a (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 02 Aug 2021 03:28:18 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 3CF53C43460; Mon, 2 Aug 2021 03:28:18 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7BC38C433F1; Mon, 2 Aug 2021 03:28:17 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 02 Aug 2021 08:58:17 +0530 From: Sibi Sankar To: Doug Anderson Cc: Bjorn Andersson , Matthias Kaehlcke , Viresh Kumar , Stephen Boyd , Andy Gross , Rob Herring , "Rafael J. Wysocki" , linux-arm-msm , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , Linux PM Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: sc7280: Add cpu OPP tables In-Reply-To: References: <1620807083-5451-1-git-send-email-sibis@codeaurora.org> <1620807083-5451-3-git-send-email-sibis@codeaurora.org> Message-ID: X-Sender: sibis@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-07-31 03:50, Doug Anderson wrote: > Hi, > > On Wed, May 12, 2021 at 1:11 AM Sibi Sankar > wrote: >> >> Add OPP tables required to scale DDR/L3 per freq-domain on SC7280 >> SoCs. >> >> Reviewed-by: Douglas Anderson >> Signed-off-by: Sibi Sankar >> --- >> >> V3: >> * Rename cpu opp table nodes [Matthias] >> * Rename opp phandles [Doug] >> >> Depends on the following patch series: >> L3 Provider Support: >> https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@codeaurora.org/ >> CPUfreq Support: >> https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@codeaurora.org/ >> RPMH Provider Support: >> https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@codeaurora.org/ >> Doug, 2 of the above 3 dependencies have landed. L3 provider still needs a re-spin. https://patchwork.kernel.org/project/linux-arm-msm/cover/1627581885-32165-1-git-send-email-sibis@codeaurora.org/ We also have a new series ^^ on the list which will affect #2 merge. >> It also depends on L3 and cpufreq dt nodes from the ^^ series to not >> have >> overlapping memory regions. >> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 >> +++++++++++++++++++++++++++++++++++ >> 1 file changed, 215 insertions(+) > > I see patch #1 in mainline now. Does that mean it's time to land patch > #2 in the Qualcomm tree now? ...or maybe it needs to be re-posted? > > -Doug -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.