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From: Lai Jiangshan <laijs@linux.alibaba.com>
To: Lai Jiangshan <jiangshanlai@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH 00/15] KVM: X86: Fix and clean up for register caches
Date: Thu, 18 Nov 2021 16:53:21 +0800	[thread overview]
Message-ID: <dc7cc86b-7606-573c-cfd6-86473fd67ab5@linux.alibaba.com> (raw)
In-Reply-To: <20211108124407.12187-1-jiangshanlai@gmail.com>

Hello,all

Ping

Thanks
Lai

On 2021/11/8 20:43, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@linux.alibaba.com>
> 
> The patchset was started when I read the code of nested_svm_load_cr3()
> and found that it marks CR3 available other than dirty when changing
> vcpu->arch.cr3.  I thought its caller has ensured that vmcs.GUEST_CR3
> will be or already be set to @cr3 so that it doesn't need to be marked
> dirty.  And later I found that it is not true and it must be a bug in
> a rare case before I realized that all the code just (ab)uses
> vcpu->arch.regs_avail for VCPU_EXREG_CR3 and there is not such bug
> of using regs_avail here.
> (The above finding becomes a low meaning patch_15 rather than a fix)
> 
> The unhappyness of the reading code made me do some cleanup for
> regs_avail and regs_dirty and kvm_register_xxx() functions in the hope
> that the code become clearer with less misunderstanding.
> 
> Major focus was on VCPU_EXREG_CR3 and VCPU_EXREG_PDPTR.  They are
> ensured to be marked the correct tags (available or dirty), and the
> value is ensured to be synced to architecture before run if it is marked
> dirty.
> 
> When cleaning VCPU_EXREG_PDPTR, I also checked if the corresponding
> cr0/cr4 pdptr bits are all intercepted when !tdp_enabled, and I think
> it is not clear enough, so X86_CR4_PDPTR_BITS is added as self-comments
> in the code.
> 
> Lai Jiangshan (15):
>    KVM: X86: Ensure the dirty PDPTEs to be loaded
>    KVM: VMX: Mark VCPU_EXREG_PDPTR available in ept_save_pdptrs()
>    KVM: SVM: Always clear available of VCPU_EXREG_PDPTR in svm_vcpu_run()
>    KVM: VMX: Add and use X86_CR4_TLB_BITS when !enable_ept
>    KVM: VMX: Add and use X86_CR4_PDPTR_BITS when !enable_ept
>    KVM: X86: Move CR0 pdptr_bits into header file as X86_CR0_PDPTR_BITS
>    KVM: SVM: Remove outdate comment in svm_load_mmu_pgd()
>    KVM: SVM: Remove useless check in svm_load_mmu_pgd()
>    KVM: SVM: Remove the unneeded code to mark available for CR3
>    KVM: X86: Mark CR3 dirty when vcpu->arch.cr3 is changed
>    KVM: VMX: Update vmcs.GUEST_CR3 only when the guest CR3 is dirty
>    KVM: VMX: Reset the bits that are meaningful to be reset in
>      vmx_register_cache_reset()
>    KVM: SVM: Add and use svm_register_cache_reset()
>    KVM: X86: Remove kvm_register_clear_available()
>    KVM: nVMX: Always write vmcs.GUEST_CR3 during nested VM-Exit
> 
>   arch/x86/kvm/kvm_cache_regs.h | 13 ++++++------
>   arch/x86/kvm/svm/nested.c     |  1 -
>   arch/x86/kvm/svm/svm.c        | 17 ++++++++--------
>   arch/x86/kvm/svm/svm.h        | 26 ++++++++++++++++++++++++
>   arch/x86/kvm/vmx/nested.c     | 30 ++++++++++++++++++----------
>   arch/x86/kvm/vmx/vmx.c        | 12 +++++++-----
>   arch/x86/kvm/vmx/vmx.h        | 37 +++++++++++++++++++++++++----------
>   arch/x86/kvm/x86.c            | 13 ++++++------
>   8 files changed, 101 insertions(+), 48 deletions(-)
> 

      parent reply	other threads:[~2021-11-18  8:54 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-08 12:43 [PATCH 00/15] KVM: X86: Fix and clean up for register caches Lai Jiangshan
2021-11-08 12:43 ` [PATCH 01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded Lai Jiangshan
2021-11-08 12:43 ` [PATCH 02/15] KVM: VMX: Mark VCPU_EXREG_PDPTR available in ept_save_pdptrs() Lai Jiangshan
2021-11-08 12:43 ` [PATCH 03/15] KVM: SVM: Always clear available of VCPU_EXREG_PDPTR in svm_vcpu_run() Lai Jiangshan
2021-11-08 12:43 ` [PATCH 04/15] KVM: VMX: Add and use X86_CR4_TLB_BITS when !enable_ept Lai Jiangshan
2021-11-18 15:18   ` Paolo Bonzini
2021-11-08 12:43 ` [PATCH 05/15] KVM: VMX: Add and use X86_CR4_PDPTR_BITS " Lai Jiangshan
2021-11-08 12:43 ` [PATCH 06/15] KVM: X86: Move CR0 pdptr_bits into header file as X86_CR0_PDPTR_BITS Lai Jiangshan
2021-11-08 12:43 ` [PATCH 07/15] KVM: SVM: Remove outdated comment in svm_load_mmu_pgd() Lai Jiangshan
2021-11-08 12:44 ` [PATCH 08/15] KVM: SVM: Remove useless check " Lai Jiangshan
2021-11-08 12:44 ` [PATCH 09/15] KVM: SVM: Remove the unneeded code to mark available for CR3 Lai Jiangshan
2021-11-18 15:17   ` Paolo Bonzini
2021-11-08 12:44 ` [PATCH 10/15] KVM: X86: Mark CR3 dirty when vcpu->arch.cr3 is changed Lai Jiangshan
2021-11-08 12:44 ` [PATCH 11/15] KVM: VMX: Update vmcs.GUEST_CR3 only when the guest CR3 is dirty Lai Jiangshan
2021-12-15 15:47   ` Maxim Levitsky
2021-12-15 16:31     ` Lai Jiangshan
2021-12-15 16:43       ` Lai Jiangshan
2021-12-15 16:45       ` Sean Christopherson
2021-12-15 17:10         ` Paolo Bonzini
2021-12-15 20:21         ` Maxim Levitsky
2021-12-15 20:20       ` Maxim Levitsky
2021-11-08 12:44 ` [PATCH 12/15] KVM: VMX: Reset the bits that are meaningful to be reset in vmx_register_cache_reset() Lai Jiangshan
2021-11-18 15:25   ` Paolo Bonzini
2021-11-08 12:44 ` [PATCH 13/15] KVM: SVM: Add and use svm_register_cache_reset() Lai Jiangshan
2021-11-18 15:37   ` Paolo Bonzini
2021-11-18 16:28     ` Lai Jiangshan
2021-11-18 17:54       ` Paolo Bonzini
2021-11-19  0:49         ` Lai Jiangshan
2021-11-08 12:44 ` [PATCH 14/15] KVM: X86: Remove kvm_register_clear_available() Lai Jiangshan
2021-11-08 12:44 ` [PATCH 15/15] KVM: nVMX: Always write vmcs.GUEST_CR3 during nested VM-Exit Lai Jiangshan
2021-11-18 15:52   ` Paolo Bonzini
2021-11-11 14:45 ` [PATCH 16/15] KVM: X86: Update mmu->pdptrs only when it is changed Lai Jiangshan
2021-12-07 23:43   ` Sean Christopherson
2021-12-08  3:29     ` Lai Jiangshan
2021-12-08  9:09     ` Paolo Bonzini
2021-12-08  9:34       ` Lai Jiangshan
2021-11-11 14:46 ` [PATCH 17/15] KVM: X86: Ensure pae_root to be reconstructed for shadow paging if the guest PDPTEs " Lai Jiangshan
2021-11-23  9:34   ` Lai Jiangshan
2021-12-08  0:15   ` Sean Christopherson
2021-12-08  4:00     ` Lai Jiangshan
2021-12-08 15:29       ` Sean Christopherson
2021-12-09 22:46     ` Paolo Bonzini
2021-12-10 21:07       ` Sean Christopherson
2021-12-10 21:08         ` Sean Christopherson
2021-12-11  6:56         ` Maxim Levitsky
2021-12-11  8:22           ` Paolo Bonzini
2021-12-13 16:54             ` Sean Christopherson
2021-11-18  8:53 ` Lai Jiangshan [this message]

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