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From: Yixun Lan <yixun.lan@amlogic.com>
To: Mark Brown <broonie@kernel.org>
Cc: <yixun.lan@amlogic.com>, Sunny Luo <sunny.luo@amlogic.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Carlo Caione <carlo@caione.org>, <linux-spi@vger.kernel.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] spi: meson-axg: add a linear clock divider support
Date: Fri, 4 May 2018 10:07:12 +0800	[thread overview]
Message-ID: <e5610b7f-9e34-3925-cb40-1c62a3c470d2@amlogic.com> (raw)
In-Reply-To: <20180503231604.GD13402@sirena.org.uk>

Hi Mark

On 05/04/18 07:16, Mark Brown wrote:
> On Thu, May 03, 2018 at 09:36:44PM +0000, Yixun Lan wrote:
>> From: Sunny Luo <sunny.luo@amlogic.com>
>>
>> The SPICC controller in Meson-AXG SoC is capable of using
>> a linear clock divider to reach a much fine tuned range of clocks,
>> while the old controller only use a power of two clock divider,
>> result at a more coarse clock range.
>>
>> Also convert the clock registeration into Common Clock Framework.
> 
> This would be better split into two patches - one adding the new linear
> clock divider and the other one doing the CCF conversion.  Splitting
> things out like that makes them much easier to review as each change is
> only doing one thing.
> 

it's maybe obscure in my previous commit message, the clock divider
support is actually achieved via CCF framework, it can be split as two
independent patches..

I'm CCing clock mailing list (will do if I need to send a v2)

Yixun

  reply	other threads:[~2018-05-04  2:07 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-03 21:36 [PATCH 0/3] spi: meson-axg: add few enhanced features Yixun Lan
2018-05-03 21:36 ` [PATCH 1/3] spi: meson-axg: support MAX 80M clock Yixun Lan
2018-05-03 23:13   ` Mark Brown
2018-05-04  1:56     ` Yixun Lan
2018-05-05  0:58       ` Mark Brown
2018-05-03 21:36 ` [PATCH 2/3] spi: meson-axg: enhance output enable feature Yixun Lan
2018-05-03 21:36 ` [PATCH 3/3] spi: meson-axg: add a linear clock divider support Yixun Lan
2018-05-03 23:16   ` Mark Brown
2018-05-04  2:07     ` Yixun Lan [this message]
2018-05-04  2:22   ` kbuild test robot
2018-05-04  2:46   ` kbuild test robot

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