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From: Ming Qian <ming.qian@nxp.com>
To: mchehab@kernel.org, shawnguo@kernel.org, robh+dt@kernel.org,
s.hauer@pengutronix.de
Cc: hverkuil-cisco@xs4all.nl, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, aisheng.dong@nxp.com,
linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 02/14] media:Add nt8 and nt10 video format.
Date: Tue, 27 Jul 2021 11:20:45 +0800 [thread overview]
Message-ID: <ee482c18fdaae121e3c9495d07b0f3eb1661e36e.1627353315.git.ming.qian@nxp.com> (raw)
In-Reply-To: <cover.1627353315.git.ming.qian@nxp.com>
NT8 is 8-bit tiled nv12 format used by amphion decoder.
NT10 is 10-bit tiled format used by amphion decoder.
The tile size is 8x128
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
.../userspace-api/media/v4l/pixfmt-reserved.rst | 15 +++++++++++++++
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 2 ++
3 files changed, 19 insertions(+)
diff --git a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
index c9231e18859b..2deae49210a7 100644
--- a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
+++ b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
@@ -256,3 +256,18 @@ please make a proposal on the linux-media mailing list.
of tiles, resulting in 32-aligned resolutions for the luminance plane
and 16-aligned resolutions for the chrominance plane (with 2x2
subsampling).
+ * .. _V4L2-PIX-FMT-NT8:
+
+ - ``V4L2_PIX_FMT_NT8``
+ - 'NA12'
+ - Two-planar NV12-based format used by the video engine found on Amphion decoder,
+ with 8x128 tiles for the luminance plane and chrominance plane.
+ The number of bytes in one luminance or chrominance row must be divisible by 256.
+ * .. _V4L2-PIX-FMT-NT10:
+
+ - ``V4L2_PIX_FMT_NT10``
+ - 'NT12'
+ - NT10 is a tiled YUV format with 10-bits per pixel with interleaved UV.
+ It's used by the video engine found on Amphion decoder,
+ with 8x128 tiles for the luminance plane and chrominance plane.
+ The number of bytes in one luminance or chrominance row must be divisible by 256.
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index eeff398fbdcc..34e6415e5722 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1402,6 +1402,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
+ case V4L2_PIX_FMT_NT8: descr = "Amphion Tiled 8x128 NV12"; break;
+ case V4L2_PIX_FMT_NT10: descr = "Amphion Tiled 8x128 10-bit"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 534eaa4d39bc..4836590a690c 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -740,6 +740,8 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */
#define V4L2_PIX_FMT_SUNXI_TILED_NV12 v4l2_fourcc('S', 'T', '1', '2') /* Sunxi Tiled NV12 Format */
#define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */
+#define V4L2_PIX_FMT_NT8 v4l2_fourcc('N', 'A', '1', '2') /* Amphion Tiled 8x128 NV12 Format */
+#define V4L2_PIX_FMT_NT10 v4l2_fourcc('N', 'T', '1', '2') /* Amphion Tiled 8x128 10 bit Format */
/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */
#define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */
--
2.32.0
next prev parent reply other threads:[~2021-07-27 3:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-27 3:20 [PATCH v5 00/14] imx8q video decoder/encoder driver Ming Qian
2021-07-27 3:20 ` [PATCH v5 01/14] dt-bindings: media: imx8q: add imx video codec bindings Ming Qian
2021-08-02 19:33 ` Rob Herring
2021-07-27 3:20 ` Ming Qian [this message]
2021-07-27 17:58 ` [PATCH v5 02/14] media:Add nt8 and nt10 video format Nicolas Dufresne
2021-07-27 18:03 ` Ezequiel Garcia
2021-07-28 1:41 ` [EXT] " Ming Qian
2021-07-27 3:20 ` [PATCH v5 03/14] media:Add v4l2 buf flag codec data Ming Qian
2021-07-27 3:20 ` [PATCH v5 04/14] media: imx: imx8q: add imx8q vpu device driver Ming Qian
2021-07-27 3:20 ` [PATCH v5 05/14] media: imx: imx8q: add vpu core driver Ming Qian
2021-07-27 3:20 ` [PATCH v5 06/14] media: imx: imx8q: implement vpu core communication based on mailbox Ming Qian
2021-07-27 3:20 ` [PATCH v5 07/14] media: imx: imx8q: add vpu v4l2 m2m support Ming Qian
2021-07-27 3:20 ` [PATCH v5 08/14] media: imx: imx8q: add v4l2 m2m vpu encoder stateful driver Ming Qian
2021-07-27 3:20 ` [PATCH v5 09/14] media: imx: imx8q: add v4l2 m2m vpu decoder " Ming Qian
2021-07-27 3:20 ` [PATCH v5 10/14] media: imx: imx8q: implement windsor encoder rpc interface Ming Qian
2021-07-27 3:20 ` [PATCH v5 11/14] media: imx: imx8q: implement malone decoder " Ming Qian
2021-07-27 3:20 ` [PATCH v5 12/14] ARM64: dts: freescale: imx8q: add imx vpu codec entries Ming Qian
2021-07-27 3:20 ` [PATCH v5 13/14] firmware: imx: scu-pd: imx8q: add vpu mu resources Ming Qian
2021-07-27 3:20 ` [PATCH v5 14/14] MAINTAINERS: add NXP IMX8Q VPU CODEC V4L2 driver entry Ming Qian
2021-07-28 3:27 ` Joe Perches
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