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From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: Rob Herring <robh@kernel.org>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"kishon@ti.com" <kishon@ti.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 01/10] bindings: PCI: designware: Example update
Date: Tue, 17 Apr 2018 14:47:39 +0100	[thread overview]
Message-ID: <f62b174f-23a6-992f-90ec-223aa9b44e0d@synopsys.com> (raw)
In-Reply-To: <20180416213919.blju6rzkq5md62q4@rob-hp-laptop>

Hi Rob,

On 16/04/2018 22:39, Rob Herring wrote:
> On Mon, Apr 16, 2018 at 03:37:49PM +0100, Gustavo Pimentel wrote:
>> Replaces "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
>> however it still be compatible with any previous DT that uses the old
>> reg-name.
>>
>> Replaces the PCIe base address example by a real PCIe base address in use.
>>
>> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>> ---
>> Changes v1->v2:
>>  - Removed any iATU reference or changes to avoid confusion.
>>  - Add "snps,dw-pcie" compatible string following Kishon's suggestion.
>> Changes v2->v3:
>> - Nothing changed, just to follow the patch set version.
>> Changes v3->v4:
>> - Reverted "snps,dw-pcie-rc" compatible string requested by Rob Herring.
>>
>>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 12 ++++++------
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> index 1da7ade..7f9804d 100644
>> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> @@ -1,7 +1,8 @@
>>  * Synopsys DesignWare PCIe interface
>>  
>>  Required properties:
>> -- compatible: should contain "snps,dw-pcie" to identify the core.
>> +- compatible:
>> +	"snps,dw-pcie" for RC mode;
>>  - reg: Should contain the configuration address space.
>>  - reg-names: Must be "config" for the PCIe configuration space.
>>      (The old way of getting the configuration address space from "ranges"
>> @@ -41,11 +42,11 @@ EP mode:
>>  
>>  Example configuration:
>>  
>> -	pcie: pcie@dffff000 {
>> +	pcie: pcie@dfc00000 {
>>  		compatible = "snps,dw-pcie";
>> -		reg = <0xdffff000 0x1000>, /* Controller registers */
>> -		      <0xd0000000 0x2000>; /* PCI config space */
>> -		reg-names = "ctrlreg", "config";
>> +		reg = <0xdfc00000 0x0001000>, /* IP registers */
>> +		      <0xd0000000 0x0002000>; /* Configuration space */
>> +		reg-names = "dbi", "config";
>>  		#address-cells = <3>;
>>  		#size-cells = <2>;
>>  		device_type = "pci";
>> @@ -54,5 +55,4 @@ Example configuration:
>>  		interrupts = <25>, <24>;
>>  		#interrupt-cells = <1>;
>>  		num-lanes = <1>;
>> -		num-viewport = <3>;
> 
> Seems like a spurious change?

This item is optional, according to the description, if not specified the driver
assumes by default 2.
By maintaining the configuration like this, I can guarantee that is a functional
configuration, since it's one that I normally use. But I can reverted if you desire.

> 
>>  	};
>> -- 
>> 2.7.4
>>
>>

Thanks,
Gustavo

  reply	other threads:[~2018-04-17 13:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-16 14:37 [PATCH v4 00/10] Designware EP support and code clean up Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 01/10] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-16 21:39   ` Rob Herring
2018-04-17 13:47     ` Gustavo Pimentel [this message]
2018-04-16 14:37 ` [PATCH v4 02/10] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-17  9:17   ` Kishon Vijay Abraham I
2018-04-16 14:37 ` [PATCH v4 03/10] PCI: endpoint: functions/pci-epf-test: Add second entry Gustavo Pimentel
2018-04-17  9:19   ` Kishon Vijay Abraham I
2018-04-17  9:21     ` Kishon Vijay Abraham I
2018-04-16 14:37 ` [PATCH v4 04/10] bindings: PCI: designware: Add support for the EP in Designware driver Gustavo Pimentel
2018-04-16 21:43   ` Rob Herring
2018-04-17 13:33     ` Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 05/10] PCI: Adds device ID for Synopsys Sample Endpoint Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 06/10] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-17  9:22   ` Kishon Vijay Abraham I
2018-04-16 14:37 ` [PATCH v4 07/10] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 08/10] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 09/10] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 10/10] PCI: dwc: Replace magic number by defines Gustavo Pimentel

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