LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: ebiederm@xmission.com (Eric W. Biederman)
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: <linux-kernel@vger.kernel.org>,
	<linux-pci@atrey.karlin.mff.cuni.cz>,
	Michael Ellerman <michael@ellerman.id.au>,
	Greg Kroah-Hartman <gregkh@suse.de>
Subject: [PATCH 3/3] msi: Support masking msi irqs without a mask bit
Date: Tue, 27 Feb 2007 12:33:20 -0700	[thread overview]
Message-ID: <m1hct7l7jz.fsf_-_@ebiederm.dsl.xmission.com> (raw)
In-Reply-To: <m1lkijl7ms.fsf_-_@ebiederm.dsl.xmission.com> (Eric W. Biederman's message of "Tue, 27 Feb 2007 12:31:39 -0700")


For devices that do not support msi-x we only support 1 interrupt.  Therefore
we can disable that one interrupt by disabling the msi capability itself.  If
we leave the intx interrupts disabled while we have the msi capability disabled
no interrupts should be delivered from that device.

Devices with just the minimal msi support (and thus hitting this code path)
include things like the intel e1000 nic, so it looks like is going to be
a fairly common case and thus important to get right.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
---
 drivers/pci/msi.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index c43e7d2..01869b1 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,6 +85,8 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
 			mask_bits &= ~(1);
 			mask_bits |= flag;
 			pci_write_config_dword(entry->dev, pos, mask_bits);
+		} else {
+			msi_set_enable(entry->dev, !flag);
 		}
 		break;
 	case PCI_CAP_ID_MSIX:
-- 
1.5.0.g53756


  reply	other threads:[~2007-02-27 19:33 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-02-27 19:24 [PATCH 0/3] Basic msi bug fixes Eric W. Biederman
2007-02-27 19:28 ` [PATCH 1/3] msi: Sanely support hardware level msi disabling Eric W. Biederman
2007-02-27 19:31   ` [PATCH 2/3] msi: Fixup the msi enable/disable logic Eric W. Biederman
2007-02-27 19:33     ` Eric W. Biederman [this message]
2007-03-02  2:26     ` Michael Ellerman
2007-03-07  5:19       ` Eric W. Biederman
2007-03-07  8:51         ` Michael Ellerman
2007-03-02 20:52 ` [PATCH 0/3] Basic msi bug fixes Greg KH

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=m1hct7l7jz.fsf_-_@ebiederm.dsl.xmission.com \
    --to=ebiederm@xmission.com \
    --cc=gregkh@suse.de \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@atrey.karlin.mff.cuni.cz \
    --cc=michael@ellerman.id.au \
    --cc=torvalds@linux-foundation.org \
    --subject='Re: [PATCH 3/3] msi: Support masking msi irqs without a mask bit' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).