Re: [PATCH] PCIe: limit Max Read Request Size on i.MX to 512 bytes

["Krzysztof Hałasa" <khalasa@piap.pl>]

Krzysztof, :-)

> Would it be possible to implement this particular MRRS fix as a quirk
> only for the i.MX6 controller?  Unless this is something that we need in
> the core, a quirk would be preferred over something that changes the PCI
> core.

I have briefly considered it, but I think it would be *much* more
complicated and error-prone. It also appears that there are more
platforms which need it - the old CNS3xxx, which currently subverts the
PCIE_BUS_PEER2PEER, the loongson, keystone, maybe all DWC PCIe.
Multiplication of the "quirk" code doesn't really look good to me.

TBH I don't think of this as of a "quirk" - all systems have MRRS
limits, it just happens that these ones have their limit lower than 4096
bytes. This isn't a limitation of a particular PCIe device, this is a
common limit of the whole system.

Also I'm not exactly sure the loongson fixup is complete.
It's only done at pci-enable*() time (e.g. for devices which have bigger
MRRS after power-up), while e.g. the r8169 driver changes MRRS well
after pci-enable*().

This means it needs to stay in/below pcie_get_readrq(), and while it
could mean going to ops->write*, it would be a real mess parsing the
devices, PCIE capabilities etc.
Now it's basically a few lines in a seldom called routine in pci.c, and
the loongson case (and others) can be made simpler (and really fixed) as
well.
-- 
Krzysztof "Chris" Hałasa

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