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From: Dongdong Liu <liudongdong3@huawei.com>
To: <helgaas@kernel.org>, <hch@infradead.org>, <kw@linux.com>,
	<logang@deltatee.com>, <linux-pci@vger.kernel.org>,
	<rajur@chelsio.com>, <hverkuil-cisco@xs4all.nl>
Cc: <linux-media@vger.kernel.org>, <netdev@vger.kernel.org>
Subject: [PATCH V6 5/8] PCI/IOV: Enable 10-Bit tag support for PCIe VF devices
Date: Fri, 23 Jul 2021 19:06:39 +0800	[thread overview]
Message-ID: <1627038402-114183-6-git-send-email-liudongdong3@huawei.com> (raw)
In-Reply-To: <1627038402-114183-1-git-send-email-liudongdong3@huawei.com>

Enable VF 10-Bit Tag Requester when it's upstream component support
10-bit Tag Completer.

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 drivers/pci/iov.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index dafdc65..0d0bed1 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -634,6 +634,10 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 
 	pci_iov_set_numvfs(dev, nr_virtfn);
 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
+	if ((iov->cap & PCI_SRIOV_CAP_VF_10BIT_TAG_REQ) &&
+	    dev->ext_10bit_tag)
+		iov->ctrl |= PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
+
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	msleep(100);
@@ -650,6 +654,8 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 
 err_pcibios:
 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
+	if (iov->ctrl & PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN)
+		iov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	ssleep(1);
@@ -682,6 +688,8 @@ static void sriov_disable(struct pci_dev *dev)
 
 	sriov_del_vfs(dev);
 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
+	if (iov->ctrl & PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN)
+		iov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	ssleep(1);
-- 
2.7.4


  parent reply	other threads:[~2021-07-23 11:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-23 11:06 [PATCH V6 0/8] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 1/8] PCI: Use cached Device Capabilities Register Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 2/8] PCI: Use cached Device Capabilities 2 Register Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 3/8] PCI: Add 10-Bit Tag register definitions Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 4/8] PCI: Enable 10-Bit tag support for PCIe Endpoint devices Dongdong Liu
2021-07-23 11:06 ` Dongdong Liu [this message]
2021-07-23 11:06 ` [PATCH V6 6/8] PCI: Enable 10-Bit tag support for PCIe RP devices Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 7/8] PCI: Add "pci=disable_10bit_tag=" parameter for peer-to-peer support Dongdong Liu
2021-07-23 11:32   ` Leon Romanovsky
2021-07-23 16:20     ` Logan Gunthorpe
2021-07-25  6:39       ` Leon Romanovsky
2021-07-26 15:48         ` Logan Gunthorpe
2021-07-27 11:05           ` Leon Romanovsky
2021-07-27 14:30             ` Dongdong Liu
2021-07-27 15:41               ` Leon Romanovsky
2021-07-27 14:00           ` Dongdong Liu
2021-07-23 16:58   ` kernel test robot
2021-07-24 10:35     ` Dongdong Liu
2021-07-23 11:06 ` [PATCH V6 8/8] PCI/P2PDMA: Add a 10-bit tag check in P2PDMA Dongdong Liu
2021-07-23 16:25   ` Logan Gunthorpe
2021-07-24 10:36     ` Dongdong Liu

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