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From: David Miller <davem@davemloft.net>
To: sundeep.lkml@gmail.com
Cc: kuba@kernel.org, richardcochran@gmail.com,
netdev@vger.kernel.org, sgoutham@marvell.com,
sbhatta@marvell.com
Subject: Re: [PATCH v7 net-next 0/3] Add PTP support for Octeontx2
Date: Mon, 24 Aug 2020 06:16:57 -0700 (PDT) [thread overview]
Message-ID: <20200824.061657.2168445189551301124.davem@davemloft.net> (raw)
In-Reply-To: <1598255717-32316-1-git-send-email-sundeep.lkml@gmail.com>
From: sundeep.lkml@gmail.com
Date: Mon, 24 Aug 2020 13:25:14 +0530
> This patchset adds PTP support for Octeontx2 platform.
> PTP is an independent coprocessor block from which
> CGX block fetches timestamp and prepends it to the
> packet before sending to NIX block. Patches are as
> follows:
>
> Patch 1: Patch to enable/disable packet timstamping
> in CGX upon mailbox request. It also adjusts
> packet parser (NPC) for the 8 bytes timestamp
> appearing before the packet.
>
> Patch 2: Patch adding PTP pci driver which configures
> the PTP block and hooks up to RVU AF driver.
> It also exposes a mailbox call to adjust PTP
> hardware clock.
>
> Patch 3: Patch adding PTP clock driver for PF netdev.
>
> Acked-by: Richard Cochran <richardcochran@gmail.com>
> Acked-by: Jakub Kicinski <kuba@kernel.org>
...
Series applied, thank you.
next prev parent reply other threads:[~2020-08-24 13:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 7:55 sundeep.lkml
2020-08-24 7:55 ` [PATCH v7 net-next 1/3] octeontx2-af: Support to enable/disable HW timestamping sundeep.lkml
2020-08-24 7:55 ` [PATCH v7 net-next 2/3] octeontx2-af: Add support for Marvell PTP coprocessor sundeep.lkml
2020-08-24 9:00 ` kernel test robot
2020-08-24 7:55 ` [PATCH v7 net-next 3/3] octeontx2-pf: Add support for PTP clock sundeep.lkml
2020-08-24 13:16 ` David Miller [this message]
2020-08-24 13:17 ` [PATCH v7 net-next 0/3] Add PTP support for Octeontx2 David Miller
2020-08-24 14:31 ` sundeep subbaraya
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