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From: Jakub Kicinski <kuba@kernel.org>
To: Parav Pandit <parav@nvidia.com>
Cc: Parav Pandit <parav@mellanox.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"roid@mellanox.com" <roid@mellanox.com>,
"saeedm@mellanox.com" <saeedm@mellanox.com>,
Jiri Pirko <jiri@nvidia.com>
Subject: Re: [PATCH net-next 2/3] devlink: Consider other controller while building phys_port_name
Date: Wed, 26 Aug 2020 13:07:47 -0700 [thread overview]
Message-ID: <20200826130747.4d886a09@kicinski-fedora-PC1C0HJN> (raw)
In-Reply-To: <BY5PR12MB4322E2E21395BD1553B8E375DC540@BY5PR12MB4322.namprd12.prod.outlook.com>
On Wed, 26 Aug 2020 04:27:35 +0000 Parav Pandit wrote:
> > On Tue, 25 Aug 2020 16:58:38 +0300 Parav Pandit wrote:
> > > A devlink port may be for a controller consist of PCI device.
> > > A devlink instance holds ports of two types of controllers.
> > > (1) controller discovered on same system where eswitch resides This is
> > > the case where PCI PF/VF of a controller and devlink eswitch instance
> > > both are located on a single system.
> > > (2) controller located on other system.
> > > This is the case where a controller is located in one system and its
> > > devlink eswitch ports are located in a different system. In this case
> > > devlink instance of the eswitch only have access to ports of the
> > > controller.
> > >
> > > When a devlink eswitch instance serves the devlink ports of both
> > > controllers together, PCI PF/VF numbers may overlap.
> > > Due to this a unique phys_port_name cannot be constructed.
> >
> > This description is clear as mud to me. Is it just me? Can someone understand
> > this?
>
> I would like to improve this description.
> Do you have an input to describe these two different controllers,
> each has same PF and VF numbers?
Not yet, I'm just trying to figure out how things come together.
Are some VFs of the same PF under one controller and other ones under
a different controller?
> $ devlink port show looks like below without a controller annotation.
> pci/0000:00:08.0/0: type eth netdev eth5 flavour physical
> pci/0000:00:08.0/1: type eth netdev eth6 flavour pcipf pfnum 0
> pci/0000:00:08.0/2: type eth netdev eth7 flavour pcipf pfnum 0
How can you have two PF 0? Aaah - by controller you mean hardware IP,
not whoever is controlling the switching! So the chip has multiple HW
controllers, each of which can have multiple PFs?
Definitely please make that more clear.
Why is @controller_num not under PCI port attrs, but a separate field
without even a mention of PCI? Are some of the controllers a different
bus?
next prev parent reply other threads:[~2020-08-26 20:07 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-25 13:58 [PATCH net-next 0/3] devlink show controller info Parav Pandit
2020-08-25 13:58 ` [PATCH net-next 1/3] devlink: Add comment block for missing port attributes Parav Pandit
2020-08-25 13:58 ` [PATCH net-next 2/3] devlink: Consider other controller while building phys_port_name Parav Pandit
2020-08-26 0:32 ` Jakub Kicinski
2020-08-26 4:27 ` Parav Pandit
2020-08-26 20:07 ` Jakub Kicinski [this message]
2020-08-27 4:31 ` Parav Pandit
2020-08-27 18:32 ` Jakub Kicinski
2020-08-27 20:15 ` Parav Pandit
2020-08-27 21:42 ` Jakub Kicinski
2020-08-28 4:27 ` Parav Pandit
2020-08-28 5:08 ` Parav Pandit
2020-08-28 16:43 ` Jakub Kicinski
2020-08-29 3:43 ` Parav Pandit
2020-09-01 8:19 ` Jiri Pirko
2020-09-01 8:53 ` Parav Pandit
2020-09-01 9:17 ` Jiri Pirko
2020-09-01 21:28 ` Jakub Kicinski
2020-09-02 4:26 ` Parav Pandit
2020-09-02 4:44 ` Parav Pandit
2020-09-02 8:00 ` Jiri Pirko
2020-09-02 15:23 ` Jakub Kicinski
2020-09-02 16:18 ` Parav Pandit
2020-09-02 20:10 ` Parav Pandit
2020-09-03 5:54 ` Jiri Pirko
2020-09-03 19:31 ` Jakub Kicinski
2020-09-04 8:43 ` Jiri Pirko
2020-09-06 3:08 ` Parav Pandit
2020-09-06 16:46 ` Jakub Kicinski
2020-09-07 7:21 ` Jiri Pirko
2020-09-07 16:18 ` Jakub Kicinski
2020-08-25 13:58 ` [PATCH net-next 3/3] net/mlx5: E-switch, Set controller attribute for PCI PF and VF ports Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 0/6] devlink show controller number Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 1/6] net/mlx5: E-switch, Read controller number from device Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 2/6] devlink: Add comment block for missing port attributes Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 3/6] devlink: Move structure comments outside of structure Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 4/6] devlink: Introduce external controller flag Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 5/6] devlink: Introduce controller number Parav Pandit
2020-09-08 18:50 ` Jakub Kicinski
2020-09-09 3:06 ` Parav Pandit
2020-09-08 14:42 ` [PATCH net-next v2 6/6] devlink: Use controller while building phys_port_name Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 0/6] devlink show controller number Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 1/6] net/mlx5: E-switch, Read controller number from device Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 2/6] devlink: Add comment block for missing port attributes Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 3/6] devlink: Move structure comments outside of structure Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 4/6] devlink: Introduce external controller flag Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 5/6] devlink: Introduce controller number Parav Pandit
2020-09-09 4:50 ` [PATCH net-next v3 6/6] devlink: Use controller while building phys_port_name Parav Pandit
2020-09-10 15:02 ` David Ahern
2020-09-09 15:34 ` [PATCH net-next v3 0/6] devlink show controller number Jakub Kicinski
2020-09-09 21:20 ` David Miller
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