From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1DE2C432BE for ; Thu, 26 Aug 2021 11:50:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 992EB61002 for ; Thu, 26 Aug 2021 11:50:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242332AbhHZLvJ (ORCPT ); Thu, 26 Aug 2021 07:51:09 -0400 Received: from mga07.intel.com ([134.134.136.100]:45624 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242100AbhHZLvI (ORCPT ); Thu, 26 Aug 2021 07:51:08 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10087"; a="281443945" X-IronPort-AV: E=Sophos;i="5.84,353,1620716400"; d="scan'208";a="281443945" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 04:50:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,353,1620716400"; d="scan'208";a="465099620" Received: from linux.intel.com ([10.54.29.200]) by orsmga007.jf.intel.com with ESMTP; 26 Aug 2021 04:50:21 -0700 Received: from linux.intel.com (vwong3-iLBPG3.png.intel.com [10.88.229.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id 719855805A3; Thu, 26 Aug 2021 04:50:17 -0700 (PDT) Date: Thu, 26 Aug 2021 19:50:14 +0800 From: Wong Vee Khee To: Andrew Lunn Cc: Florian Fainelli , Vivien Didelot , "David S . Miller" , Jakub Kicinski , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Heiner Kallweit , Russell King , Voon Weifeng , Michael Sit Wei Hong , Vladimir Oltean , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/2] net: pcs: xpcs: enable skip xPCS soft reset Message-ID: <20210826115014.GA5112@linux.intel.com> References: <20210809102229.933748-1-vee.khee.wong@linux.intel.com> <20210809102229.933748-2-vee.khee.wong@linux.intel.com> <20210810235529.GB30818@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Aug 11, 2021 at 04:20:56PM +0200, Andrew Lunn wrote: > > > BIOS does configured the SerDes. The problem here is that all the > > > configurations done by BIOS are being reset at xpcs_create(). > > > > > > We would want user of the pcs-xpcs module (stmmac, sja1105) to have > > > control whether or not we need to perform to the soft reset in the > > > xpcs_create() call. > > > > I understood Andrew's response as suggesting to introduce the ability for > > xpcs_create() to make a BIOS call which would configure the SerDes after > > xpcs_soft_reset(). > > Yes. Exactly. That is what ACPI is for, so we should use it for this. > > Andrew Thanks Florian for the explaination. I have checked with the BIOS developers and they did not implmenet a method to this at the kernel level. Also, Intel AlderLake has both UEFI BIOS and Slim Bootloader which make it least feasible to go for the ACPI method as per suggested. Regards, VK