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From: Heiner Kallweit <hkallweit1@gmail.com>
To: Hayes Wang <hayeswang@realtek.com>
Cc: netdev@vger.kernel.org, nic_swsd@realtek.com, koba.ko@canonical.com
Subject: Re: [PATCH net-next 2/2] r8169: change the L0/L1 entrance latencies for RTL8106e
Date: Fri, 6 Aug 2021 23:27:36 +0200	[thread overview]
Message-ID: <3cfd64a9-dff2-6e60-1524-ddbd1c388c01@gmail.com> (raw)
In-Reply-To: <20210806091556.1297186-376-nic_swsd@realtek.com>

On 06.08.2021 11:15, Hayes Wang wrote:
> The original L0 and L1 entrance latencies of RTL8106e are 4us. And
> they cause the delay of link-up interrupt when enabling ASPM. Change
> the L0 entrance latency to 7us and L1 entrance latency to 32us. Then,
> they could avoid the issue.
> 
> Tested-by: Koba Ko <koba.ko@canonical.com>
> Signed-off-by: Hayes Wang <hayeswang@realtek.com>
> ---
>  drivers/net/ethernet/realtek/r8169_main.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index d2647036b1e7..2c643ec36bdf 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -3502,6 +3502,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
>  	RTL_W8(tp, MCU, RTL_R8(tp, MCU) | EN_NDP | EN_OOB_RESET);
>  	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
>  
> +	/* The default value is 0x13. Change it to 0x2f */
> +	rtl_csi_access_enable(tp, 0x2f);

Most chip versions use rtl_set_def_aspm_entry_latency() that sets
the value to 0x27. Does this value also work for RTL8106e?
Then we could simply use the same call here.

Can you explain how the L0 and L1 times in us map to the
register value? Then we could add a function that doesn't work
with a magic value but takes the L0 and L1 times in us as
parameter.

> +
>  	rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000);
>  
>  	/* disable EEE */
> 


  reply	other threads:[~2021-08-06 21:27 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-06  9:15 [PATCH net-next 0/2] r8169: adjust the setting " Hayes Wang
2021-08-06  9:15 ` [PATCH net-next 1/2] Revert "r8169: avoid link-up interrupt issue on RTL8106e if user enables ASPM" Hayes Wang
2021-08-06  9:15 ` [PATCH net-next 2/2] r8169: change the L0/L1 entrance latencies for RTL8106e Hayes Wang
2021-08-06 21:27   ` Heiner Kallweit [this message]
2021-08-07  3:50     ` Hayes Wang
2021-08-07  8:40 ` [PATCH net-next 0/2] r8169: adjust the setting " patchwork-bot+netdevbpf

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