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From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Parshuram Thombare <pthombar@cadence.com>,
<alexandre.belloni@bootlin.com>
Cc: <claudiu.beznea@microchip.com>, <antoine.tenart@bootlin.com>,
<davem@davemloft.net>, <netdev@vger.kernel.org>,
<f.fainelli@gmail.com>, <linux-kernel@vger.kernel.org>,
<mparab@cadence.com>
Subject: Re: [PATCH net] net: macb: fix for pause frame receive enable bit
Date: Mon, 7 Sep 2020 09:14:20 +0200 [thread overview]
Message-ID: <6069131d-118e-0387-f312-25449a545c2a@microchip.com> (raw)
In-Reply-To: <1599294093-30758-1-git-send-email-pthombar@cadence.com>
On 05/09/2020 at 10:21, Parshuram Thombare wrote:
> PAE bit of NCFGR register, when set, pauses transmission
> if a non-zero 802.3 classic pause frame is received.
>
> Fixes: 7897b071ac3b ("net: macb: convert to phylink")
> Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
For the record:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks Parshuram for having found this issue.
Best regards,
Nicolas
> ---
> drivers/net/ethernet/cadence/macb_main.c | 3 +--
> 1 files changed, 1 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 6761f40..9179f7b 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -647,8 +647,7 @@ static void macb_mac_link_up(struct phylink_config *config,
> ctrl |= GEM_BIT(GBE);
> }
>
> - /* We do not support MLO_PAUSE_RX yet */
> - if (tx_pause)
> + if (rx_pause)
> ctrl |= MACB_BIT(PAE);
>
> macb_set_tx_clk(bp->tx_clk, speed, ndev);
> --
> 1.7.1
>
--
Nicolas Ferre
prev parent reply other threads:[~2020-09-07 7:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-05 8:21 Parshuram Thombare
2020-09-06 19:04 ` Jakub Kicinski
2020-09-07 7:14 ` Nicolas Ferre [this message]
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