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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: Sergey Shtylyov <s.shtylyov@omp.ru>,
"davem@davemloft.net" <davem@davemloft.net>,
"kuba@kernel.org" <kuba@kernel.org>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH] net: renesas: sh_eth: Fix freeing wrong tx descriptor
Date: Wed, 8 Sep 2021 05:45:01 +0000 [thread overview]
Message-ID: <TY2PR01MB36924D8258BD1C8E3287136DD8D49@TY2PR01MB3692.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <a610ac4b-eeb9-50c2-4b88-0d77d1c83d47@omp.ru>
Hi Sergey,
> From: Sergey Shtylyov, Sent: Wednesday, September 8, 2021 4:30 AM
>
> On 9/7/21 2:29 PM, Yoshihiro Shimoda wrote:
>
> > The cur_tx counter must be incremented after TACT bit of
> > txdesc->status was set. However, a CPU is possible to reorder
> > instructions and/or memory accesses between cur_tx and
> > txdesc->status. And then, if TX interrupt happened at such a
> > timing, the sh_eth_tx_free() may free the descriptor wrongly.
> > So, add wmb() before cur_tx++.
>
> Not dma_wmb()? :-)
On armv8, dma_wmb() is DMB OSHST, and wmb() is DSB ST.
IIUC, DMB OSHST is not affected the ordering of instructions.
So, we have to use wmb().
> > Otherwise NETDEV WATCHDOG timeout is possible to happen.
> >
> > Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>
> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Thank you for your review!
Best regards,
Yoshihiro Shimoda
next prev parent reply other threads:[~2021-09-08 5:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-07 11:29 Yoshihiro Shimoda
2021-09-07 13:10 ` patchwork-bot+netdevbpf
2021-09-07 19:29 ` Sergey Shtylyov
2021-09-08 5:45 ` Yoshihiro Shimoda [this message]
2021-09-08 9:46 ` Sergey Shtylyov
2021-09-08 11:43 ` Yoshihiro Shimoda
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